JPS63152249U - - Google Patents
Info
- Publication number
- JPS63152249U JPS63152249U JP1987043861U JP4386187U JPS63152249U JP S63152249 U JPS63152249 U JP S63152249U JP 1987043861 U JP1987043861 U JP 1987043861U JP 4386187 U JP4386187 U JP 4386187U JP S63152249 U JPS63152249 U JP S63152249U
- Authority
- JP
- Japan
- Prior art keywords
- resin
- heat sink
- semiconductor element
- thin layer
- external lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 238000007789 sealing Methods 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987043861U JPS63152249U (US07860544-20101228-C00003.png) | 1987-03-25 | 1987-03-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987043861U JPS63152249U (US07860544-20101228-C00003.png) | 1987-03-25 | 1987-03-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63152249U true JPS63152249U (US07860544-20101228-C00003.png) | 1988-10-06 |
Family
ID=30861123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987043861U Pending JPS63152249U (US07860544-20101228-C00003.png) | 1987-03-25 | 1987-03-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63152249U (US07860544-20101228-C00003.png) |
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1987
- 1987-03-25 JP JP1987043861U patent/JPS63152249U/ja active Pending