JPS63148627A - Method of lithographing by electron beam lithography equipment - Google Patents
Method of lithographing by electron beam lithography equipmentInfo
- Publication number
- JPS63148627A JPS63148627A JP29486286A JP29486286A JPS63148627A JP S63148627 A JPS63148627 A JP S63148627A JP 29486286 A JP29486286 A JP 29486286A JP 29486286 A JP29486286 A JP 29486286A JP S63148627 A JPS63148627 A JP S63148627A
- Authority
- JP
- Japan
- Prior art keywords
- electron beam
- lithography
- regions
- region
- alignment mark
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 10
- 238000000609 electron-beam lithography Methods 0.000 title claims description 5
- 238000010894 electron beam technology Methods 0.000 claims abstract description 11
- 238000001514 detection method Methods 0.000 claims abstract description 10
- 239000007787 solid Substances 0.000 claims abstract 6
- 239000003504 photosensitizing agent Substances 0.000 claims 1
- 238000001459 lithography Methods 0.000 abstract 5
- 235000012431 wafers Nutrition 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Electron Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電子線描画装置の描画方法に係り。[Detailed description of the invention] [Industrial application field] The present invention relates to a drawing method using an electron beam drawing apparatus.
特に直接描画の領域分割における合せマーク検出方法に
関する。In particular, the present invention relates to a method for detecting alignment marks in region division for direct drawing.
電子線による直接描画を行う際には1例えば特開昭57
−204127号公報に記載されているように、予め決
められた領域のコーナーに設けられた合せマークを検出
し、描画すべき位置の補正を行ない描画を行っている。When performing direct drawing with an electron beam, 1, for example, JP-A-57
As described in Japanese Patent No. 204127, alignment marks provided at the corners of a predetermined area are detected, the position to be drawn is corrected, and drawing is performed.
上記従来技術においては、描画領域毎に合せマークが設
けられており、領域毎に合せマークの検出を行い5位置
の補正を行っている。このため。In the above-mentioned conventional technology, alignment marks are provided for each drawing area, alignment marks are detected for each area, and correction is performed at five positions. For this reason.
マーク検出に要する時間が大きな割合を占め、描画速度
の向上を妨げる一因となっていた。The time required for mark detection occupies a large proportion of the time, which is one factor that hinders improvement in drawing speed.
本発明の目的は、上記した従来技術の欠点をなくし、マ
ーク検出に要する時間が短縮でき、描画速度の向上が図
れる電子線描画袋の描画方法を提供するにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a method for drawing an electron beam drawing bag, which eliminates the drawbacks of the prior art described above, reduces the time required for mark detection, and improves drawing speed.
上記目的は、領域の境界に設けられているマークを隣接
する領域において共通に使用することにより達成される
。The above object is achieved by commonly using marks provided at the boundaries of regions in adjacent regions.
描画が完了した隣接の領域との境界の合せマークは検出
されており、合せマークの座標を記憶しておき、次に描
画しようとする領域において再度使用することにより、
領域毎の検出すべき合せマークの数を低減でき、描画速
度の向上を図ること・ができる。The alignment mark at the boundary with the adjacent area where drawing has been completed has been detected, and the coordinates of the alignment mark are memorized and used again in the area to be drawn next.
The number of alignment marks to be detected for each area can be reduced, and the drawing speed can be improved.
第2図に電子線描画装置の概要を示す。 Figure 2 shows an overview of the electron beam lithography system.
電子ビーム2は電磁レンズ4により所望の形状と電流密
度に制御され、その表面に電子ビーム感光剤の塗布され
たウェハ8上に照射される。ステージ9はレーザ干渉計
15とステージ制御系13により位置制御され、ステー
ジ9の位置は0.01μm 1.位で高精度に測定され
る。ウェハ8上の合せマークは電子ビーム2を偏向器6
によってウェハ8上のマーク位置を走査し、マーク検出
回路11によって認識し、コンピュータ12に認識され
る。The electron beam 2 is controlled to have a desired shape and current density by an electromagnetic lens 4, and is irradiated onto a wafer 8 whose surface is coated with an electron beam sensitizer. The position of the stage 9 is controlled by a laser interferometer 15 and a stage control system 13, and the position of the stage 9 is 0.01 μm.1. It is measured with high precision at The alignment mark on the wafer 8 directs the electron beam 2 to the deflector 6.
The mark position on the wafer 8 is scanned by the mark detection circuit 11 and recognized by the computer 12.
ウェハ上に配置されたマークと半導体チップの例を第3
図に示す。第3図において粗合せマーク17を検出しウ
ェハの概略位置と回転を求める。The third example of marks and semiconductor chips placed on a wafer
As shown in the figure. In FIG. 3, the rough alignment mark 17 is detected to determine the approximate position and rotation of the wafer.
斜線を施した部分がブロック18であり各ブロック18
毎4隅に合せマーク16が配置しである。The shaded part is the block 18, and each block 18
Alignment marks 16 are placed at each of the four corners.
半導体チップ19は各ブロック18に数箇づつ含まれ、
本チップがいわゆるLSIに相当する。Several semiconductor chips 19 are included in each block 18,
This chip corresponds to a so-called LSI.
第1図に本発明の一実施例を示す0合せマーク16はブ
ロック18毎に設けられておらず、各ブロック18の境
界にのみ設けられである。斜線の施したブロックを認識
する場合、4ケの合せマークのうち2ケは隣のブロック
にある合せマークを利用する。FIG. 1 shows an embodiment of the present invention, in which zero alignment marks 16 are not provided for each block 18, but are provided only at the boundaries of each block 18. When recognizing a block with diagonal lines, two of the four alignment marks use alignment marks on the adjacent block.
合せブロックの認識方法について具体的に第4−を用い
て説明する。The method of recognizing the combined blocks will be specifically explained using No. 4-.
・°し’fjS4□。おいア1.ッ、□9.)□、いゎ
ゆうスクライブエリアに合せマーク16が配置しである
。−般にシリコンウェハは種々のプロセスを経るため熱
変型などによりパタンの位置がずれる。・°shi'fjS4□. Hey a1. , □9. ) □, the alignment mark 16 is placed in the scribe area. -Generally, silicon wafers go through various processes, so the position of the pattern shifts due to thermal deformation, etc.
従って精度良く重ね合せを実現するためには上記マーク
検出がきわめて重要である。Therefore, the above mark detection is extremely important in order to achieve accurate overlay.
(xlrys)〜(X4?y4)の4ケの合せマークで
囲まれた領域をブロックと呼んでいる。本ブロックの形
状を(1) 、 (2)式で定義する。The area surrounded by the four matching marks (xlrys) to (X4?y4) is called a block. The shape of this block is defined by equations (1) and (2).
X=ax+by+cxy+d ・(1
)Y=ex+fy+gxy+h =(
2)ここで、X、Y:実際の座標
a”h:補正係数
Xe’/:本来あるべき理想座標
である。従って、 (1) 、 (2)式はブロックの
形状を台形で定義することを表わす。X=ax+by+cxy+d ・(1
)Y=ex+fy+gxy+h=(
2) Here, X, Y: Actual coordinates a"h: Correction coefficient represents.
一番最初の領域の場合は、4点の理想位置からのずれ量
(Δx1.Δy1)〜(ΔX4.Δya)を電子線描画
装置か検出し、(3)〜(10)式の連立方程式の解を
求めることにより補正係数a −hを求める。In the case of the first region, the electron beam lithography device detects the deviation amount (Δx1.Δy1) to (ΔX4.Δya) from the ideal position of the four points, and calculates the simultaneous equations (3) to (10). By finding the solution, the correction coefficient a − h is found.
Δxx=a xs+b yt+c X1yl+d
−(3)Δ yl=e xt+b yt+g x
tyx+h −(4)Δxz=a xz+by
z+c xzyz+d 0°1(5)Δyz=e
X2+fyz+gxzyz+h =(6)Δxs=
a xa+by3+ CX8y3+d −(7)Δ
ya=s xs+fya+ gxaya+h −(
8)Δxa==a xa+b y4+ Cxay4+d
”°19)Δy4=s x4+f y4+gxa
ya+h ・−(10)次の領域を描画する場合に
は、(1) 、 (2)式を用いて描画位置を与えるこ
とにより精度良く重ね合せ描画が実行される。Δxx=a xs+b yt+c X1yl+d
−(3) Δ yl=e xt+byt+g x
tyx+h −(4)Δxz=a xz+by
z+c xzyz+d 0°1(5)Δyz=e
X2+fyz+gxzyz+h=(6)Δxs=
a xa+by3+ CX8y3+d −(7)Δ
ya=s xs+fya+ gxaya+h −(
8) Δxa==a xa+b y4+ Cxay4+d
”°19)Δy4=s x4+f y4+gxa
ya+h.-(10) When drawing the next area, overlapping drawing is executed with high accuracy by giving the drawing position using equations (1) and (2).
次に第5図に描画シーケンスを示す、第5図aは従来法
のフローチャート、第5図すは本発明のフローチャート
である1本フローチャートに示した如く、既に隣のブロ
ックでマーク検出が完了している場合にはマーク検出が
不要となるため、描画時間の短縮が図れる。第1図、第
3図の比較ではブロック数が21であり、ブロック毎の
合せマーク検出時間が約6秒であるから、約60秒の時
間短縮が実施できる。Next, FIG. 5 shows a drawing sequence, FIG. 5a is a flowchart of the conventional method, and FIG. 5A is a flowchart of the present invention. In this case, mark detection is not necessary, so the drawing time can be shortened. In the comparison between FIG. 1 and FIG. 3, the number of blocks is 21 and the alignment mark detection time for each block is about 6 seconds, so the time can be reduced by about 60 seconds.
以上本発明によれば、隣接する領域間の合せマークを共
用することにより、合せマーク検出の時間が短縮でき、
描画速度の向上をもたらすことができる。As described above, according to the present invention, by sharing the alignment mark between adjacent areas, the time for detecting the alignment mark can be shortened.
This can improve drawing speed.
第1図は本発明に係る合せマーク検出方法を示す図、第
2図は電子線描画装置の概要を示す構成図、第3図は従
来の合せマークとブロックとの関係を示す図、第4図は
描画すべき領域の位置補正を説明する図、第5図は本発
明と従来の描画手順を示す図である。
1・・・電子績、2・・・電子ビーム、3・・・絞り、
4・・・電磁レンズ、5・・・プランカー、6・・・偏
向器、7・・・反射電子検出器、8・・・ウェハ、9・
・・ステージ、1゜・・・偏向制御系、11・・・マー
ク検出回路、12・・・コンピュータ、13・・・モー
タ制御系、14・・・レーザ干渉測長計、15・・・レ
ーザ光源、16・・・合せマーク、17・・・粗合せマ
ーク、18・・・ブロック、19・・・チップ。FIG. 1 is a diagram showing the registration mark detection method according to the present invention, FIG. 2 is a configuration diagram showing an outline of an electron beam lithography apparatus, FIG. 3 is a diagram showing the relationship between conventional registration marks and blocks, and FIG. The figure is a diagram for explaining the position correction of the area to be drawn, and FIG. 5 is a diagram showing the drawing procedure of the present invention and the conventional drawing procedure. 1...Electronic score, 2...Electron beam, 3...Aperture,
4... Electromagnetic lens, 5... Plunker, 6... Deflector, 7... Backscattered electron detector, 8... Wafer, 9...
... Stage, 1° ... Deflection control system, 11 ... Mark detection circuit, 12 ... Computer, 13 ... Motor control system, 14 ... Laser interferometric length meter, 15 ... Laser light source , 16... alignment mark, 17... rough alignment mark, 18... block, 19... chip.
Claims (1)
ム感光剤の塗布された固体表面に照射し、前記固体表面
の描画を行う電子線描画装置において、前記固体表面を
複数の領域に分割し、この分割領域に位置検出用合せマ
ークを設け、この合せマークを隣接する領域で共通に使
用して描画を行うようにしたことを特徴とする電子線描
画装置の描画方法。1. In an electron beam lithography apparatus that forms an electron beam into a desired shape and current density and irradiates it onto a solid surface coated with an electron beam photosensitizer to draw the solid surface, the solid surface is divided into a plurality of regions. A drawing method for an electron beam drawing apparatus, characterized in that alignment marks for position detection are provided in the divided areas, and the alignment marks are commonly used in adjacent areas for drawing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29486286A JPS63148627A (en) | 1986-12-12 | 1986-12-12 | Method of lithographing by electron beam lithography equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29486286A JPS63148627A (en) | 1986-12-12 | 1986-12-12 | Method of lithographing by electron beam lithography equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63148627A true JPS63148627A (en) | 1988-06-21 |
Family
ID=17813215
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29486286A Pending JPS63148627A (en) | 1986-12-12 | 1986-12-12 | Method of lithographing by electron beam lithography equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63148627A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7427459B2 (en) | 2006-06-23 | 2008-09-23 | Industrial Technology Research Institute | Recticle pattern applied to mix-and-match lithography process and alignment method of thereof |
CN102681330A (en) * | 2011-03-16 | 2012-09-19 | 南亚科技股份有限公司 | Photomask and method for forming overlay mark using the same and precision improvement method for counterpoint of secondary pattern technology |
TWI512051B (en) * | 2010-01-15 | 2015-12-11 | Fujifilm Corp | Process for producing azo compounds, process for producing ink for inkjet recording, process for producing coloring composition for color filter, and process for producing color filter |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS566438A (en) * | 1979-06-27 | 1981-01-23 | Fujitsu Ltd | Electron beam exposure |
JPS5612730A (en) * | 1979-07-11 | 1981-02-07 | Fujitsu Ltd | Electron beam exposure |
JPS57204127A (en) * | 1981-06-10 | 1982-12-14 | Hitachi Ltd | Drawing method for pattern of electron-ray drawing device |
-
1986
- 1986-12-12 JP JP29486286A patent/JPS63148627A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS566438A (en) * | 1979-06-27 | 1981-01-23 | Fujitsu Ltd | Electron beam exposure |
JPS5612730A (en) * | 1979-07-11 | 1981-02-07 | Fujitsu Ltd | Electron beam exposure |
JPS57204127A (en) * | 1981-06-10 | 1982-12-14 | Hitachi Ltd | Drawing method for pattern of electron-ray drawing device |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7427459B2 (en) | 2006-06-23 | 2008-09-23 | Industrial Technology Research Institute | Recticle pattern applied to mix-and-match lithography process and alignment method of thereof |
TWI512051B (en) * | 2010-01-15 | 2015-12-11 | Fujifilm Corp | Process for producing azo compounds, process for producing ink for inkjet recording, process for producing coloring composition for color filter, and process for producing color filter |
CN102681330A (en) * | 2011-03-16 | 2012-09-19 | 南亚科技股份有限公司 | Photomask and method for forming overlay mark using the same and precision improvement method for counterpoint of secondary pattern technology |
US8535858B2 (en) | 2011-03-16 | 2013-09-17 | Nanya Technology Corp. | Photomask and method for forming overlay mark using the same |
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