JPS63147895U - - Google Patents
Info
- Publication number
- JPS63147895U JPS63147895U JP1987040563U JP4056387U JPS63147895U JP S63147895 U JPS63147895 U JP S63147895U JP 1987040563 U JP1987040563 U JP 1987040563U JP 4056387 U JP4056387 U JP 4056387U JP S63147895 U JPS63147895 U JP S63147895U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- heat dissipation
- integrated circuit
- hybrid integrated
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000017525 heat dissipation Effects 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 8
- 239000002826 coolant Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987040563U JPS63147895U (US06623731-20030923-C00012.png) | 1987-03-19 | 1987-03-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987040563U JPS63147895U (US06623731-20030923-C00012.png) | 1987-03-19 | 1987-03-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63147895U true JPS63147895U (US06623731-20030923-C00012.png) | 1988-09-29 |
Family
ID=30854760
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987040563U Pending JPS63147895U (US06623731-20030923-C00012.png) | 1987-03-19 | 1987-03-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63147895U (US06623731-20030923-C00012.png) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014107460A (ja) * | 2012-11-29 | 2014-06-09 | Kyocera Corp | 配線基板およびそれを用いた実装構造体 |
-
1987
- 1987-03-19 JP JP1987040563U patent/JPS63147895U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014107460A (ja) * | 2012-11-29 | 2014-06-09 | Kyocera Corp | 配線基板およびそれを用いた実装構造体 |