JPS63146396U - - Google Patents
Info
- Publication number
- JPS63146396U JPS63146396U JP3789887U JP3789887U JPS63146396U JP S63146396 U JPS63146396 U JP S63146396U JP 3789887 U JP3789887 U JP 3789887U JP 3789887 U JP3789887 U JP 3789887U JP S63146396 U JPS63146396 U JP S63146396U
- Authority
- JP
- Japan
- Prior art keywords
- wiring boards
- memory module
- module device
- integrated circuit
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 6
Landscapes
- Semiconductor Memories (AREA)
- Combinations Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3789887U JPS63146396U (pl) | 1987-03-17 | 1987-03-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3789887U JPS63146396U (pl) | 1987-03-17 | 1987-03-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63146396U true JPS63146396U (pl) | 1988-09-27 |
Family
ID=30849636
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3789887U Pending JPS63146396U (pl) | 1987-03-17 | 1987-03-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63146396U (pl) |
-
1987
- 1987-03-17 JP JP3789887U patent/JPS63146396U/ja active Pending