JPS63142765A - Image area separator - Google Patents

Abstract

PURPOSE:To improve separation precision by writing one picture element if the number of the picture elements of a dot center detection pattern is odd, and two picture elements if it is even, deciding whether period information is a dot photograph area or a linear picture area in accordance with the presence and absence of a constant period, and taking the dot photograph area precedence so as to store it in a second storage means. CONSTITUTION:A period information storage circuit 13 writes an output from a dot center detection circuit 12 (period information) in a position which is on an incorporated picture memory corresponding to the center of respective dot center detection patterns. If the number of the picture elements of the dot center detection pattern is odd, one picture element is written, and if it is even, two picture elements are written. Viewed from one main scan line, period information has a characteristic that it has a constant periodicity if it is the dot area, but does not have the constant periodicity if it is the linear picture area. For separating the picture in which the dot photograph and the linear picture of character and the like is mixed into the dot area and the linear picture area, a period detection circuit 14 having the period detection and collation pattern on one line detects the presence and absence of periodicity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image area separation device, and more particularly, it separates an image containing a mixture of halftone photographs and A-pictures such as letters into a penalty-dot photographic area and Ia
ii! The present invention relates to an image area separation device that separates the image area into two areas.

2. Description of the Related Art With the spread of facsimiles in recent years, there are increasing opportunities to transmit not only line drawings such as characters but also images such as printed photographs. When printing photographs, halftone photographs are generally not used.

If this halftone photograph is sent by facsimile for a long time, moiré may occur. When a special binarization method was used to suppress the occurrence of moiré, breaks in thin lines or unnecessary notches could appear around the lines in line drawings.

Therefore, in order to separate the two and apply binarization methods suitable for each, several devices for separating the tIJ true region and the line drawing region have been proposed. Among these methods, one method that can handle various halftone dots is a method that uses two threshold values to separate the halftone photograph area from the line drawing area due to the existence of a closed area peculiar to halftone photographs. By applying
Apparatuses have been proposed that can perform separation with a certain degree of precision even in halftone photographic areas with various line numbers and angles.

Problems to be Solved by the Invention However, the conventional method described above has an area ratio of 50%.
Although this method is effective for photographs with halftone dots having a certain density, there are still some parts where the halftone dots cannot be completely separated, especially when the halftone dot angle is around 90 degrees.

The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a novel imaging device which makes it possible to overcome the above-mentioned problems inherent in the prior art.

Means for Solving the Problems In order to achieve the above object, the image area separation device according to the present invention includes a binarization means for comparing a human-powered image signal with a threshold value and converting it into a binary image (No. 4); A halftone dot center detection means for detecting the center of a series of black pixels or a row of white pixels in a main scanning line from a binary image signal binarized by a binarization means, and detection by the halftone dot center detection means. According to the result, halftone period information is written to the center of the series of black pixels or white pixels for one pixel when the number of pixels in the halftone center detection pattern is an odd number, and for two pixels when it is an even number.The detection stored in the writing result means A determining means for determining whether a predetermined region on a main scanning line is a halftone photographic region or a line drawing region based on the result, and the determining means and a second storage means for storing the determination result that the area is a halftone photograph area with priority given to the result that the area is a line drawing area.

EXAMPLE Below, one preferred embodiment of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of an image area separation device according to the present invention.

Referring to FIG. 1, an image signal input from a terminal 101 is converted into a binary image signal by a binarization circuit 11. Next, the binary image signal output from the binarization circuit 1 is as follows:
The halftone dot center detection circuit 12 determines whether any of the patterns shown in FIG. 2 exist for each case in which both ends of one line are white pixels and all the pixels in between are black pixels, or vice versa. is determined and exists, and if both ends are white pixels and all the pixels in between are black pixels, black pixel column center information is used, and vice versa, white pixel column center information (hereinafter both are used) The 0-cycle information storage circuit 13 outputs the 0-cycle information (collectively referred to as cycle information), and the 0-cycle information storage circuit 13 stores the above-mentioned information at a position on the built-in image memory corresponding to the center of each halftone dot center detection pattern (FIG. 2). The output (period information) of the halftone dot center detection circuit 12 is written. At this time, when the number of pixels in the halftone center detection pattern is an odd number, one pixel is written, and when it is an even number, two pixels are written (FIG. 2). The period information written in the period information storage circuit 13 is 1
When viewed from above the main scanning line, halftone dot areas have a certain periodicity, while line drawing areas do not have a certain periodicity. Taking advantage of this feature,
In order to separate an image containing a mixture of halftone photographs and line drawings such as characters into halftone dot areas and line drawing areas, periodicity is detected by a period detection circuit 14 having a period detection reference pattern on one line as shown in FIG. Detect whether there is or not. Here, for convenience of explanation, black pixel column center information and white pixel column center information are
Let us consider, for example, a case where it is determined that the area is a halftone dot area when two periods of each exist. Of each pattern in Figure 3, ◎
Only the marks and ★ marks are referenced pixels, and other unmarked parts are not referenced. Further, the reference pixels marked with O and ★ are arranged alternately in two locations at the same interval in each reference pattern. This makes it possible to detect whether two fishnet dots and two white dots exist alternately in the image.

In reality, the black pixel row center information indicating the position of the fish dot in the image is at all the positions marked with ◎, and the white pixel row center information indicating the position of the own halftone dot is at all the positions marked with ★.

Or, black pixel column center information is at all positions marked with ★.

Detects whether or not white pixel row center information exists at all positions marked with ◎, and if it exists, outputs 1, indicating that a halftone dot exists in the area in the detection pattern. . If not, the 0 separation information storage circuit 15 outputs O (hereinafter the output will be referred to as separation information). Separation information, which is the cycle detection result, is written in the corresponding position. At that time, writing is performed so that 1 has priority. And finally terminal 10
Output from 2.

FIG. 4 shows a concrete block configuration of the halftone dot center detection circuit 12.

For convenience of explanation, the halftone dot center detection patterns used to find the center position of halftone dots are shown in (A) to 2 as shown in Fig. 2.
There are seven types up to (G). Of course, it is also possible to increase the number of patterns beyond this.

A binary image signal is supplied from terminal 401. 1-pixel delay elements 41A, 41B, 41C:, 41D, 41E, 41
F, 41G, 4H1, 411 are (A) to (G
), outputs the corresponding pixel value of the pattern, and stores it in the ROM42.
(READ ONLYM [MORY read-only memory)]. here.

The outputs of each of the 1-pixel delay elements 41A to 411 are as follows.

In FIG. 2, the leftmost pixels of each pattern correspond in order to 41Δ, 41B, . . . , 411. In the ROM 42, it is determined whether the pattern shown in FIG. 2 exists or not for each case where both ends of the l line are white pixels and all the pixels in between are black pixels, or vice versa. In this case, if both ends are white pixels and all pixels in between are black pixels, black pixel column center information is
In the opposite case, white pixel column center information is sent to terminals IA~8.
Output from each A. Here, among the terminals IA to 8A,
IA to 4A output black pixel column center information, and terminal 5A
From 8A to 8A, white pixel column center information is output.

Moreover, each output position is as shown in FIG.

FIGS. 5 and 6 show block configurations of the periodic information storage circuit 13.

Figure 5 shows a circuit that stores black pixel column center information;
The figure shows a circuit that stores white pixel column center information. Both have exactly the same circuit configuration. Terminal LA, 2A, 3A, 4
The outputs of the dot center detection circuit 12 are supplied from A, 5A, 6A, 7A, and 8A. At this time, the output terminal name of the halftone dot center detection circuit 12 and the period information storage circuit 13
The input terminals with the same name are connected to each other. Also,
O is always supplied from terminals 501 and 601. 1
The image memory consisting of pixel delay elements 51A-510 and 61A-610 includes logical OR gates 52A, 52B, 5
Black pixel column center information or white pixel column center information is written by 2C, 52D, 62A, 62B, 62G, and 62D. This result shows that terminal IB-10B and IC~
Output from IOC.

FIG. 7 shows a block configuration of the period detection circuit 14.

For convenience of explanation, period detection reference patterns used to know the period of halftone dots are shown in FIG. 3 (1) to (II).
There are three types up to I). Of course, it is also possible to increase the number of patterns beyond this. Terminals IB to IOB and I
The output of the periodic information storage circuit 13 is supplied from the C-10G. At this time, the same output terminal name of the period information storage circuit 13 and the same input terminal name of the period detection circuit 14 are connected. Further, the positional relationship between each terminal and the pixels of the period detection reference pattern is shown in FIG. R.O.
In M71A, it is determined whether there are two periods of black pixel row center information in the period detection reference pattern shown in FIG. 3, and if there is, 1 is output as it is a halftone dot area candidate. At this time, the ROM 71A separately outputs detection results for each cycle detection reference pattern. Similarly, in the ROM 71B, it is determined whether two cycles of white pixel row center information exist, and if so, it is determined that it is a halftone dot area candidate and 1 is output. Each output of LA and each output of ROM71B are logical AND
The gates 72A, 72B, and 72G control the output from the respective terminals 703, 704, and 705 only when two periods of black pixel column center information and two periods of white pixel column center information exist simultaneously, that is, when a halftone dot area exists. Outputs 1. On the other hand, the outputs of the logical AND gates 72A, 72B, and 72G are outputted from the terminal 702 by the logical OR gate 73 as 1 when at least one of the three types of cycle detection reference patterns exists.

FIG. 8 shows a block configuration of the separation information storage circuit 15.

Terminals 702, 703, 704, 705 in this block diagram
supplies the output of the period detection circuit 14. At this time, the same output terminal name of the period detection circuit 14 and the same input terminal name of the separation information storage circuit 15 are connected. Here, for convenience of explanation, the period detection circuit 1
When a cycle is detected in step 4, the length of the pattern in which one cycle is detected x 5 lines is set as the halftone dot area. Of course, it can be done in the same way with other lengths and other numbers of lines.

From the input terminal of ROM81, the period detection reference pattern (
The detection results of 1) to (II) are input separately. and.

Among the period detection reference patterns, the length of the area of the pattern whose period has been detected is output from the output terminal of the ROM 81 in pixel units. At this time, if two or three types of cycle detection reference patterns detect the cycle at the same time, the pattern area with the largest flow rate is output.

In the down counter 82, when 1 is manually input to the terminal 702, from that point on, the down counter 82 outputs 1 for the number of pixels of the length of the period detection reference pattern given by 110M81. O is always supplied from the terminal 801, and the result of period detection, that is, separation information is stored in the image memory consisting of one scanning line delay elements 83A, 83B, 83C, and 83D.

1-scan line delay elements 83A and 83B of this image memory.

83C, 83D and the output of the down counter 82 are connected to logical OR gates 84A, 84B, 84.
By connecting to G, 84D, and 84E, 1 is written in an area corresponding to the length of the period detection reference pattern x 5 lines. That is, the information that the area is a halftone dot area is written with priority over the information that the area is a line drawing area. This result is output from terminal 802.

As described in detail, according to the present invention, it is possible to effectively separate the halftone dot area and the line drawing area even when halftone photographs and line drawings with unpredictable line counts and angles coexist. The effect of greatly increasing the separation accuracy at halftone dots having a density of about 50% in terms of area ratio, which could not be separated by one area in image area separation using regions, can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure shows an example of a reference pattern used in halftone dot center detection, FIG. 3 shows an example of a reference pattern used in cycle detection, and FIG. 4 is a block diagram showing details of the halftone dot center detection circuit. , FIG. 5 is a block configuration diagram of a circuit that stores black pixel column center information in the periodic information storage circuit, and FIG. 6 is a configuration block diagram of a circuit that stores white pixel column center information in the periodic information storage circuit. FIG. 7 is a block diagram showing details of the period detection circuit, and FIG. 8 is a block diagram showing details of the separation information storage circuit. 11. Binarization circuit with fixed threshold value, 12.
, . Halftone dot center detection circuit, 13. , , Periodic information storage circuit. 14. , Period detection circuit, 15. , , separation information storage circuit, 41A, 41B, 41G, 41D, 41E,
41F, 41G, 4111.411.51A, 51B,
51G, 51D, 51E, 51F, 51G, 5111.
511.51J, 51K, 51L, 51M, 51N, 5
10.61A, 61B, 61G, 61D, 61E, 61
F, 61G, 61H161I, 61J, 61K, 6
1L, 61M, 61N, 610. ,．． 1 pixel delay element,
42.71A, 71B, 81. , ', IIIOM(
read-only memory), 52A, 52B, 52C152
D, 62A, 62B, 62C162D, 73, 84A,
84B, 84C, 84D, 84E, .

Claims (1)

[Claims] An apparatus for separating an image containing a mixture of halftone photographs and line drawings such as characters into a halftone photograph area and a line drawing area, comprising a binarizing means for comparing an input image signal with a threshold value and converting the input image signal into a binary image signal;
Halftone dot center detection means detects the center of a series of black pixels or white pixel rows on the main scanning line from the binary image signal converted by the value conversion means, and the halftone dot period is determined according to the detection result by the halftone center detection means. writing information to the center of the series of black pixels or white pixels for one pixel when the number of pixels in the halftone center detection pattern is odd, and for two pixels when the number is even; Based on the detection results stored in the first storage means, it is determined whether the predetermined region on the main scanning line is a halftone photograph region or a line drawing region depending on whether a certain period exists in the predetermined region on the main scanning line. An image characterized by comprising a determining means for making a determination, and a second storage means for storing a determination result by the determining means that the determination result is a halftone photographic area, giving priority to the determination result that the area is a line drawing area. area separation device.