JPS63142445U - - Google Patents
Info
- Publication number
- JPS63142445U JPS63142445U JP3378687U JP3378687U JPS63142445U JP S63142445 U JPS63142445 U JP S63142445U JP 3378687 U JP3378687 U JP 3378687U JP 3378687 U JP3378687 U JP 3378687U JP S63142445 U JPS63142445 U JP S63142445U
- Authority
- JP
- Japan
- Prior art keywords
- gear
- grandchild
- parent
- facing
- child
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Gear Transmission (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3378687U JPS63142445U (de) | 1987-03-10 | 1987-03-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3378687U JPS63142445U (de) | 1987-03-10 | 1987-03-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63142445U true JPS63142445U (de) | 1988-09-20 |
Family
ID=30841717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3378687U Pending JPS63142445U (de) | 1987-03-10 | 1987-03-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63142445U (de) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6304937B1 (en) | 1990-04-18 | 2001-10-16 | Rambus Inc. | Method of operation of a memory controller |
| US6324120B2 (en) | 1990-04-18 | 2001-11-27 | Rambus Inc. | Memory device having a variable data output length |
| US6684285B2 (en) | 1990-04-18 | 2004-01-27 | Rambus Inc. | Synchronous integrated circuit device |
-
1987
- 1987-03-10 JP JP3378687U patent/JPS63142445U/ja active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6304937B1 (en) | 1990-04-18 | 2001-10-16 | Rambus Inc. | Method of operation of a memory controller |
| US6324120B2 (en) | 1990-04-18 | 2001-11-27 | Rambus Inc. | Memory device having a variable data output length |
| US6426916B2 (en) | 1990-04-18 | 2002-07-30 | Rambus Inc. | Memory device having a variable data output length and a programmable register |
| US6452863B2 (en) | 1990-04-18 | 2002-09-17 | Rambus Inc. | Method of operating a memory device having a variable data input length |
| US6546446B2 (en) | 1990-04-18 | 2003-04-08 | Rambus Inc. | Synchronous memory device having automatic precharge |
| US6564281B2 (en) | 1990-04-18 | 2003-05-13 | Rambus Inc. | Synchronous memory device having automatic precharge |
| US6584037B2 (en) | 1990-04-18 | 2003-06-24 | Rambus Inc | Memory device which samples data after an amount of time transpires |
| US6684285B2 (en) | 1990-04-18 | 2004-01-27 | Rambus Inc. | Synchronous integrated circuit device |
| US6697295B2 (en) | 1990-04-18 | 2004-02-24 | Rambus Inc. | Memory device having a programmable register |
| US6751696B2 (en) | 1990-04-18 | 2004-06-15 | Rambus Inc. | Memory device having a programmable register |