JPS63140748U - - Google Patents

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Publication number
JPS63140748U
JPS63140748U JP3295487U JP3295487U JPS63140748U JP S63140748 U JPS63140748 U JP S63140748U JP 3295487 U JP3295487 U JP 3295487U JP 3295487 U JP3295487 U JP 3295487U JP S63140748 U JPS63140748 U JP S63140748U
Authority
JP
Japan
Prior art keywords
data
demodulation circuit
circuit
data demodulation
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3295487U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3295487U priority Critical patent/JPS63140748U/ja
Publication of JPS63140748U publication Critical patent/JPS63140748U/ja
Pending legal-status Critical Current

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  • Stereo-Broadcasting Methods (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の実施例を示したブロツク図
、第2図はRDSとARIシステムにおける副搬
送波の関係を示した模式図、第3図はRDSとA
RIシステムにおけるSDK信号のベースバンド
の関係を示したスペクトラム図、第4図は従来の
例を示したブロツク図である。 1……フロントエンド、2……中間周波増幅器
、3……FM検波器、4……FMマルチプレツク
ス回路、5……57KHzバンドパスフイルタ、
6……同期回路、7……データ復調回路、8……
クロツク再生回路、9……差分デコーダ、10…
…フイルタ。
Figure 1 is a block diagram showing an embodiment of this invention, Figure 2 is a schematic diagram showing the relationship between subcarriers in the RDS and ARI systems, and Figure 3 is a diagram showing the relationship between RDS and ARI systems.
FIG. 4 is a spectrum diagram showing the relationship between the basebands of SDK signals in the RI system, and FIG. 4 is a block diagram showing a conventional example. 1...Front end, 2...Intermediate frequency amplifier, 3...FM detector, 4...FM multiplex circuit, 5...57KHz bandpass filter,
6...Synchronization circuit, 7...Data demodulation circuit, 8...
Clock regeneration circuit, 9...Differential decoder, 10...
...filter.

Claims (1)

【実用新案登録請求の範囲】 (1) 放送中の番組内容を識別させるデータ信号
により振幅変調された副搬送波と音声信号とを周
波数変調して成るFM放送波を受信するFM多重
放送受信機において、前記FM放送波を復調し、
その復調されたコンポジツト信号を受けて前記副
搬送波の周波数に同期して同期信号を発生させる
同期信号発生回路と、この同期信号発生回路より
得られる同期信号により、前記コンポジツト信号
より番組内容を識別させるデータ列を復調するデ
ータ復調回路と、このデータ復調回路からのデー
タ列を受けてデータ用クロツクを再生するクロツ
ク再生回路と、このクロツク再生回路からのクロ
ツク信号により、前記データ復調回路からのデー
タ列を番組内容を識別させるラジオデータとして
復調させるデコーダとを具備し、前記データ復調
回路と、前記クロツク再生回路との間に異種放送
波によつて生ずる復調妨害低周波信号を遮断する
低域カツトフイルタ又は前記データ復調回路から
もたらされるデータ列のデータキヤリアのみを通
過させるバンドパスフイルタを挿入したことを特
徴とするFM多重放送受信機におけるデータ復調
回路。 (2) 前記低域カツトフイルタは、125Hz以
下の周波数を遮断するカツトオフ特性に成されて
いることを特徴とする実用新案登録請求の範囲第
1項記載のFM多重放送受信機におけるデータ復
調回路。 (3) 前記バンドパスフイルタは、1.1875
KHzを通過させるバンドパス特性に成されてい
ることを特徴とする実用新案登録請求の範囲第1
項記載のFM多重放送受信機におけるデータ復調
回路。
[Scope of Claim for Utility Model Registration] (1) In an FM multiplex broadcast receiver that receives FM broadcast waves formed by frequency-modulating subcarriers and audio signals that are amplitude-modulated by a data signal that identifies the content of the program being broadcast. , demodulating the FM broadcast wave,
A synchronization signal generation circuit receives the demodulated composite signal and generates a synchronization signal in synchronization with the frequency of the subcarrier, and the program content is identified from the composite signal using the synchronization signal obtained from the synchronization signal generation circuit. A data demodulation circuit that demodulates a data string; a clock regeneration circuit that receives a data string from this data demodulation circuit and regenerates a data clock; and a clock signal from this clock recovery circuit to generate a data string from the data demodulation circuit. a decoder for demodulating radio data as radio data for identifying program content; A data demodulation circuit in an FM multiplex broadcasting receiver, characterized in that a bandpass filter is inserted to pass only a data carrier of a data string provided from the data demodulation circuit. (2) The data demodulation circuit in an FM multiplex broadcast receiver according to claim 1, wherein the low-pass cut filter has a cut-off characteristic that blocks frequencies below 125 Hz. (3) The bandpass filter is 1.1875
Utility model registration claim 1 characterized in that it has a bandpass characteristic that allows KHz to pass through.
A data demodulation circuit in the FM multiplex broadcast receiver as described in 2.
JP3295487U 1987-03-06 1987-03-06 Pending JPS63140748U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3295487U JPS63140748U (en) 1987-03-06 1987-03-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3295487U JPS63140748U (en) 1987-03-06 1987-03-06

Publications (1)

Publication Number Publication Date
JPS63140748U true JPS63140748U (en) 1988-09-16

Family

ID=30840111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3295487U Pending JPS63140748U (en) 1987-03-06 1987-03-06

Country Status (1)

Country Link
JP (1) JPS63140748U (en)

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