JPS63138735U - - Google Patents
Info
- Publication number
- JPS63138735U JPS63138735U JP3211787U JP3211787U JPS63138735U JP S63138735 U JPS63138735 U JP S63138735U JP 3211787 U JP3211787 U JP 3211787U JP 3211787 U JP3211787 U JP 3211787U JP S63138735 U JPS63138735 U JP S63138735U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- tuner
- electronic tuner
- filter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Filters And Equalizers (AREA)
- Noise Elimination (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Description
第１図乃至第３図は本考案に係る電子チユーナ
の実施例を説明するためのもので、第１図は入力
フイルタの構成回路図、第２図は一軸入力型の電
子チユーナへの適用例を示す回路図、第３図は二
軸入力型の電子チユーナへの適用例を示す回路図
である。第４図は一軸入力型の電子チユーナの一
例を示す回路図、第５図は二軸入力型の電子チユ
ーナの一例を示す回路図、第６図は従来の電子チ
ユーナにおける入力フイルタを示す構成回路図で
ある。
２，９……アンテナ入力端子、５……ＶＨＦチ
ユーナ回路部、１１，１２……ＩＦトラツプ回路
、１４……入力フイルタ、１５……バンドパスフ
イルタ回路。
Figures 1 to 3 are for explaining an embodiment of the electronic tuner according to the present invention. Figure 1 is a configuration circuit diagram of an input filter, and Figure 2 is an example of application to a single-axis input type electronic tuner. FIG. 3 is a circuit diagram showing an example of application to a two-axis input type electronic tuner. Fig. 4 is a circuit diagram showing an example of a single-axis input type electronic tuner, Fig. 5 is a circuit diagram showing an example of a two-axis input type electronic tuner, and Fig. 6 is a configuration circuit showing an input filter in a conventional electronic tuner. It is a diagram. 2, 9...Antenna input terminal, 5...VHF tuner circuit section, 11, 12...IF trap circuit, 14...Input filter, 15...Band pass filter circuit.
Claims (1)
子との間に、ＩＦトラツプ回路及びバンドパスフ
イルタ回路とを一体構成した入力フイルタを挿入
したことを特徴とする電子チユーナ。 An electronic tuner characterized in that an input filter integrally configured with an IF trap circuit and a bandpass filter circuit is inserted between an input of a VHF tuner circuit section and an antenna input terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3211787U JPS63138735U (en) | 1987-03-04 | 1987-03-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3211787U JPS63138735U (en) | 1987-03-04 | 1987-03-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63138735U true JPS63138735U (en) | 1988-09-13 |
Family
ID=30838483
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3211787U Pending JPS63138735U (en) | 1987-03-04 | 1987-03-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63138735U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4743642B2 (en) * | 2007-12-25 | 2011-08-10 | 日本電波工業株式会社 | Oscillation module |
-
1987
- 1987-03-04 JP JP3211787U patent/JPS63138735U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4743642B2 (en) * | 2007-12-25 | 2011-08-10 | 日本電波工業株式会社 | Oscillation module |
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