JPS63137380A - Three-dimensional display device - Google Patents

Abstract

PURPOSE:To rapidly obtain cut graphic forms cut off on a cutting plane by storing the (z) values of respective picture elements on the cutting plane in a (z) memory correspondingly to (x), (y) coordinate values. CONSTITUTION:The (z) coordinate values of respective picture elements on a cutting plane in a three-dimensional space are stored in addresses of a 1st (z) memory 35 corresponding to the (x), (y) coordinate values. On the other hand, the (z) coordinate values of respective picture elements on a plane to be painted out are stored in addresses of a 2nd (z) memory 40 corresponding to the (x), (y) coordinate values. A luminance memory 37 stores the luminance values of respective picture elements on the plane to be painted out in addresses corresponding to the (x), (y) coordinate values. The three-dimensional coordinate values (x), (y), (z) of respective picture elements in respective planes approximate to a three-dimensional object to be cut off and their luminance values are respectively generated from an (x), (y) coordinate value generating circuit, a (z) coordinate value generating circuit 33 and a luminance generating circuit 34 to obtain cut graphic forms cut off on the cutting planes.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a three-dimensional display device suitable for cutting and displaying a three-dimensional object using a plane.

(Prior Art) In recent computer systems, graphic processing technology for displaying three-dimensional objects on color display monitors using the Rusk scan method has become very important.

This process basically proceeds as follows. (1) A three-dimensional object is approximated by a set of triangles in three-dimensional space as shown in Figure 2. In addition to triangles, surface division methods using planes such as trapezoids and quadrilaterals are also known. (2) Determine the coordinate values and brightness of each vertex of the triangle. (3) Each triangle is displayed (filled in) on a display monitor, for example, a CRT monitor. This display is based on the scan line that crosses two sides of the triangle and the intersection point P between the two sides, as shown in Figure 3.
approximate coordinate values of ai, P bl (xal, yal
, zal), (xbi, ybl.

P al,
This is performed by finding the approximate coordinate value and brightness of each pixel on the scan line connecting P bl by linear interpolation based on the approximate coordinate value and brightness of P al and P bi. This process (3) is performed in the three-dimensional display device shown in FIG. 4 as follows.

The control unit 11 of the three-dimensional display device shown in FIG.
From U, information (coordinate values, brightness) of each vertex of n triangles that approximate the three-dimensional object to be displayed is sequentially given for each triangle. Now, the triangle shown in Fig. 3 (ΔPi P2 P3
')'s vertex P1. P2. Coordinate values of P3 (xi, yl,
zl), (x2.y2゜z2), (x3,
ya, z3) and luminance ■1°.

12.13 is given to the control unit 11.

The control unit 11 first controls P2. Side Ea, which is a line segment connecting PL
, and P3. Regarding side Eb, which is a line segment connecting PL,
X when y increases by 1 (unit length).

Find the increase (unit increase) in z and I. Here, side E
The unit increment of x, z, I with respect to a is ΔXa.

Let ΔZa and ΔIa be Δxb, Δzb, and Δlb be the unit increments of x, z, and 1 regarding side Eb, and these can be obtained by the following calculations.

Δxa = (x2-xi) / (y2-yl)
Δza - (z2-zl) / (y2-yl)Δ
Ia - (I2-If) / (y2-yl)...
...(1) Δxb = (x3-xi) / (ya-yi
) Δzb − (z3 − zl ) / (ya − yl
)ΔIb intestine (13-If)/(ya-yl)
(2) The control unit 11 controls Δxa, Δza, ΔIa and Δxb,
When determining Δzb and Δlb, the x and y coordinate values xi and yl of the PL point, which is the apex of sides Ea and Eb, are sent to the x and y coordinate value generation circuit 12, and the 2-coordinate value xi is sent to the 2-coordinate value generation circuit 13. Then, the brightness It is set in the brightness generating circuit 14, and the circuits 12 to 14 are activated, and a write signal 15 is generated.

When each circuit 12 to 14 is activated by the control unit 11,
Each scan from the scan line (first scan line) passing through point pt (y coordinate value is yl) to the scan line (y2-y1+1 scan line) passing through 22 points (y coordinate value is y2), Approximate coordinate values and brightness of each pixel on the Yang line are generated as shown below.

First, regarding the first scan line, the only pixels on the line are those at the PL point, and the x, y coordinate value generation circuit 12
generates the X and Y coordinate values xi and yl of 21 points, the 2-coordinate value generation circuit 13 generates the 2-coordinate value zl of the PL point, and the brightness generation circuit 14 generates the brightness If of the PL point.

2 memories 1 for storing 2 coordinate values corresponding to x and y coordinate values
6 is addressed by the x,y coordinate values from circuit 12, thereby reading the binary value at that address location. The comparator 17 receives the binary values read from the 2 memories 1B and the 2 values read from the memory 1B.
Compare the binary values generated from the coordinate value generation circuit 13, and if the latter is smaller, that is, the binary values from the circuit 13 (new plane) are the binary values from the memory 1B (already created plane). If it is on the deeper side (the side where the surface is hidden), the output of the write permission signal 18 of logic "1" is refrained (i.e., the write permission signal 1
8 to logic “0”). When the write permission signal 18 is logic "0", the AND gate 19 outputs the 2 memories 16 regardless of the logic "1" write signal 15 from the control unit 11.
and refrains from outputting the write signal 2I to the brightness memory 20 (which stores I values corresponding to x, y coordinate values). As a result, the z and I values in the memory 16.20 specified by the Xr''l coordinate values from the circuit 12 are saved as they are.

On the other hand, if the binary value from circuit 13 is larger,
That is, when the binary value from the circuit 13 is earlier than the binary value from the 2 memory 16, the comparator 17 outputs the write permission signal 18 of logic m1'. As a result, X from circuit 12
The z and f values in the memory 16°20 specified by the +V coordinate value are rewritten to new binary I values (here zl, II) generated from the circuit 13.14.

For the second and subsequent scan lines, assuming that the target scan line is the i-th scan line, first the intersections Pa1 (left end of the i-th scan line) and Pb1 (right end of the i-th scan line) between the i-th scan line and the sides Ea and Eb are )
Coordinates xai, xbl, y coordinates yai, yb
i, z coordinates z al, z bi and brightness I
al.

Ibl is determined by the following formula.

x al -x a(1-1)+Δxaz af -z
a(f-1>+ΔzaI al-I aCl-1)
+ΔIax bl −x b (1-1)+Δxbz
bl=z b (1-1)+ΔzbI bI-1b(
1-υ+Δlb However, xalmxblmxl z al= z bl-Z I I al -1bl -11 (2) Both end points of the i-th scan line (P al, P bl
), and based on these coordinates and brightness, approximate coordinate values and brightness of each pixel on the i-th scan line are generated in order from the first pixel. For example, if the pixel at the left end (point Pa1) of the i-th scan line is the first pixel (first pixel), then the y-coordinate value y[j, the x-coordinate value of the j-th pixel (third pixel) on the i-th scan line Value X l
j, z tj, and I 1j are determined by the following formula.

y 1j-y 1 x [j= x 1 (j-1) + 1z ij=
z 1 (j-1) ten Δz1 ■ tj-I 1-1) + Δ1
1 However, xil-xal, zll-zal, 111-1
a11≦j≦(x bi −x ai+ 1 )Δz1
= (zbi-zai) / (xbi-xai)b
I i = (I bl −1al) / (xbi
-xal)...(3) In the above equation (3), Δzl and Δ11 indicate the rate at which the z value and ■ value increase, respectively, when X increases by 1 on the i-th scan line. .

Now, the coordinate value xlj of the third pixel on the i-th scan line
, yij are generated from the circuit 12, zij from the circuit 13, and brightness 11j from the circuit 14, respectively. As a result, for the third pixel on the i-th scan line, 2
The zfn in the memo 91B and the 1 value in the brightness memory 20 are updated in the same manner as in the case of the PI point described above. Then X
For the next pixel whose value is increased by +1 and denoted by j-j+1, x, y according to equation (3).

2 and I values are generated, 2 values in memory IB and ! in intensity memory 20. The value is updated. Eventually Pb1
When the above-mentioned update is performed for the point pixel, the filling and shading for the i-th scan line is completed, and the next scan line indicated by yl = yi +1 is filled by the same procedure as last time.

The above operation is repeated and passes through 22 points (y value is y2)
When the filling of the scan line is completed, the filling of the triangle (8 PI P2 P4) below the triangle (ΔPi P2 Pa) in FIG. 3 is completed. Next, by filling in the upper triangle (ΔP2 P3P4) in the same way as the lower triangle, the triangle (ΔPi P2 P2
The 2°I value of each pixel in P3) is updated in memory 16.20. The contents of the brightness memory 20 are read out to the CRT monitor 23 by the display timing circuit 22 and displayed on the screen.

By the way, in the three-dimensional display device shown in FIG. 4, the three-dimensional display device shown in FIG.
As shown in FIG. 5(b), the plane M (the three-dimensional object) is cut by the plane (cutting plane) S, and the cut surface m (the three-dimensional object) is displayed as shown in FIG. 5(b). There is. In this case, conventionally, the point P where the plane M and the plane S intersect
5. After calculating the coordinates and brightness of P(i), the cut plane m(Pi P2 P5 P6 ) was divided into triangles Pi P2P6 and P2 P5 P8, for example, and processed in the manner described above. However, in order to find the above-mentioned intersection point, calculation is required to solve the equation of the surface represented by 2-αX+βy+γ.

Furthermore, since three-dimensional objects are generally divided into hundreds to thousands of small planes, there is a problem in that it takes a great deal of time to calculate the intersections of the cut planes, resulting in slow display.

(Problems to be Solved by the Invention) As described above, in conventional three-dimensional display devices, in order to cut a three-dimensional object along a plane and display the cut plane, a large number of planes that approximate the three-dimensional object are used. Since all the intersection points between the plane and the cutting plane have to be calculated, there is a drawback that high-speed display cannot be performed.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a three-dimensional display device that can display a cut plane of a three-dimensional object at high speed.

[Structure of the invention] (Means and effects for solving the problem) In this invention,
The two coordinate values of each pixel of the cutting plane in three-dimensional space are
, a twelfth memory that stores the two coordinate values of each pixel on the plane to be filled in at the address corresponding to the x, y coordinate value;
A 22nd memory stores the brightness (■) of each pixel of the plane to be filled in at the address corresponding to the y-coordinate value, and its X.

a brightness memory for storing at an address corresponding to the y-coordinate value;
First and second comparators are provided. The first comparator is
X generated from the coordinate value generation circuit.

The y coordinate value of the pixel in the plane to be filled, x, y
2 coordinate values in the 12th memory indicated by the coordinate values and 2 of the same pixel
The second comparator compares the size with the coordinate value, and the second comparator
, the two coordinate values in the 22nd memory indicated by the y coordinate value are compared with the two coordinate values of the same pixel. This first and second
Based on the comparison result of the comparator, it is determined whether to allow or prohibit writing of the two coordinate values of the pixel in the plane to be filled into the 22nd memory and writing of the luminance of the same pixel to the luminance memory. According to the above configuration, if the binary value of each pixel of the cutting plane is stored in the 12th memory in correspondence with its By simply generating the three-dimensional coordinate values X+Y+Z and the luminance I of each pixel on the plane, it is possible to obtain the cut figure cut by the cutting plane in the luminance memory.

(Embodiment) FIG. 1 shows a block configuration of a three-dimensional display device according to an embodiment of the present invention. In the figure, 31 is a control unit that manages the entire device, and 32 is a control unit that sequentially generates the x and y coordinates of each pixel on a plane in three-dimensional space (three-dimensional plane) (x in Figure 4).
, y coordinate value generation circuit 33 (same as the two coordinate value generation circuit 12) sequentially generates two coordinates of each pixel on a three-dimensional plane (same as the two coordinate value generation circuit 13 in FIG. 4). The two-coordinate value generation circuit 34 is a luminance generation circuit (similar to the luminance generation circuit 14 in FIG. 4) that sequentially generates the luminance (color intensity) (2) of each pixel on a three-dimensional plane. 35 is a two-coordinate value generation circuit 33
2 memory (similar to the 2 memory IB in FIG. 4) stores 2 coordinate values generated from the luminance generation circuit 34 in response to a write signal 36 output from an AND gate 50, which will be described later. This is a brightness memory (similar to the brightness memory 20 in FIG. 4) that stores the brightness I in response to the write signal 36 described above. 2 memory 35 and brightness memory 37 are both
, y-coordinate value. 38 is a CRT monitor that displays the contents of the brightness memory 37, and 39 is a display timing circuit.

Reference numeral 40 denotes two coordinate values generated from the two coordinate value generation circuit 33, and an X value generated from the y coordinate value generation circuit 32.

This is a 2-memory in which data is written to the address indicated by the y-coordinate value in response to a write signal 41 output from an AND gate 53, which will be described later. The two memories 40 are used to store two coordinate values of each pixel on a cutting plane in three-dimensional space. 42 is the two-coordinate value generated from the two-coordinate value generation circuit 33 and (x,
A comparator 43 compares the magnitude of the 2 coordinate values read from the 2 memory 35 (by addressing the X and y coordinate values from the y coordinate value generation circuit 32); This is a comparator that compares the coordinate value with two coordinate values read from the two memories 40 (by addressing the x, y coordinate values from the x, y coordinate value generation circuit 32).

44 is, for example, a 4×4 bit pattern (semi-transparent pattern) used for displaying a watermark to display a part of the cut surface.
This is a pattern memory that stores .

This pattern memory 44 is connected to the x, y coordinate value generation circuit 32.
x+ generated from! Addresses are specified by the lower two bits of each coordinate value. 45 is a mode register (MODE) that specifies whether or not to use the pattern in the pattern memory 44; 46 is a comparison result of comparators 42 and 43 that specifies whether or not writing to the 2 memories 35 and the brightness memory 37 is permitted; This is a write permission determination circuit that makes a determination according to the pattern bit from the pattern memory 44 and the designation of the mode register 45, and generates a write permission signal 47 according to the determination result. 4B is a write permission signal 49 outputted from the control section 31, which specifies whether or not to permit writing to the 2 memories 35 and the brightness memory 37 regardless of the judgment result of the write permission judgment circuit 46; An OR gate 50 which takes an OR with the write permission signal 47 from the circuit 4B, a write permission signal 51 output from the control unit 81 to permit writing to the two memories 35 and the brightness memory 37, and a write output from the control unit 31; An AND gate 53 calculates the logical product of the signal 52 and the output signal of the OR gate 48, and 53 is the logic of the write signal 52 from the control unit 31 and the write permission signal 54 output from the control unit 31 to permit writing to the memory 40. It is an AND gate that takes the product. The output signal of AND gate 50.53 is used as the write signal 36.41.

Next, the operation of the configuration shown in FIG. 1 is performed by cutting a plane M (a three-dimensional object having a three-dimensional object) with a plane S (cutting plane S) as shown in FIG. ), the case where the cut plane m (a three-dimensional object) is displayed will be explained as an example.

First, the control unit 31 controls two memories 35 and a brightness memory 37.
A write permission signal 51 of logic “1” indicating permission to write to the memory 40, a write permission signal 49 of logic “1°” specifying that the judgment result of the write permission judgment circuit 46 is ignored, and a write permission signal 49 of logic “1°” indicating permission to write to the memory 40. Write enable signal 5 with logic “1”
4 and a write signal 52 of logic "1°".As a result, the AND gate 50 outputs a (active) write signal 3G of logic "1#", and the 2 memory 35 and the brightness memory 37 are enabled for writing. set to state. Also, a write signal 41 of logic "1" is output from the AND gate 53, and the 2 memory 40 is set to a writable state. The control unit 31 initializes the memories 35, 37, and 40 while maintaining this state, that is, while continuing to output the write permission signals 49, 51, 54 and the write signal 52.

Initialization of the 2-memory 35.40 means writing the minimum value of the 2-coordinate values to each address, and the luminance memory 37.
Initialization means writing the minimum value of brightness I to each address. For this writing, the memories 35, 3
In order to initialize 7.40, one plane in which the 2 coordinate values and the luminance I are the minimum values at all XrY coordinate positions is generated by the X+V coordinate value generation circuit 32.2 coordinate value generation circuit 33
The brightness may be generated using the brightness generation circuit 34.

Next, the control unit 31 performs a control operation to store the two coordinate values of the cutting plane S in the two memories 40. First, control section 3
1 outputs a write signal 52 of logic "1" and a write permission signal 54 to set the memory 2 40 in a writable state, and also sets the write permission signal 51 to logic ``0''.
The memory 35 and the brightness memory 37 are set to a write-inhibited state. Then, while maintaining this state, the control unit 31
x, y coordinate value generation circuit 32 and 2 coordinate value generation circuit 33
The figure of the cutting plane S is generated using Then, for each pixel on the cutting plane S, its x and y coordinate values are
The IV coordinate value generation circuit 32 generates the 2-coordinate value, and each time the 2-coordinate value is generated from the 2-coordinate value generation circuit 33, the 2-coordinate value is written to the address of the 2-memory 40 specified by the x and y coordinate values. be included. This operation is performed for all pixels on the cutting plane S, so that the two-coordinate values of all pixels on the cutting plane S become the same as that X.

2 memory 40 corresponding to the y-coordinate value.

The control unit 31 controls the cutting plane S (2) for the 2 memories 40.
When writing of the coordinate values is completed, the write enable signal 54 is set to logic "0" to set the memory 2 40 in a write-inhibited state. Further, the control unit 31 sets the write permission signal 49 to a logic “
0" and outputs a write permission signal 51 and a write signal 52 of logic "1" so that the 2 memory 35 enters a writable state in accordance with the determination result of the write permission determination circuit 46.

Next, the control unit 31 uses the x, y coordinate value generation circuit 32, the coordinate value generation circuit 33, and the brightness generation circuit 34 to calculate n planes that approximate the three-dimensional object to be cut by the cutting plane S. , the x and y coordinate values and the brightness I of each pixel on the corresponding plane are generated for each plane in the same way as in the conventional method. Now, 1
x, y of pixels on two planes (planes to be filled)
The coordinate values are generated from the x, y coordinate value generation circuit 32,
It is assumed that the 2-coordinate value (znev) is generated from the 2-coordinate value generation circuit 33 and the luminance ■ is generated from the luminance generation circuit 34. 2 memory 35.40 is the X, y coordinate value generation circuit 32
The address is specified by the x,y coordinate values from . As a result, the two coordinate values (zold, zs) written at the corresponding address are read from the two memories 35 and 40. The comparator 42 receives the two coordinate values (zold) from the two memory 35 and the two coordinate values (z now
) and notifies the write permission determination circuit 4B of the comparison result. Further, the comparator 43 compares the two coordinate values (ZS) from the two memory 40 with the two coordinate values (z new) from the two coordinate value generation circuit 33, and sends the comparison result to the write permission determination circuit. 46.

The write permission determination circuit 4B considers not only the comparison result of the comparator 42 but also the comparison result of the comparator 43, the specified contents of the mode register 45, and the pattern bits from the pattern memory 44, It is determined whether writing is permitted or not as shown below.

(A) When znew < zold In this case, the write permission judgment circuit 4B determines that the newly generated figure is behind the previously created figure (farthest from the human eye). The write permission signal 47 is set to logic " to prohibit writing of newly generated shapes."
Set to 0".

(B) When znov≧z old and znev zS In this case, the write permission judgment circuit 4B determines that the newly generated figure is on the front side (closer to the human eye) of the previously created figure, and It is determined that the cutting plane S is on the back side, and the write permission signal 47 is set to logic "1#" in order to permit writing of the newly generated figure.

(C) znev≧z old and”) Z new≧zs
In this case, the write permission judgment circuit 4B determines that the newly generated figure is on the nearer side (closer to the human eye) of the previously created figure, and is also in front of the cutting plane S. to decide. At this time, if the use of the semi-transparent pattern in the pattern memory 44 is prohibited by the mode register 45, the write permission determination circuit 4B sends a write permission signal 47 to prohibit writing of the newly generated figure.
is set to logic “0”. On the other hand, if the use of a semi-transparent pattern is specified, the write permission determination circuit 4B determines x.

According to the state (on/off state) of the translucent pattern bits that are cyclically read out in bits from the pattern memory 44 by addressing the lower two bits of each of the x and y coordinate values from the y coordinate value generation circuit 32. Then, the write enable signal 47 is set to logic a1" or "0°.

Write permission signal 4 of logic 1111+ or logic “0” output according to the judgment of the above write permission judgment circuit 46
7, the 2 memory 35 and the brightness memory 37 are set to a writable state or a writable state. And 2
Only when the memory 35 and the brightness memory 37 are set to a writable state, the x,
2 memories specified by the y-coordinate value 35. The already written 2 coordinate value (zold) of the address of the brightness memory 37, the brightness I is
2-coordinate value (znew) from the 2-coordinate value generation circuit 33, luminance from the luminance generation circuit 34! will be updated respectively. By repeating the above operations, a cut shape as shown in FIG. 5(b) can be easily obtained.

[Effects of the Invention] As detailed above, according to the present invention, by storing the binary values of each pixel of the cutting plane in the twelfth memory in correspondence with its x and y coordinate values, it is possible to For each plane that approximates a three-dimensional object, the three-dimensional coordinate value X* of each pixel on the corresponding plane
By simply generating 'l*Z and the brightness I, a cut figure cut by the cutting plane can be obtained at high speed, so that the display of the cut plane of a three-dimensional object can be speeded up.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a three-dimensional display device according to an embodiment of the present invention, and Fig. 2 shows a state in which a three-dimensional object is approximated by a set of planes in three-dimensional space for displaying the same object. Figure 3 is a diagram for explaining the procedure for filling in one of the many planes that approximate a three-dimensional object, Figure 4 is a block diagram of a conventional three-dimensional display device, and Figure 5 is a diagram showing a three-dimensional object. It is a figure explaining cutting of. 31...control unit, 32...x, y coordinate value generation circuit,
33...2 coordinate value generation circuit, 34...luminance generation circuit, 35.40...2 memory, 37...luminance memory,
38...CRT monitor, 42, 43...Comparator, 4
6...Writing permission judgment circuit, 50°53...And gate. Applicant's representative Patent attorney Takehiko Suzue Figure 2 R (x+, y+, z+ mountain) Figure 3 Figure 4

Claims (1)

[Claims] In a three-dimensional display device in which a three-dimensional object is approximated by a set of planes in a three-dimensional space, and for each plane, the three-dimensional coordinate values x, y, z and luminance I of each pixel of the corresponding plane are determined and a filling process is performed. , a coordinate value generation circuit that sequentially generates the x, y, and z coordinate values of each pixel of the plane to be filled or the plane for cutting; and the luminance I of each pixel of the plane to be filled is generated from the coordinate value generation circuit. A brightness generation circuit generates a luminance corresponding to the x, y, and z coordinate values to be generated, and when the coordinate value generation target plane of the coordinate value generation circuit is the cutting plane, a first write signal is outputted, and the first write signal is outputted, a control means for outputting a second write signal in the case of a plane; and a memory addressed by x and y coordinate values generated from the coordinate value generation circuit, the z coordinate value being generated from the coordinate value generation circuit. a first z memory for storing the following information in response to the first write signal from the control means; and a memory addressed by x and y coordinate values generated from the coordinate value generation circuit, the memory being addressed by the x and y coordinate values generated from the coordinate value generation circuit. z generated
a second z memory that stores coordinate values in response to a third write signal; and a memory that is addressed by the x and y coordinate values generated from the coordinate value generation circuit, and which stores the luminance I generated from the luminance generation circuit as described above. The luminance memory stored by the third write signal, the z coordinate value of the address position of the first z memory specified by the x, y coordinate values generated from the coordinate value generation circuit, and the z value generated from the coordinate value generation circuit. a first comparator that compares the magnitude with the coordinate value, and the second z specified by the x, y coordinate value generated from the coordinate value generation circuit.
a second comparator that compares the z-coordinate value of the address position of the memory with the z-coordinate value generated from the coordinate value generation circuit; and a write permission signal according to the comparison result of the first and second comparators. and outputting the second write signal from the control means as the third write signal to the second z memory and the luminance memory in response to the write permission signal from the write permission signal generation circuit. A three-dimensional display device comprising a write enable/disable gate circuit.