JPS63134748U - - Google Patents
Info
- Publication number
- JPS63134748U JPS63134748U JP1987028450U JP2845087U JPS63134748U JP S63134748 U JPS63134748 U JP S63134748U JP 1987028450 U JP1987028450 U JP 1987028450U JP 2845087 U JP2845087 U JP 2845087U JP S63134748 U JPS63134748 U JP S63134748U
- Authority
- JP
- Japan
- Prior art keywords
- power line
- common power
- light emitting
- printer head
- emitting diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Exposure Or Original Feeding In Electrophotography (AREA)
- Dot-Matrix Printers And Others (AREA)
- Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987028450U JPS63134748U (enExample) | 1987-02-26 | 1987-02-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987028450U JPS63134748U (enExample) | 1987-02-26 | 1987-02-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63134748U true JPS63134748U (enExample) | 1988-09-05 |
Family
ID=30831422
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987028450U Pending JPS63134748U (enExample) | 1987-02-26 | 1987-02-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63134748U (enExample) |
-
1987
- 1987-02-26 JP JP1987028450U patent/JPS63134748U/ja active Pending