JPS63131437U - - Google Patents
Info
- Publication number
- JPS63131437U JPS63131437U JP2293587U JP2293587U JPS63131437U JP S63131437 U JPS63131437 U JP S63131437U JP 2293587 U JP2293587 U JP 2293587U JP 2293587 U JP2293587 U JP 2293587U JP S63131437 U JPS63131437 U JP S63131437U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- clock signal
- output
- outputs
- pcm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Dc Digital Transmission (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2293587U JPS63131437U (me) | 1987-02-20 | 1987-02-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2293587U JPS63131437U (me) | 1987-02-20 | 1987-02-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63131437U true JPS63131437U (me) | 1988-08-29 |
Family
ID=30820791
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2293587U Pending JPS63131437U (me) | 1987-02-20 | 1987-02-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63131437U (me) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6775275B2 (en) | 1997-11-25 | 2004-08-10 | Nec Corporation | Matrix switch method and device |
-
1987
- 1987-02-20 JP JP2293587U patent/JPS63131437U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6775275B2 (en) | 1997-11-25 | 2004-08-10 | Nec Corporation | Matrix switch method and device |