JPS63121978U - - Google Patents
Info
- Publication number
- JPS63121978U JPS63121978U JP1395987U JP1395987U JPS63121978U JP S63121978 U JPS63121978 U JP S63121978U JP 1395987 U JP1395987 U JP 1395987U JP 1395987 U JP1395987 U JP 1395987U JP S63121978 U JPS63121978 U JP S63121978U
- Authority
- JP
- Japan
- Prior art keywords
- control voltage
- variable capacitance
- broadcast band
- capacitance diode
- television tuner
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 7
Description
第1図は、本考案のテレビチユーナのFM放送
帯域減衰回路の一実施例の回路図であり、第2図
は、第1図の減衰特性を示す図であり、第3図は
、本考案の他の実施例の回路図であり、第4図は
、第3図の減衰特性を示す図であり、第5図は、
アメリカで使用されるテレビチユーナのブロツク
回路図であり、第6図は、従来のテレビチユーナ
のFM放送帯域減衰回路の回路図であり、第7図
は、第6図の減衰特性を示す図である。
40:信号線路、41:第1の可変容量ダイオ
ード、45:並列共振回路、47:第2の可変容
量ダイオード、49:直列共振回路、50,51
,53〜56,58,59:抵抗、52:第1の
制御電圧端子、57:第2の制御電圧端子。
FIG. 1 is a circuit diagram of an embodiment of the FM broadcast band attenuation circuit of the television tuner of the present invention, FIG. 2 is a diagram showing the attenuation characteristics of FIG. 1, and FIG. FIG. 4 is a diagram showing the attenuation characteristics of FIG. 3, and FIG. 5 is a circuit diagram of another embodiment.
6 is a block circuit diagram of a television tuner used in the United States, FIG. 6 is a circuit diagram of an FM broadcast band attenuation circuit of a conventional television tuner, and FIG. 7 is a diagram showing the attenuation characteristics of FIG. 6. 40: Signal line, 41: First variable capacitance diode, 45: Parallel resonant circuit, 47: Second variable capacitance diode, 49: Series resonant circuit, 50, 51
, 53 to 56, 58, 59: resistor, 52: first control voltage terminal, 57: second control voltage terminal.
Claims (1)
む並列共振回路を介装し、前記信号線路と接地間
に第2の可変容量ダイオードを含む直列共振回路
を介装し、これらの並列および直列共振回路でF
M放送帯域を減衰し、前記第1および第2の可変
容量ダイオードに高抵抗を介してそれぞれ制御電
圧を印加することを特徴とするテレビチユーナの
FM放送帯域減衰回路。 (2) 前記第1の可変容量ダイオードに第1の制
御電圧端子に印加される制御電圧を高抵抗で分圧
して印加し、前記第2の可変容量ダイオードに第
2の制御電圧端子に印加される制御電圧を高抵抗
で分圧して印加し、前記第1と第2の制御電圧端
子を抵抗で接続し、前記第1と第2の制御電圧端
子のいずれか一方に選択的に同電圧の制御電圧を
印加することを特徴とする実用新案登録請求の範
囲第1項記載のテレビチユーナのFM放送帯域の
減衰回路。[Claims for Utility Model Registration] (1) A parallel resonant circuit including a first variable capacitance diode is interposed in the signal line, and a series resonant circuit including a second variable capacitance diode is interposed between the signal line and ground. F in these parallel and series resonant circuits.
An FM broadcast band attenuation circuit for a television tuner, characterized in that the FM broadcast band attenuation circuit for a television tuner attenuates the M broadcast band and applies control voltages to the first and second variable capacitance diodes through high resistances. (2) The control voltage applied to the first control voltage terminal is divided by a high resistance and applied to the first variable capacitance diode, and the control voltage applied to the second control voltage terminal is applied to the second variable capacitance diode. The first and second control voltage terminals are connected by a resistor, and the same voltage is selectively applied to either one of the first and second control voltage terminals. An attenuation circuit for an FM broadcast band of a television tuner according to claim 1, characterized in that a control voltage is applied thereto.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1395987U JPS63121978U (en) | 1987-02-02 | 1987-02-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1395987U JPS63121978U (en) | 1987-02-02 | 1987-02-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63121978U true JPS63121978U (en) | 1988-08-08 |
Family
ID=30803506
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1395987U Pending JPS63121978U (en) | 1987-02-02 | 1987-02-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63121978U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5016430A (en) * | 1973-06-08 | 1975-02-21 | ||
JPS5895418A (en) * | 1981-12-01 | 1983-06-07 | Matsushita Electric Ind Co Ltd | Electronic tuning tuner |
JPS6010907A (en) * | 1983-06-30 | 1985-01-21 | Jeol Ltd | Phase shift circuit |
-
1987
- 1987-02-02 JP JP1395987U patent/JPS63121978U/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5016430A (en) * | 1973-06-08 | 1975-02-21 | ||
JPS5895418A (en) * | 1981-12-01 | 1983-06-07 | Matsushita Electric Ind Co Ltd | Electronic tuning tuner |
JPS6010907A (en) * | 1983-06-30 | 1985-01-21 | Jeol Ltd | Phase shift circuit |
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