JPS631203U - - Google Patents
Info
- Publication number
- JPS631203U JPS631203U JP9355386U JP9355386U JPS631203U JP S631203 U JPS631203 U JP S631203U JP 9355386 U JP9355386 U JP 9355386U JP 9355386 U JP9355386 U JP 9355386U JP S631203 U JPS631203 U JP S631203U
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- control device
- schedule control
- equipment
- inrush current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Supply And Distribution Of Alternating Current (AREA)
Description
第１図ａ，ｂはこの考案の一実施例による構成
とＲＡＭ内に格納されたテーブルの説明図、第２
図ａ，ｂは運転制御装置の回路図とその動作波形
図、第３図はこの考案の一実施例による動作フロ
ーチヤート、第４図は停電時の起動パルスのタイ
ムチヤート、第５図は従来例の起動パルス出力の
タイムチヤートである。
図において、１はマイクロコンピユータ、１ｃ
はＲＡＭ、１Ａ〜ｎＡは設備１〜ｎに対する起動
指令、１Ｂ〜ｎＢは設備１〜ｎに対する停止指令
、なお、各図中、同一符号は同一又は相当部分を
示す。
Figures 1a and b are explanatory diagrams of the configuration and tables stored in the RAM according to one embodiment of this invention;
Figures a and b are a circuit diagram of the operation control device and its operating waveform diagram, Figure 3 is an operation flowchart according to an embodiment of this invention, Figure 4 is a time chart of a starting pulse during a power outage, and Figure 5 is a conventional This is a time chart of an example starting pulse output. In the figure, 1 is a microcomputer, 1c
1A to nA are start commands for the equipment 1 to n, and 1B to nB are stop commands for the equipment 1 to n. In each figure, the same reference numerals indicate the same or equivalent parts.
Claims (1)
ブルを記憶手段に備えたマイクロコンピユータを
有するスケジユール制御装置において、停電後復
電時の各設備への突入電流継続時間を記憶してな
るテーブルを上記記憶手段に備え、各設備の突入
電流継続時間に応じた時間経過後後続の設備を運
転制御することを特徴とするスケジユール制御装
置。 (2) 設備の運転制御は、ＯＮパルスによつて起
動しＯＦＦパルスによつて停止制御し、該ＯＮパ
ルスとＯＦＦパルスは重ならないようにすること
を特徴とする実用新案登録請求の範囲第１項記載
のスケジユール制御装置。 (3) 突入電流継続時間は数種類の中から選択設
定することを特徴とする実用新案登録請求の範囲
第１項又は第２項記載のスケジユール制御装置。[Scope of Claim for Utility Model Registration] (1) In a schedule control device having a microcomputer whose storage means is equipped with a table for controlling the operation of multiple facilities in a predetermined order, inrush current continues to flow to each facility when power is restored after a power outage. A schedule control device, characterized in that the storage means is provided with a table storing time, and the operation of subsequent equipment is controlled after a period of time corresponding to the inrush current duration of each equipment has elapsed. (2) Utility model registration claim 1, which is characterized in that the operation control of the equipment is started by an ON pulse and stopped by an OFF pulse, and the ON pulse and the OFF pulse are not overlapped. The schedule control device described in Section 1. (3) The schedule control device according to claim 1 or 2, wherein the inrush current duration time is selected from among several types.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9355386U JPS631203U (en) | 1986-06-19 | 1986-06-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9355386U JPS631203U (en) | 1986-06-19 | 1986-06-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS631203U true JPS631203U (en) | 1988-01-07 |
Family
ID=30956222
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9355386U Pending JPS631203U (en) | 1986-06-19 | 1986-06-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS631203U (en) |
-
1986
- 1986-06-19 JP JP9355386U patent/JPS631203U/ja active Pending
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