JPS63114505U - - Google Patents

Info

Publication number
JPS63114505U
JPS63114505U JP625287U JP625287U JPS63114505U JP S63114505 U JPS63114505 U JP S63114505U JP 625287 U JP625287 U JP 625287U JP 625287 U JP625287 U JP 625287U JP S63114505 U JPS63114505 U JP S63114505U
Authority
JP
Japan
Prior art keywords
carrier wave
delay circuit
variable delay
input
detects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP625287U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP625287U priority Critical patent/JPS63114505U/ja
Publication of JPS63114505U publication Critical patent/JPS63114505U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Networks Using Active Elements (AREA)
JP625287U 1987-01-20 1987-01-20 Pending JPS63114505U (pt)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP625287U JPS63114505U (pt) 1987-01-20 1987-01-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP625287U JPS63114505U (pt) 1987-01-20 1987-01-20

Publications (1)

Publication Number Publication Date
JPS63114505U true JPS63114505U (pt) 1988-07-23

Family

ID=30788595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP625287U Pending JPS63114505U (pt) 1987-01-20 1987-01-20

Country Status (1)

Country Link
JP (1) JPS63114505U (pt)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005104364A1 (ja) * 2004-04-19 2005-11-03 Matsushita Electric Industrial Co., Ltd. 群遅延調整回路、群遅延調整システムおよび群遅延調整方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005104364A1 (ja) * 2004-04-19 2005-11-03 Matsushita Electric Industrial Co., Ltd. 群遅延調整回路、群遅延調整システムおよび群遅延調整方法

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