JPS63111558A - Data transmission system - Google Patents

Abstract

PURPOSE:To improve the processing capacity of a data transmission system by using an idle area counter showing the number of data receivable areas and to minimize the overhead of the overall inter-processor communication of the system. CONSTITUTION:An electronic exchange system comprises a central processing unit 1, a communication hardware buffer 2, a terminal controller 3 and an input/output device 4. The unit 1 contains a user area 11, an OS transmission buffer 12, an OS reception buffer 13, a data reception process 14, a data transmission process 15, the idle area counter 16, an auxiliary idle area counter 17, an application process 18, and a supervisor call 19. The counter 16 is set at the maximum value with the overall inter-processor overhead of the system minimized for the data having priority set to its processing capacity. While the value of the counter 16 is minimized together with the minimized executing time for inter-processor communication for the data requiring the real time properties.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to inter-processor communication between a central processing unit and a plurality of terminal processing units, and particularly relates to a data transmission method that satisfies both real-time performance and processing performance. Regarding.

[Conventional technology]

Conventionally, the inter-processor communication method was disclosed in Japanese Patent Application Laid-open No. 1160-1983
As described in No. 64, distributed processing was performed on the sending side and the receiving side to improve the overall processing time.

However, for data that requires real-time performance, no consideration has been given to completing data processing within the response time.

(I:J!Ii point that J?'ming tries to solve) The above conventional technology does not take into consideration the point of efficiently executing data that requires real-time performance within a certain period of time, and the input/output There has been a problem that the response time of the device cannot be satisfied.An object of the present invention is to satisfy the response time of the input/output device without reducing the processing capacity.

[Means for solving problems]

The above purpose is to provide an empty area counter that indicates the number of areas in which data can be received, and in the case of data that requires processing, to maximize the empty area counter and minimize the overhead of communication between processors in the entire system. This is achieved by maximizing the processing capacity, minimizing the empty area counter, and minimizing the execution time of the interprocessor communication process in the case of data requiring real-time performance.

[Effect]

An empty area counter is provided that indicates the area in which the central processing unit receives data from the terminal processing unit and the number of receivable areas.

In the case of data that requires real-time performance, the empty area counter is set to the minimum value, that is, the number of data that can be received from the terminal processing device is set to the minimum, and after data reception is completed, that is, the number of data that can be received from the terminal processing device is By executing the application process, real-time performance is increased, and in the case of data that requires processing power, the empty area counter is maximized and data from the terminal processing device is received as many messages as possible at a time. In other words, the processing capacity is maximized by minimizing the overhead when receiving data.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1 and subsequent figures, taking an electronic exchange system as an example.

FIG. 1 is a system configuration diagram of an electronic exchange system.

The electronic exchange system consists of a central processing unit 1. a communication hardware buffer 2. It is composed of a terminal control device 3 and an input/output device 4.

The central processing unit l has a user area 11. O8 transmission buffer 12. O8 receive buffer 13. Data reception process 1
4. Data transmission process 15. Empty area counter 16.
It consists of an auxiliary free area counter 17, an application process 18, and a supervisor call 19.

The empty area counter 16 is a counter that indicates how many empty areas there are in the O8 reception buffer I3.

The auxiliary empty area counter 17 is controlled by the data receiving process 14.
is a counter that refers to the number of empty areas in the O8 reception buffer 13, and by forcibly setting the auxiliary empty area counter 13 to 0 or the minimum allowable value, data processing that requires real-time processing is supported. do.

The communication hardware buffer 2 includes a hardware transmission buffer 21 and a hardware reception buffer 22.

Next, a data transfer method between the central processing unit 1 and the terminal control unit 3 in the electronic switching system will be described.

When the terminal control device 3 receives data from the input/output device 4, the terminal control device 3 transfers the received data to the communication hardware buffer 2.
is written to the hardware reception buffer 22 of. (Processing 50
) Meanwhile, the central processing unit 1 uses a timer interrupt.

Start the data receiving process 14. The data reception process 14 sends data to the hardware reception buffers 22 of all communication hardware 3 buffers 2.

It is determined whether there is received data, and if there is received data, the auxiliary empty area counter 17 of the O8 receiving buffer 13 is referred to, and only the amount of the auxiliary empty area counter 17 is transferred from the hardware receiving buffer 22 to the O8 receiving buffer 13. Transfer received data.

(Process 51) After the execution of the data receiving process 14 is completed, control is transferred to the application process 18.

The application process 18 transfers the data stored in the O8 reception buffer 13 to the user area 11 by a supervisor call 19. (Processing 52) The application process 18 processes the received data.

Next, the case where the central processing unit 1 transfers data to the terminal control device will be described. The application process 18 transfers the data to be transferred to the user area 11.
, and by issuing a supervisor call 19, the data is transferred from the user area 11 to the O8 transmission buffer 12.

(Process 53) The central processing unit 1 interrupts the execution of the application process 18 and starts the data transmission process 15 by a timer interrupt.

The data transmission process 15 writes all the data stored in the O8 transmission buffer 12 to the hardware transmission buffer 22 of the communication hardware buffer 2. (
Process 54) When the terminal control device 3 has data in the hardware transmission buffer 22 of the communication hardware buffer 2, it transfers the data to the input/output device 4. (Process 55) Here, when the central processing unit 1 receives data from the terminal control device 3,
How to satisfy the specified response time and maximize the system processing capacity will be described using FIG.

First, application process 1 is interrupted by a timer interrupt.
8 and starts the data receiving process 14.

The data receiving process 14 receives the auxiliary sky area counter 17.
With reference to , it is determined whether the auxiliary empty area counter 17 is 0 or not. (Block 60) Auxiliary empty area counter 17 is O
If so, the data reception process 14 is terminated because there is no empty area in the O8 reception buffer 13 and because data reception requires real-time processing. (Block 61) If the auxiliary empty area counter 17 is not 0, there is an empty area in the O8 reception buffer 13, so it is determined whether there is reception data in the hardware reception buffer 22 of the communication hardware buffer 2. (Block 62) If there is no received data in the hardware reception buffer 22 of the communication hardware buffer 2, the hardware reception buffer 22 of another communication hardware buffer 2 is scanned. (Hardware buffer 2 for block communication
If there is received data, it is transferred from the hardware reception buffer 22 of the 1 communication hardware buffer 2 to the ○S reception buffer. (Block 64) Then, since one area of the O8 reception buffer has been used, the empty area counter 16 is decremented by (-1).

(Block 65) Finally, the data stored in the O8 reception buffer 13 is
Determine whether real-time performance is required.

(Block 66) If the data does not require real-time performance, the value of the empty area counter 16 is set in the auxiliary empty area counter 17. This is because the data receiving process 14 correctly refers to the number of empty areas in the O8 receiving buffer. (Block 67
) On the other hand, in the case of data that requires real-time processing, the value of the auxiliary empty area counter 17 referred to by the data receiving process 14 is
shall be. (Block 68) As a result, the data receiving process [4] determines that there is no empty area in the OS receiving buffer 13, and forcibly terminates the data receiving process 14.

There is received data in communication hardware buffer 2, but
Because data processing requires real-time processing, data not transferred from the hardware reception buffer 22 to the ○S reception buffer is executed by the next timer interrupt.

Furthermore, depending on the necessity of real-time performance, the value of the auxiliary empty area counter 17 is not set to 0, but is set to an arbitrary integer (however, the value of the empty area counter 16 or less), and the required number of data is selected on the receiving side. It is also possible.

〔Effect of the invention〕

According to the present invention, it is possible to maximize the use of the ○S reception buffer when receiving data of the central processing unit gives priority to processing capacity, and to minimize the empty area counter when giving priority to real-time performance. As a result, the central processing unit can perform processing at its maximum capacity within a certain response time without being aware of the received data.

[Brief explanation of the drawing]

FIG. 1 is a system configuration diagram of an electronic exchange system showing one embodiment of the present invention, and FIG. 2 is a control flowchart when a central processing unit receives data from a terminal control device. 1...Central processing unit 2...Hardware buffer for communication 3...Terminal control device 4...I/O device 21...Hardware transmission buffer 22...Hardware reception buffer, 7-I ＼Represented by Patent Attorney Katsuma Ogawa / 315 no L2]

Claims (1)

[Claims] 1. In a distributed processing system that periodically transfers data between a central processing unit and multiple terminal processing units and executes application processes on the central processing unit at a lower priority level than periodic programs, multiple terminal processing units An empty area counter is provided to indicate the areas in which messages can be received and the areas in which they can be received, and it is determined whether the data requires real-time performance or the data prioritizes processing capacity. In the case of data that prioritizes processing capacity, the empty area counter is maximized and the overhead of communication between processors in the entire system is minimized by receiving data from as many terminal processing devices as possible in the same periodic process. In addition, in the case of data that requires real-time processing, by minimizing the empty area counter and minimizing the execution time of inter-processor communication, the execution time of periodic processes is minimized and all received data can be processed. However, this data transmission method is characterized by maximizing the processing capacity of the system within a certain response time.