JPS63111081U

JPS63111081U -

Info

Publication number: JPS63111081U
Application number: JP71187U
Authority: JP
Priority date: 1987-01-07
Filing date: 1987-01-07
Publication date: 1988-07-16

Description

[Brief explanation of the drawing]

第１図は本考案の実施例のブロツク構成図であ
る。１……入力手段、２……話中音識別手段、６…
…極大値検出回路、７……基準レベルデータ源、
８……比較回路、９……極大値周期検出回路、１
０……計数回路、１１……第２計数回路。 FIG. 1 is a block diagram of an embodiment of the present invention. 1... Input means, 2... Busy sound identification means, 6...
...Local maximum value detection circuit, 7...Reference level data source,
8... Comparison circuit, 9... Maximum value cycle detection circuit, 1
0... Counting circuit, 11... Second counting circuit.

Claims

[Claims for Utility Model Registration] Input means for inputting a digital signal having voice data including a busy tone of a telephone as digital data, and receiving the digital signal from the input means and receiving the busy tone in the digital signal. In a digital exchange, the busy tone identifying means includes a local maximum value detection circuit that detects local maximum value data from a plurality of continuous digital data, and a reference level data representing a reference level data. a level data source; a level comparison circuit that compares the local maximum value data with reference level data; a local maximum period detection circuit that receives a comparison output from the level comparison circuit and detects a period of the local maximum from the comparison output; A digital exchange comprising: a counting circuit that receives a detection output from a value cycle detection circuit and counts the intermittent time of the detection output.