JPS63108633U - - Google Patents

Info

Publication number
JPS63108633U
JPS63108633U JP39887U JP39887U JPS63108633U JP S63108633 U JPS63108633 U JP S63108633U JP 39887 U JP39887 U JP 39887U JP 39887 U JP39887 U JP 39887U JP S63108633 U JPS63108633 U JP S63108633U
Authority
JP
Japan
Prior art keywords
semiconductor chip
circuit board
pin
attached
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP39887U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP39887U priority Critical patent/JPS63108633U/ja
Publication of JPS63108633U publication Critical patent/JPS63108633U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
JP39887U 1987-01-06 1987-01-06 Pending JPS63108633U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP39887U JPS63108633U (enrdf_load_stackoverflow) 1987-01-06 1987-01-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP39887U JPS63108633U (enrdf_load_stackoverflow) 1987-01-06 1987-01-06

Publications (1)

Publication Number Publication Date
JPS63108633U true JPS63108633U (enrdf_load_stackoverflow) 1988-07-13

Family

ID=30777337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP39887U Pending JPS63108633U (enrdf_load_stackoverflow) 1987-01-06 1987-01-06

Country Status (1)

Country Link
JP (1) JPS63108633U (enrdf_load_stackoverflow)

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