JPS63107863U - - Google Patents
Info
- Publication number
- JPS63107863U JPS63107863U JP20095486U JP20095486U JPS63107863U JP S63107863 U JPS63107863 U JP S63107863U JP 20095486 U JP20095486 U JP 20095486U JP 20095486 U JP20095486 U JP 20095486U JP S63107863 U JPS63107863 U JP S63107863U
- Authority
- JP
- Japan
- Prior art keywords
- current detection
- detection resistor
- varistor
- voltage generated
- transformer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000009499 grossing Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Thermistors And Varistors (AREA)
Description
第１図は、本考案の一実施例を示す構成ブロツ
ク図、第２図は従来装置の構成ブロツク図である
。
Ｂ……電池、Ｃ１……キヤパシタ、Ｄ１……ダ
イオード、Ｑ１……トランジスタ、Ｒ１……電流
検出抵抗、ＳＷ……スイツチ、Ｔ１……トランス
、Ｕ１……パルス幅信号制御回路、Ｖ……電圧計
、ＶＡ……バリスタ。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional device. B...Battery, C1...Capacitor, D1...Diode, Q1...Transistor, R1...Current detection resistor, SW...Switch, T1...Transformer, U1...Pulse width signal control circuit, V...Voltage Total, VA...Barista.
Claims (1)
に接続し、二次側に整流素子と平滑素子を接続し
たトランス、 このトランスの二次側で直流化された電圧が印
加されるバリスタ、 このバリスタと直列に接続される電流検出抵抗
、 このバリスタまたはバリスタおよび電流検出抵
抗に生ずる電圧を測定する電圧計、 この電流検出抵抗に生ずる電圧を検出して所定
の周波数のパルス幅信号を前記トランジスタのベ
ースに印加して、前記スイツチがオンである場合
に電流検出抵抗に生ずる電圧が一定であるように
制御するパルス幅信号制御回路、 よりなることを特徴とするバリスタのもれ電流
測定装置。[Claims for Utility Model Registration] A transformer in which a battery, a switch, and a transistor are connected in series on the primary side, and a rectifying element and a smoothing element on the secondary side. A DC voltage is applied on the secondary side of this transformer. a current detection resistor connected in series with this varistor, a voltmeter that measures the voltage generated in this varistor or the varistor and the current detection resistor, and a pulse width of a predetermined frequency by detecting the voltage generated in this current detection resistor. A pulse width signal control circuit that applies a signal to the base of the transistor to control the voltage generated across the current detection resistor to be constant when the switch is on. Current measuring device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20095486U JPH0339740Y2 (en) | 1986-12-29 | 1986-12-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20095486U JPH0339740Y2 (en) | 1986-12-29 | 1986-12-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63107863U true JPS63107863U (en) | 1988-07-12 |
| JPH0339740Y2 JPH0339740Y2 (en) | 1991-08-21 |
Family
ID=31163955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20095486U Expired JPH0339740Y2 (en) | 1986-12-29 | 1986-12-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0339740Y2 (en) |
-
1986
- 1986-12-29 JP JP20095486U patent/JPH0339740Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0339740Y2 (en) | 1991-08-21 |