JPS6310464U - - Google Patents

Info

Publication number
JPS6310464U
JPS6310464U JP10482886U JP10482886U JPS6310464U JP S6310464 U JPS6310464 U JP S6310464U JP 10482886 U JP10482886 U JP 10482886U JP 10482886 U JP10482886 U JP 10482886U JP S6310464 U JPS6310464 U JP S6310464U
Authority
JP
Japan
Prior art keywords
terminal
resistor
input
terminals
resistance value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10482886U
Other languages
Japanese (ja)
Other versions
JPH0454460Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986104828U priority Critical patent/JPH0454460Y2/ja
Publication of JPS6310464U publication Critical patent/JPS6310464U/ja
Application granted granted Critical
Publication of JPH0454460Y2 publication Critical patent/JPH0454460Y2/ja
Expired legal-status Critical Current

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  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第3図は本願考案にかかる高イン
ピーダンス入力切換回路の実施例を示す回路図、
第4図は従来の入力切換回路の一例を示す回路図
である。 10,20……中継端子、11,21……入力
端子、13,23……演算増幅器、14,24…
…出力端子。
1 to 3 are circuit diagrams showing embodiments of the high impedance input switching circuit according to the present invention,
FIG. 4 is a circuit diagram showing an example of a conventional input switching circuit. 10, 20... Relay terminal, 11, 21... Input terminal, 13, 23... Operational amplifier, 14, 24...
...Output terminal.

Claims (1)

【実用新案登録請求の範囲】 1 一対の入力端子と、 この入力端子の一方側に第1の端子が接続され
、この端子と信号を入力すべき処理部との間に高
抵抗値抵抗が接続された、複数端子を等ピツチで
配設した中継端子アセンブリと、 この中継端子アセンブリにおける任意の隣接端
子を短絡させる短絡部材と、 前記第1の端子に隣接した第2の端子に一端が
接続されると共に、他端が前記信号処理部と接続
され、前記高抵抗値抵抗との合成抵抗値が前記信
号処理部の入力抵抗値をなす入力調整抵抗と、 前記入力端子の他方側と前記中継端子アセンブ
リの他の端子間に接続され、前記高抵抗値抵抗と
共働して入力信号を分圧し、所望の減衰率を与え
る抵抗値を有する少なくとも1つの抵抗からなる
抵抗群と、 この抵抗群中の抵抗が接続された端子に隣接す
る端子と前記信号処理部間を接続する引出し配線
とを備えた高インピーダンス入力切換回路。 2 引出し配線が接続された端子が、前記抵抗群
中の2つの抵抗を接続した端子の間にあることを
特徴とする実用新案登録請求の範囲第1項記載の
高インピーダンス入力切換回路。 3 高抵抗値抵抗が数MΩ以上の値を有するもの
である実用新案登録請求の範囲第1項または第2
項記載の高インピーダンス入力切換回路。
[Claims for Utility Model Registration] 1. A pair of input terminals, a first terminal connected to one side of the input terminals, and a high-resistance resistor connected between this terminal and a processing unit to which a signal is to be input. a relay terminal assembly in which a plurality of terminals are arranged at equal pitches; a short-circuiting member that shorts arbitrary adjacent terminals in the relay terminal assembly; and one end of the relay terminal assembly is connected to a second terminal adjacent to the first terminal. and an input adjustment resistor whose other end is connected to the signal processing section and whose combined resistance value with the high resistance value resistor forms the input resistance value of the signal processing section; and the other side of the input terminal and the relay terminal. a resistor group connected between other terminals of the assembly and comprising at least one resistor having a resistance value that cooperates with the high resistance value resistor to voltage divide the input signal and provide a desired attenuation factor; A high impedance input switching circuit comprising a terminal adjacent to a terminal to which a resistor is connected and a lead wire connecting the signal processing section. 2. The high impedance input switching circuit according to claim 1, wherein the terminal to which the lead wiring is connected is located between the terminals to which two resistors in the resistor group are connected. 3. Claims 1 or 2 for utility model registration in which the high resistance value resistor has a value of several MΩ or more
High impedance input switching circuit described in Section 1.
JP1986104828U 1986-07-08 1986-07-08 Expired JPH0454460Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986104828U JPH0454460Y2 (en) 1986-07-08 1986-07-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986104828U JPH0454460Y2 (en) 1986-07-08 1986-07-08

Publications (2)

Publication Number Publication Date
JPS6310464U true JPS6310464U (en) 1988-01-23
JPH0454460Y2 JPH0454460Y2 (en) 1992-12-21

Family

ID=30978682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986104828U Expired JPH0454460Y2 (en) 1986-07-08 1986-07-08

Country Status (1)

Country Link
JP (1) JPH0454460Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01113816U (en) * 1988-01-27 1989-07-31

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554754A (en) * 1978-06-26 1980-01-14 Matsushita Electric Ind Co Ltd Magnetic tape device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS554754A (en) * 1978-06-26 1980-01-14 Matsushita Electric Ind Co Ltd Magnetic tape device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01113816U (en) * 1988-01-27 1989-07-31

Also Published As

Publication number Publication date
JPH0454460Y2 (en) 1992-12-21

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