JPS63100992U - - Google Patents
Info
- Publication number
- JPS63100992U JPS63100992U JP19414386U JP19414386U JPS63100992U JP S63100992 U JPS63100992 U JP S63100992U JP 19414386 U JP19414386 U JP 19414386U JP 19414386 U JP19414386 U JP 19414386U JP S63100992 U JPS63100992 U JP S63100992U
- Authority
- JP
- Japan
- Prior art keywords
- secondary winding
- rectifying
- magnetic amplifier
- circuit
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims description 10
- 238000009499 grossing Methods 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図はこの考案の一実施例を示す直流電源装
置の構成図、第２図は第１図に示すパルス増幅回
路の構成の一実施例を示す図、第３図は第１図及
び第２図に示す各部の波形を示す図、第４図は従
来の直流電源装置の構成図、第５図は第４図に示
すトランジスタのコレクタ電圧とコレクタ電流の
波形を示す図である。
図において、１は１次電源、２は駆動回路、３
はトランジスタ、４はトランス、５は整流平滑回
路、６は磁気増幅器、７は出力電圧制御回路、８
は磁気増幅器、９はパルス増幅器、１０は磁気増
幅器Ａ、１１〜１３は抵抗、１４〜１６はダイオ
ード、１７はコンデンサ、Ｗ１，Ｎ１は１次巻線
、Ｗ２，Ｎ２１，Ｎ２２は２次巻線である。なお
、図中同一符号は同一、又は相当部分を示す。
FIG. 1 is a block diagram of a DC power supply device showing an embodiment of this invention, FIG. 2 is a diagram showing an embodiment of the configuration of the pulse amplification circuit shown in FIG. 1, and FIG. 2 is a diagram showing the waveforms of each part shown in FIG. 2, FIG. 4 is a block diagram of a conventional DC power supply device, and FIG. 5 is a diagram showing the waveforms of the collector voltage and collector current of the transistor shown in FIG. 4. In the figure, 1 is the primary power supply, 2 is the drive circuit, and 3
is a transistor, 4 is a transformer, 5 is a rectifier and smoothing circuit, 6 is a magnetic amplifier, 7 is an output voltage control circuit, 8
is a magnetic amplifier, 9 is a pulse amplifier, 10 is a magnetic amplifier A, 11 to 13 are resistors, 14 to 16 are diodes, 17 is a capacitor, W 1 , N 1 are primary windings, W 2 , N 21 , N 22 is the secondary winding. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
路のパルス信号によりオン・オフするトランジス
タと、１次巻線の一端が前記トランジスタのコレ
クタに接続されたトランスと、上記トランスの２
次巻線の出力を整流平滑する整流平滑回路と、上
記トランスの２次巻線と整流平滑回路の間に１次
巻線が接続され、第１の２次巻線及び第２の２次
巻線を有する磁気増幅器と、上記整流平滑回路の
出力端と前記磁気増幅器の第１の２次巻線の一端
に接続され、上記整流平滑回路の出力電圧が一定
となるように上記磁気増幅器の飽和期間と非飽和
期間の比を制御する出力電圧制御回路と、上記ト
ランジスタがオフとなる直前に上記磁気増幅器の
第２の２次巻線にパルス電圧を印加するパルス増
幅回路を備えた直流電源装置。 A drive circuit that outputs a pulse signal, a transistor that is turned on and off by the pulse signal of the drive circuit, a transformer whose primary winding is connected to the collector of the transistor, and two of the transformers.
A rectifying and smoothing circuit that rectifies and smoothes the output of the secondary winding, a primary winding connected between the secondary winding of the transformer and the rectifying and smoothing circuit, and a first secondary winding and a second secondary winding. a magnetic amplifier having a wire connected to the output end of the rectifying and smoothing circuit and one end of the first secondary winding of the magnetic amplifier, and adjusting the saturation of the magnetic amplifier so that the output voltage of the rectifying and smoothing circuit is constant. A DC power supply device comprising: an output voltage control circuit that controls a ratio between a period and a non-saturation period; and a pulse amplification circuit that applies a pulse voltage to a second secondary winding of the magnetic amplifier immediately before the transistor is turned off. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19414386U JPS63100992U (en) | 1986-12-17 | 1986-12-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19414386U JPS63100992U (en) | 1986-12-17 | 1986-12-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63100992U true JPS63100992U (en) | 1988-06-30 |
Family
ID=31150839
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19414386U Pending JPS63100992U (en) | 1986-12-17 | 1986-12-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63100992U (en) |
-
1986
- 1986-12-17 JP JP19414386U patent/JPS63100992U/ja active Pending