JPS6298432A - Method and device for synchronizing control - Google Patents

Abstract

PURPOSE:To execute quickly and efficiently and also with a high reliability a synchronizing control between plural operation procedures to a data, by expressing a Petri net by an integer vector, and bringing a condition of a synchronizing control which is expressed by a vector, to a vector operation at the time of execution of an operating procedure to a data type. CONSTITUTION:A state counter vector shows the number of stones of all places in some time point of a Petri net, according to a graph expression of the Petri net. When describing a synchronizing control of a data operation, when the start and the end of an operating procedure are brought to a transition, respectively, and a condition required for the start and the end is defined as a place, most of synchronizing controls required for a practical use can be realized. Also, when a vector expression of the Petri net is used, the operation for the synchronizing control can be executed by three vector operations of size comparison, subtraction and addition of every element of the vector. The size comparison can be replaced with a non-negative decidion of a result of subtraction.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method and apparatus for synchronous control of data creation in a computer, and is suitable for synchronous control in data encapsulation such as object programming. The present invention relates to a synchronous control method and device.

[Background of the invention]

When multiple operations are performed on data, there are often restrictions on the order in which the operations are performed. For example, if there are two operations, write and read, for a certain buffer, it is necessary to perform the read after the write. Furthermore, when operating the above-mentioned buffer in a multi-task environment, in addition to the above-mentioned constraints, there must be constraints such that writing can be done exclusively and multiple tasks can execute extrusion in parallel. Control to comply with these constraints is called synchronous control. In data encapsulation, each operation on data is defined as an operation procedure, and the operation procedures for the same data type are written in one place together with the data type definition, instead of having operations on data scattered throughout the program. In some programming languages, a control expression that describes the synchronization relationship between operation procedures can be written as jF<, which facilitates synchronization control.

Conventionally, implementation of synchronous control using the above-mentioned layout 1 set has been described in Information Processing Society of Japan Transactions, Vol. 24. AI (1983
As discussed in the paper titled "Design of the distributed system description language Concurrent C and realization of its processing system" by Ando et al. A method is adopted in which an exclusive control means called a semaphore, which excludes access to the counter, is determined and updated during the operation procedure.

With the above method, complex synchronization control can be realized, but since multiple counters and semaphores are divided into M numbers and accessed,
There was a problem with poor efficiency during execution.

[Purpose of the invention]

An object of the present invention is to provide a synchronization control method and apparatus that synchronizes a plurality of data manipulation procedures quickly, efficiently, and with high reliability.

[Summary of the invention]

One of the models for describing synchronous control is called a Petri net, and most of the synchronous control of data operations can be described using this Petri net. Well, Petri nets can be expressed as integer vectors, so if you perform a vector operation on the synchronization control conditions expressed as a vector when executing an operation procedure for a data type, it will become a rock for each task count counter and semaphore. Faster synchronous control can be achieved compared to synchronous control methods that perform calculations. The relatively simple synchronization side 6+17j can be an integer vector i+ of a vector representation of a Petri net, and a bit string. In this case, since subtraction can be performed using the exclusive OR of the bit strings and addition can be performed using the logical sum, much faster synchronization control is possible.

Furthermore, if the synchronous control method of the present invention is implemented by hardware in the function of the call instruction and return instruction of the operation procedure, it will be more organized and efficient than performing synchronous 'dtlJ control using multiple instructions. There is a high possibility that it will be possible to carry out effective control. Moreover, if implemented in hardware, reliable and highly reliable synchronous control becomes possible.

[Embodiments of the invention]

Embodiments of the synchronous control method and apparatus of the present invention will be described below, but first the Petri net, which is the basis of the present invention, will be described. The Petri net is located at location 5 as shown in Figure 6.
It is a bipartite directed graph with two types of nodes called 0,51.52 and transition 53°54.55. Each location can have a number of stones, indicated by black circles. A transition is said to be ignitable if there are more stones than there are branches in every location that has branches pointing towards it. When a transition fires, the stones in all locations with branches heading toward that transition are reduced by the number of branches, and the stones in all locations with branches heading from that transition are increased by the number of branches. Ignition occurs sequentially.

However, a Petri net can also be created using a counter vector that keeps track of the number of stones at every location. The elements of the vector are the number of stones in one location. By defining a set of an initial counter vector that indicates the initial state stone arrangement, a decrement counter vector that indicates the minimum number of stones that can be fired at each transition, and an increment counter vector that indicates the number of stones that can be increased at the time of firing, it becomes one. One Petri net can be defined. Fourth
In the illustrated example, the counter vector indicating transition t153 is
The subtraction vector is (1, 0, 1), the addition vector is (1, 1° 0), and the counter vector indicating t254 has a subtraction vector of (1, 1, 0) and an addition vector of (0, 0, 1).

The counter vector indicating t355 has a decrement vector of (0,
1, O), the additive vector is (0, 0, 2), and the counter vector indicating the initial state is (1, 1, O).

In the case of vector representation, the Petri net operates as follows. First, the value of the initial counter vector is set in the state counter vector indicating the state of the Petri net. The state counter vector is compared with the input counter vector of the transition, and if the value of the state counter vector is greater than or equal to the value of the input counter vector for all elements, the transition can fire. When a transition fires, the input counter vector of the fired transition is subtracted from the state counter vector, and the output counter vector of the fired transition is added to the result, and the result is set as the value of the new state counter vector.

In other words, the state counter vector indicates the number of stones in all locations of the IJ net at a certain point in time in a Petri net graph representation.

To describe synchronous control of data operations using Petri nets,
By defining the start and end of an operation procedure as transitions, and defining the conditions necessary for the start and end as locations, most of the synchronous control needed in practice can be achieved. Using the vector representation of a Petri net, the basic operations for synchronous control are the following: comparison of the magnitude of each element of the vector, subtraction, and addition.
This can be done using vector operations. The magnitude comparison can also be replaced by determining the non-negativeness of the subtraction result.

Next, an embodiment of the synchronous control method of the present invention is shown in FIGS. 1 and 2.
This will be explained with reference to FIGS. 3 and 4. FIG. 1 is a configuration diagram of this embodiment. The main storage unit 1 stores an entity table 10 and a definition table 11 having control information for the entity data, in addition to entity data 12 of the data type to be manipulated and a group of operation procedures 13. Definition table 11
Create as many data type definitions as there are data type definitions, and create as many entity tables as there are entities. The central processing unit 2 has a vector register group 14 and a vector arithmetic unit 15.

FIG. 2 is a format diagram of the definition table 11. The definition table 11 includes, for each operation procedure of the defined data type, a procedure entry address 40 and a reduction vector (SBVl) 41 in the vector representation of the Petri net when the start of the operation procedure is regarded as a transition of the Petri net.
and addition vector (ADVl) 42, similarly, subtraction vector (SBV2) 43 and addition vector (ADv2) at the end of the procedure.
) 44, holds the initial vector 45 which is the initial value of the state vector. The information in the definition table 11 defines one Petri net for data type synchronization control. FIG. 3 is a format diagram of the entity table 10. A definition table address 46 of the data type to which the entity belongs, a state vector 47 for the entity of the Petri net representing the synchronization of the data type to which the entity belongs,
Lock variable 48 used for locking when referencing state vector
, holds the entity data address 49. The vector information in the definition table 11 and entity table 10 can be rephrased as follows. The subtractive vectors 41 and 43 are a list of the number of times the conditions necessary for the start and end of a procedure are satisfied, respectively, and the add vectors 42 and 44 are a list of the number of new conditions that are satisfied after the start and end of the procedure, respectively. It is. The state vector 47 is the number of times each condition is satisfied at that point.

All of these vectors have elements that correspond one-to-one with all the conditions necessary for data type synchronization control, and the positions of the corresponding elements in the vectors are also the same.

When an entity of a certain data type is created during program execution, a storage entity table 10 for the entity is created in addition to the entity data 12, and the value of the initial vector 45 of the definition table 11 of the data type is set in the entity table lO. is assigned to the state vector 47 of . When executing an operation procedure in the operation procedure group 13 on the entity data 12, a subtraction vector 41 and an addition vector 42, a subtraction vector 43 and an addition vector 43 are used at the start and end of the operation procedure, respectively.
Using this, the synchronous control procedure 11 is executed according to the procedure shown in flowchart 1 in FIG. In the case of the start part, if synchronization is possible, the state vector 47 is updated and data manipulation begins. Impossible C] generates an exception condition. In the case of the end part, if the synchronization is in the town state, change the state vector 47 to 1
1'i: Return from the continuation of the section. If it is not possible, an exception condition will be generated.

According to the synchronous control method of this embodiment, the loading of multiple vectors, vector subtraction, vector addition 'pi, and non-negative determination of +vector elements are performed in parallel in a pipeline manner, so the time required for synchronous control is shorter than that of the conventional method. The time can be reduced to a fraction of that of the previous one.

Next, one embodiment of the synchronization control circuit of the present invention is shown in FIGS. 2 and 3.
This will be explained with reference to FIG. FIG. 5 is a configuration diagram of this embodiment. The main memory unit 1 includes an entity table 10, a definition table 11. Holds entity data 12 and operation procedures 13. In addition to the main memory unit 6', the synchronization control circuit 6' stores instructions 1jll a
1 circuit 20, procedure index register 21, entity table address register 22, normal conveyor-and-swap in which if the lock variable is equal to the value of the first operand of the command, it is updated to the value of the second operand. Table lock circuit 23 for executing instructions, vector load circuit 25, signal input 24 from circuit 23 to circuit 25, vector register group 14, vector subtractor 31, vector adder 32, vector sign determiner 33, synchronization control indicates the occurrence of an exception condition due to a snorp flop 34, an interrupt generation circuit 35, a vector storage circuit 37, a signal line 36 from circuit 35 to circuit 37, and a signal line 36 from circuit 37 to circuit 23.
It consists of a signal line 38 to. The definition table 11 and the entity table IO are exactly the same as those in the embodiment of the synchronous control method, and have the formats shown in FIGS. 2 and 3, respectively.

Next, the operation of this embodiment of the synchronization control circuit will be explained.

First, when a data type is defined, a definition table 11 for the data type is created in the main memory unit 1 by software, and when an entity of the data type is created, an entity table 10 is created together with the entity data 12. When an instruction to call an operation procedure for a certain entity is executed, the instruction control circuit 20 first stores the address of the entity table 10 indicated as the operand of the instruction and the index of the operation procedure in the entity table address register. 22 and procedure inch register 21. The table lock circuit 23 obtains the address of the lock variable 48 in the entity table 10 from the address of the entity table address register 22, and performs a conveyor-and-swap on the lock variable 48 to determine the address of the lock variable 48 in the multi-processor system. It is tested whether another processor is executing a synchronization control function for the same entity, that is, whether it is 1, and if the other processor is executing it, the test is repeated until it is finished. If it is not running, that is, it is 0, set the value of the lock variable 48 to 1 and lock the table,
The signal line 24 notifies the vector load circuit 25 to start execution. The vector load circuit 25 loads the state vector 47 in the entity table 10 into the vector register VR.
026, the subtraction vector 41 and addition vector 42 at the start of the procedure corresponding to the index of the procedure index register 21 in the definition table II are stored in vector registers VRI 27. Load it onto VR228. In parallel with the loading of this vector and the pipeline for vector elements, the vector subtracter 31 subtracts VR,127 from VRO26 and the result is stored in the vector register VR.
329, the vector sign determiner 33 determines whether all elements of VR and 329 are positive or 0, and the vector adder 32 adds VR3 and VR4 and loads the result into the vector register VfL 430. The 9° vector sign determiner 33 sets 1 in the flip-flop 34 if at least one element of the VR 329 is negative. The vector storage circuit 37 stores the contents of the VR 430 in the state vector 47 in the entity table IO, and when the storage is completed, notifies the table lock circuit 23 of the completion via the signal line 38. If the flip-flop 34 is 1, the interrupt generation circuit 35 notifies the vector storage circuit 37 via the signal line 36 and prohibits vector storage.

When the table lock circuit 23 is notified of the completion of vector storage via the signal line 38, it returns the value of the lock variable 48 to 0 and releases the table lock.After this, if no exception condition occurs, the call instruction is The execution unit passes control to the operating procedure 13.

When an instruction to return from an operation procedure is executed,
The synchronization control circuit of this embodiment operates in the same manner as in the case of the call instruction, using the subtraction vector 43 and the summation vector 44 instead of the subtraction vector 41 and the summation vector 42.

According to the synchronous control circuit of this embodiment, loading of multiple vectors, vector subtraction, vector addition, and non-negative determination of vector elements are performed in parallel in a pipeline manner, so the time required for synchronous control is reduced to several minutes compared to conventional methods. It can be shortened to about 1.

Further, since the locking of the entity table 10 is performed during the call and return instructions, there is no room for bugs such as forgetting to lock by software, resulting in higher reliability.

〔Effect of the invention〕

According to the synchronous control method of the present invention, synchronous control of data operations is realized by several calculations of counter vectors, so the execution time of synchronous control is reduced to about a fraction of the conventional time by pipeline parallel execution of vector operations. Can be shortened. In addition, for synchronous control that can be expressed by a counter that can only take a value of at most l, the counter vector is expressed as a bit string, and if the length of the bit string is n, the execution time of synchronous control can be reduced to 1/n of the conventional time by bit string operation. be able to.

According to the synchronous control circuit of the present invention, in addition to the effects of the synchronous control method described above, synchronous control is also performed when executing procedure calls and return instructions, so that control failures due to software bugs do not occur and reliability is improved. Highly synchronized control can be achieved. In addition, synchronization control is determined before branching to the operation procedure, so if synchronization is not possible and exception conditions often occur, the number of branches is reduced, so the pipeline processing of instructions is not disturbed, and the operation procedure The virtual memory pages of the present invention are not accessed redundantly, and the occupied real memory space is less likely to increase, and the performance of the entire data processing apparatus becomes better than before.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an embodiment of the synchronous control method of the present invention, FIG. 2 is a format diagram of a definition table of the embodiment, and FIG.
4 is a flowchart of the embodiment, FIG. 5 is a block diagram of an embodiment of the synchronization control circuit of the present invention, and FIG. 6 is an example of a Petri net. 11...Definition table, 10...Substance table, 1
4... Vector register group, 31... Vector subtracter, 32... Vector adder, 33... Vector sign determiner, 34... Flip-flop, 41.43.
... Subtraction vector, 42.44 ... Addition vector, 47.
...State vector, 48...Lock variable. Punishment 1 Ward ￥'J 2 Figure 3 Figure S Figure 1 HH12 Kitakami Uni 9 Door θ Slightly inefficient.
, Tablero Egg 4
2521
Load circuit 22
Vector L5 Zutojista vu
y shaku 3 chi 7... le ”rKI
V and 407 times N vF 2,27 Kayotsuguchi, I; 3

Claims (1)

[Claims] 1. In the data processing device, for each data type entity,
A state counter vector containing counters representing the number of times the conditions are met for the number of conditions necessary to execute a group of procedures that manipulate the data type, and a state counter vector for each data type definition and for each procedure that manipulates the data type. An operation procedure list with four condition change counter vectors representing the start condition of the procedure, the condition change after the start, the end condition and the condition change after the end are expressed by the number of times the condition is satisfied is held in the storage means, and the operation procedure list is performed on the entity of the data type. When executing a procedure, it is possible to determine whether or not the operation procedure can be executed by performing a vector operation or a bit string operation on the state counter vector of the entity and the four condition change counter vectors of the operation procedure of the data type. If so, the state counter vector is updated, and if execution is not possible, an exception condition is generated. 2. In the data processing device, for each data type entity,
storage means for holding a state counter vector in which counters representing the number of times the conditions are met are arranged for the number of conditions necessary to execute a group of procedures that operate on the data type; storage means for holding an operation procedure list having four condition change counter vectors representing the start condition of the procedure, the condition change after the start, the end condition and the condition change after the end, as the number of times the condition is satisfied for each procedure to be operated; performing vector operations or bit string operations on the state counter vector of the entity and the four condition change vectors of the operation procedure of the data type when executing an instruction that calls an operation procedure for an entity of the type and an instruction that returns from the operation procedure; Accordingly, a synchronization control circuit is provided that determines whether or not the call instruction function and return instruction function for the operation procedure can be executed, updates the state counter vector if it is executable, and generates an exception condition if it is not executable. A synchronous control device characterized by: