JPS6293842U - - Google Patents
Info
- Publication number
- JPS6293842U JPS6293842U JP16682085U JP16682085U JPS6293842U JP S6293842 U JPS6293842 U JP S6293842U JP 16682085 U JP16682085 U JP 16682085U JP 16682085 U JP16682085 U JP 16682085U JP S6293842 U JPS6293842 U JP S6293842U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- tuning circuit
- input
- comparator
- tuning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000009413 insulation Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
第１図は本考案の一実施例を示す電灯線搬送装
置の要部の送受信回路図、第２図は従来の電灯線
搬送装置の要部送受信回路図、第３図ａ，ｂは第
２図及び第１図に示すもののコンパレータの入力
信号レベルを示す説明図である。
１７……コンパレータ、２１……コンデンサ、
３０……第２の同調回路。
Fig. 1 is a transmitting/receiving circuit diagram of the main parts of a power line transport device showing an embodiment of the present invention, Fig. 2 is a transmitting/receiving circuit diagram of the main parts of a conventional power line transport system, and Figs. FIG. 2 is an explanatory diagram showing the input signal level of the comparator shown in FIGS. 17... Comparator, 21... Capacitor,
30...Second tuning circuit.
Claims (1)
同調回路、この第１の同調回路に送信回路の出力
及び受信回路の入力が接続される送・受信回路を
有し、この受信回路の入力は第２の同調回路によ
り構成され、この第２の同調回路より入力される
信号をコンパレータによりデイジタル化するもの
において、第２の同調回路３０をコンデンサー２
１により高周波接地して直流的に絶縁するととも
に、コンデンサー２１と第２の同調回路３０との
接続点をコンパレータ１７の電源とグランドの中
間の電圧の電源に接続したことを特徴とする電灯
線搬送装置。 It has a first tuning circuit for superimposing a high frequency signal on a power line, a transmitting/receiving circuit to which the output of the transmitting circuit and the input of the receiving circuit are connected to the first tuning circuit, and the input of the receiving circuit is In a device configured with a second tuning circuit and digitizing a signal input from the second tuning circuit using a comparator, the second tuning circuit 30 is connected to a capacitor 2.
1 for high-frequency grounding and direct current insulation, and the connection point between the capacitor 21 and the second tuning circuit 30 is connected to a power source with a voltage intermediate between the power source of the comparator 17 and the ground. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16682085U JPS6293842U (en) | 1985-10-30 | 1985-10-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16682085U JPS6293842U (en) | 1985-10-30 | 1985-10-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6293842U true JPS6293842U (en) | 1987-06-15 |
Family
ID=31098159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16682085U Pending JPS6293842U (en) | 1985-10-30 | 1985-10-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6293842U (en) |
-
1985
- 1985-10-30 JP JP16682085U patent/JPS6293842U/ja active Pending
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