JPS6292194A - Access system for data block - Google Patents

Abstract

PURPOSE:To reduce the mean access time by positioning a magnetic tape in the vicinity of the midpoint of a desired physical address at high speed access. CONSTITUTION:Light from a light emitting element is received intermittently by a photodetector 15 at a period in response to the running speed of a magnetic tape from the start of high-speed running of the magnetic tape and a tachogenerator pulse is extracted. The running speed of the magnetic tape at high-speed running is known and the interval of physical addresses is constant and know, then the number of tachogenerator pulses generated per running distance of one physical address is also known. Thus, what order of the physical address is scanned by a write/read head 17 is known from the count of a tachogenerator counter 16 counting the tachogenerator pulses. Since the target physical address supplied to a comparator 8 is corrected to a value near the midpoint of the area of the target physical address by a microprocessor 7, the running stop position of the magnetic tape 11 is brought into the midpoint of the target physical address area.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a data block access method, and in particular, a plurality of data blocks having a physical address indicating a physical position on a magnetic tape and a logical address given to the data block. The present invention relates to a data block seven-access method for positioning a desired data block among the data blocks.

[The beginning of invention]

Magnetic tape storage devices have been known as an example of external storage devices for computers, but for high-speed data processing, it is necessary to access desired data blocks at high speed. The conventional Akhis system of this type was developed in Japanese Patent Application Laid-open No. 5
As described in No. L-158008, each variable-length data block has a physical address indicating the physical position on the magnetic tape divided at equal intervals, and a logical address indicating the position of the data block within the physical address. The data block is allocated in advance, and the magnetic tape is first run at high speed to perform rough access using the physical address, and then the magnetic tape is run at normal speed to read the logical address and locate the desired data block. I was doing it.

However, in this conventional access method, the first part of the physical address is accessed at high speed, and then the logical address is accessed at normal speed, so there is a problem that the average access time becomes long.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a data block access method that solves the above problems by locating a desired physical address near the center during high-speed access.

[Summary of the invention]

In order to achieve the above object, in the present invention, during high-speed access using a physical address, the magnetic tape is positioned near the approximate center of the recording area of the desired physical address, and then the magnetic tape is run in the forward or reverse direction at a normal speed at which data can be read. The logical address is read, and the direction in which the tape runs to reach the desired data block is determined based on the logical address at that time.

Thereafter, the magnetic tape is run at normal speed to the desired data block to detect the desired logical address.

According to the present invention, the maximum value of the access distance to reach a logical address after high-speed access is about 1/1 of the physical address interval.
2, and since the minimum value is a negative data block distance, the average value is about 1/4 of the physical address interval, which is about half that of the conventional method, and the average access time to a desired data block can be significantly shortened.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block system diagram of an embodiment of the method of the present invention. The operation of the block system shown in FIG. 1 will be explained with reference to the flowchart shown in FIG. Step 20 in Figure 2).

This command includes a physical address and a logical address. The microprocessor 3 in the control unit 2 decodes this command and sends physical address data to the drive unit 5 to instruct high-speed access (step 21 in FIG. 2). This physical address data is for drive unit 5.
is supplied to a microprocessor 7 through an interface control circuit 6 in the internal circuit, and is further supplied to a comparator 8, while a supply side reel motor and a take-up side reel motor (both not shown) are supplied through a reel υ control circuit 9. The take-up reel motor is rotated at high speed. As a result, the magnetic tape 11 wound on the supply reel (file reel) 10 passes through the idlers 12 and 13 and begins to be wound on the take-up reel (machine reel) 14 at high speed (step 22 in FIG. 2).

Here, the magnetic tape 11 has a plurality of physical addresses assigned to each area when divided into certain periods, and logical addresses assigned to each of one or more data blocks within the same physical address. data blocks are recorded in advance, and at the n-th physical address (where n is O or a natural number), as shown in FIG. Data blocks D1 to Dioo are recorded via a data block (block interval) 36, and data blocks D1 to Dioo have a physical address 37 in the data block and an 8-physical address indicating which data block within that physical address. 38 respectively. A plurality of data blocks are similarly recorded at the (n+1)th physical address.

When the magnetic tape starts running at high speed, light from a light emitting element (not shown) is intermittently received by the light receiving element 15 shown in FIG. 1 at a period corresponding to the running speed of the magnetic tape, thereby causing a pulse train (Taco Pulse) is taken out. Since the running speed of the magnetic tape during high-speed running is known, and the interval between physical addresses is also constant and known, the number of tacho pulses generated per running distance of the - physical address is also known. Therefore, it can be determined which physical address the RAD 17 is scanning for output/reading from the 51 value of the tacho pulse counter 16 that counts these tacho pulses. Therefore, the tacho pulse counter 16 should be used to count the tacho pulse (step 23 in FIG. By determining whether the two match (step 24 in FIG. 2), it can be determined whether the magnetic tape 11 has reached the physical address of the target block (step 25 in FIG. 2).

When the values of the two signals compared by the comparator 8 match, the comparator 8 supplies a match signal to the microprocessor 7. As a result, the microprocessor 7 outputs a rotation stop signal to the take-up reel motor through the reel control circuit 9, and the high-speed running of the magnetic tape 11 is stopped immediately after the values of the two signals compared by the comparator 8 match. Here, in the present invention, the target physical address supplied from the microprocessor 7 to the comparator 8 is corrected by the microprocessor 7 to a value near the approximate center of the area of the target physical address. As shown in step 26 of FIG. 2, the address is located approximately at the center of the target physical address area, i.4. Note that without correcting the target physical address supplied from the microprocessor 7 to the comparator 8, when the microprocessor 7 is supplied with a match signal from the comparator 8 and has moved to approximately the center of the target physical address, The reel rotation stop signal may be generated with a delay.

After the magnetic tape 11 stops running at high speed, the microprocessor 7 issues an end interrupt to the microphone coprocessor 3 in the control unit 2 through the interface control circuit 6 (step 27 in FIG. 2).

As a result, the control unit 2 (microcontroller + j3
) issues a data block read command to the drive unit 5 (microprocessor 7) at step 28 in FIG.
), the magnetic tape 1 is sent from the microprocessor 7 through the reel control circuit 9 in either direction (forward or reverse).
1 to run at a predetermined low speed. As a result, the - data block near the center of the target physical address recorded on the magnetic tape 11 is reproduced by the S-read head 17, and the reproduced signal is supplied to one waveform processing circuit through the read amplifier 18. ,
After the waveform is shaped and converted into a digital signal,
It is supplied to the reading circuit 4 through the interface control circuit 6 and read (step 29 in FIG. 2). When the data block read by the reading circuit 4 is supplied to the microprocessor 3, the microprocessor 3 outputs a signal to the drive unit 5 to stop the running of the magnetic tape 11, and also specifies the target data block by the logical address of the read data block. Check whether it is the same as the logical address of the target block.

If they are not the same, compare the currently read logical address with the logical address of the target block and determine whether the tape should be run in the forward direction or in the reverse direction (step 30 in Figure 2). Issue the next read command to run the tape accordingly. This determination and issuing of the read command may be performed by the control unit 2 or the drive unit 5.

By issuing the above read command, the magnetic tape 11 is caused to run in the direction in which the logical address of the targeter 1 block is read by the interpolation/reading head 17, and reading is continued (step 31 or 32 in FIG. 2), one after another. A read command is issued to reach the logical address of targeter 1 to block (step 33 in FIG. 2). After purchasing the logical address of the target block, the control unit 1-
2 sends a termination interrupt to the host device 1 (step 34 in FIG. 2).

Here, if the physical address "'n path shown in FIG. 4 (△) is the physical address of the target block, conventionally the distance to access the logical address of the target block after high-speed access is as shown in FIG. 4 (B). As shown, the maximum value MΔ
X is the physical address interval, the minimum value MIN is the distance to the first data block, and the average value is 1/2 of the physical address interval. On the other hand, according to the present embodiment, the high-speed access is switched to the low-speed access to the logical address of the target block near the center of the area of the physical address "n," as shown in FIG. 4(C). , the maximum value MΔX of the access distance is approximately 1/2 of the physical address interval.
Since the minimum value MIN is a negative data block distance, the access distance of the logical address after high-speed access is on average about 1/4 of the physical address interval, which is about half of the conventional method. Therefore, according to this embodiment, the average access time can be reduced compared to the conventional method.

〔Effect of the invention〕

As described above, according to the present invention, a physical address assigned to each area when a recording medium is divided into regular intervals, and a logical address assigned to each of one or more data blocks of the same physical address. A recording medium in which multiple data blocks having addresses are sequentially recorded is first run at high speed to access the physical address of the target block, and then run at low speed to read the data blocks while blocking the target block. The total access time of an access method that accesses a logical address can be reduced compared to the conventional method. Therefore, when this method is applied to a cartridge-type magnetic tape subsystem, for example, the processing capacity of the system can be improved. can.

4. Explanation to the drawings: Figure 1 is a block system diagram showing an embodiment of the system of the present invention;
FIG. 2 is a flowchart for explaining the &J operation of the block system shown in FIG. FIG. 4 is a diagram illustrating the difference in accessing the logical address of a data block after high-speed access between the two methods.

Claims (1)

[Claims] A plurality of data blocks having a physical address assigned to each area when a recording medium is divided at regular intervals, and a logical address assigned to each of the one or more data blocks with the same physical address. The recording medium in which data is sequentially recorded is run at high speed in order to access a desired data block, and after detecting the physical address of the desired data block, the recording medium is run at low speed. In an access method in which the logical address of the desired data block is read and positioned to the desired data block, the switching position of the running speed of the recording medium is determined by the physical address of the desired data block. A data block access method characterized by setting the address near the center of the area.