JPS628828B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for creating a diagnostic dictionary for an information processing device, and in particular, when a functional diagnosis is used as the diagnostic method and a diagnostic dictionary is created using a fault simulator, the present invention relates to a method for creating a diagnostic dictionary for an information processing device. This invention provides an efficient method for using a fault simulator in the case where a fault simulator is divided into individual blocks, the fault range of each individual block is divided into a plurality of parts, and a diagnostic dictionary is created for each fault range. .

2. Description of the Related Art In recent years, the use of information processing devices has expanded in all fields, and the social impact when such devices break down has become increasingly large. For this reason, failure diagnosis technology that quickly points out the location of a failure in a device is becoming increasingly important.

One of the methods for diagnosing failures in information processing equipment is called function diagnosis, which involves operating the hardware functions in the same way as when running a normal program, and checking whether there is a hardware failure or not. This is a diagnostic method that monitors the wear condition and determines the location of the failure from the results. This diagnostic method has the advantage that the amount of hardware added to the device for diagnostic control is small.

In order to perform functional diagnosis, a correspondence list of failure groups that can be detected by the input data is required to fully test the functionality of the hardware. call the diagnostic data.

For example, when functionally diagnosing the central processing unit CPU, test inputs are set in the memory and general registers, or the interface between the maintenance/diagnosis device and the CPU.

The clock is incremented until it reaches the circuit to be diagnosed (hereinafter identified by adding a subscript i) among the circuits divided into a plurality of parts.

Step the clock in the circuit i to be diagnosed.

The logic state of the circuit i to be diagnosed is monitored (hereinafter, this will be referred to as scan-out).

If the logical state is different from the normal (fault-free) logical state, the diagnostic dictionary is indexed.

There is a series of procedures, where ~ is specified by the diagnostic design document, and the normal logical state and diagnostic dictionary required for ~ are determined by hardware simulation or software simulation based on the ~ procedure.

In general, a diagnostic dictionary often includes a normal logic state and a diagnostic dictionary.

A method for creating a diagnostic dictionary is a hardware simulation method in which a test input is applied to a normal device to be diagnosed with a simulated fault inserted, and a diagnostic dictionary is created from the response state at that time.

There is a software simulation method that creates a diagnostic dictionary by deploying circuit information of a device to be diagnosed in a computer system, performing fault simulation on test input, and finding a group of faults detected by the test input.
It is common to use this method for large-scale equipment.

In the following, a system that creates a diagnostic dictionary using the method described above will be referred to as a fault simulator, logical calculation processing for test input will be referred to as logic simulation, and detection fault generation processing (fault calculation processing) will be referred to as fault simulation.

The general configuration of a fault simulator is that the hardware consists of a central processing unit, channel control unit, storage device, and input/output device, and the software includes a circuit information table, a fault list table, a logic simulation program, Consists of a failure simulation program and a simulation management program. The circuit information table is
It consists of an area that stores element information from the DA (Design Automation) system, connection information, and element logical values.
The fault list table is an area in which a group of detected faults that are the processing results of a fault simulation program are stored. The simulation management program uses programs and tables other than itself to process a series of procedures specified by the diagnostic designer for executing diagnosis and creating a diagnostic dictionary.

Generally, fault simulation requires a huge amount of storage capacity.

When creating a diagnostic dictionary for a circuit to be diagnosed by fault simulation, the larger the circuit to be diagnosed is both spatially (number of logic elements) and temporally (described as the number of logic stages that require fault simulation, less than or equal to 1 and the number of clocks). As the number of detected fault groups increases, the fault list table that stores them also grows exponentially. Since the storage area used for the actual fault list table is limited, the fault list table will overflow if a fault simulation is attempted for a circuit to be diagnosed that has a size of several tens of thousands of gates and several clocks. For this reason,
Divide the failure range into multiple parts and run failure simulation for each failure range.
Each diagnostic dictionary is created, and the diagnostic dictionaries are superimposed by a process separate from the failure simulator to form a diagnostic dictionary for the circuit to be diagnosed.

Experience shows that the CPU of large information processing equipment (10
If a circuit with 100,000 to 150,000 gates is divided into approximately 100 diagnostic target circuits i, and a diagnostic dictionary is created by fault simulation using a computer system with a storage capacity of 6 MB as a fault simulator, then 3 It is necessary to divide the fault occurrence range for more than 30% of the circuits to be diagnosed, i.
More than 3/4 of the computer usage time required to create a diagnostic dictionary for the CPU was spent creating a diagnostic dictionary for the circuit i to be diagnosed in which the failure range was divided.

Therefore, an object of the present invention is to reduce the computer usage time required to create a diagnostic dictionary when a failure range must be divided.

To this end, the present invention provides functional diagnosis using a fault simulator that has a circuit information table, a fault list table, a logic simulation program, a fault simulation program, and a simulation management program in its main memory. A method for creating a diagnostic dictionary for an information processing device, which divides all circuits to be diagnosed in the information processing device into a plurality of individual blocks, and determines the fault occurrence range for each circuit to be diagnosed in the individual blocks. is divided into multiple parts to create a diagnostic event for each fault range, and the diagnostic dictionary for each fault range is superimposed by a process different from the above fault simulator to create a diagnostic dictionary for the circuit to be diagnosed in the individual block. In the diagnostic dictionary creation method, an intermediate logic file is created, and during the first fault simulator processing to create a diagnostic dictionary for the first fault occurrence range, the effect of input data is calculated immediately before reaching the circuit to be diagnosed. A logic simulation is performed until the clock increments, and after storing all the logic states in the information processing device at that time in the intermediate logic file from the circuit information table, a fault simulation is performed in the circuit to be diagnosed. A diagnostic dictionary for the second fault occurrence range is created, and then during the second and subsequent fault simulator processing to create a diagnostic dictionary for the second and subsequent fault ranges, the above intermediate fault simulator processing is performed during the first fault simulator processing. All the logic states in the information processing device stored in the logic file are read out, set in the circuit information table, and a fault simulation is performed from the logic state whose clock has been incremented, thereby preventing the second and subsequent faults. The present invention is characterized in that a diagnostic dictionary that can withstand the range of occurrence is created.

Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a block configuration diagram of a diagnostic dictionary creation system according to an embodiment of the present invention, in which 1 is a processing unit, 2 is a main memory, 3 is an external memory, 4 is an external memory, 5 is a circuit information table, 6 is a fault simulation program, 7 is a fault list table, 8 is a logic simulation program, 9
10 is a simulation management program, 10 is a procedure statement table, 11 is a diagnostic dictionary file, 12 is a procedure statement file, and 13 is an intermediate logic file. In the figure, the mutual relationships among the internal components (tables, files, programs, etc.) of the processing device 1, main memory 2, and external memory 4 are the same as in the conventional example, and in the present invention, an intermediate logical file 13 is newly added. You can think of it as a profit. In the diagram,
The solid line is the direction of control, and the thick line is the direction of data flow.

FIG. 2 is a diagram showing a specific example of the hardware configuration at the time of diagnosis execution, and in the figure, 20 is a diagnosis target device, 21 is a maintenance diagnosis device, 22 is an external memory of the maintenance diagnosis device, 23 is a diagnosis data file, 24 is the maintenance diagnostic device main memory, 25 is the circuit to be diagnosed, 26
27 is a general-purpose register, 28 is an internal memory, 29 is a clock control circuit, 30 is a scan out circuit, 31 is a scan value holding circuit,
32 is a comparison circuit, 33 is a procedural statement (test input)
A data holding section 34 is a normal value data holding section 35
is a diagnostic dictionary holding unit.

In the figure, various diagnostic data in each holding section 33 to 35 provided in the main memory 24 of the maintenance diagnostic device are as follows.
The diagnostic data for the circuit to be diagnosed i26 is stored in the external memory 22 of the maintenance/diagnosis device. Then, the circuit to be diagnosed j (j≠
i), each diagnostic data type in each of the holding sections 33 to 35 is replaced with the contents of the external memory 22. The diagnostic data file 23 shown in FIG. 2 is obtained by combining the procedure statement file 12 and the diagnostic dictionary file 11 shown in FIG. 1 through separate processing.

Further, the hardware configuration example itself shown in FIG. 2 is the same as that of the conventional system.

Hereinafter, the present invention will be explained based on Examples.

FIG. 3 is a diagram for explaining the diagnostic operation mode when creating a diagnostic dictionary for the circuit i to be diagnosed.
In the figure, (1 to 1) to (δ to n) are logical state monitoring points inside the diagnostic target device that can be read from the maintenance diagnostic device, are the diagnostic target device, are the maintenance diagnostic device,
are general-purpose registers where test inputs are set, the internal memory of the equipment to be diagnosed, and the interface with the maintenance/diagnosis equipment.
~1, w~n), and the circuit to be diagnosed, i, for which a diagnostic dictionary is to be created, is within the fault occurrence range (=
(but if the exact size is unknown, it is better to use >), and A to F are the division ranges,
N ₁ is the circuit to be diagnosed after setting the test input.
The number of clocks required to arrive immediately before , N ₂ ,
N ₃ and N ₄ are the differences in the number of clocks between monitoring points x and y, y and z, and z and w, respectively; for example,
_N2 is the number of clocks it takes for the contents of watchpoint x (usually a flip-flop) to reach watchpoint y.

The specific procedure for the circuit to be diagnosed i shown in FIG. 3 is described by the procedure statement shown in FIG. 4, for example.

In FIG. 4, UNITi indicates the start of a series of procedures for one test input and the delimitation of test inputs, and the parameter i is called the unit number.
indicates the prerequisite and test input settings,
SETREG indicates setting data to a general-purpose register, SETMEN indicates setting data to the device's internal memory, SETCSL indicates setting data to the interface with the maintenance/diagnosis device, and CL
CKx indicates the number of clock steps necessary for the test input to arrive immediately before the circuit to be diagnosed i, and the parameter x is the number of steps. Indicates the start, and also indicates that the failure range is A according to the parameter, and CLCK
y indicates that the number of clock steps in the circuit i to be diagnosed is y, and SCANUT(y~ ₁ )~
(y~n) indicates that the logic states of the logic monitoring points (y~ ₁ ) to (y~n) of the circuit i to be diagnosed are to be read out; is the same as
FSIMLE indicates that the circuit to be diagnosed is the circuit i up to this point, that is, the input of the unit number and the completion of the creation of the diagnostic dictionary in the failure range A.
is a set of procedures for the following test inputs,
TEND indicates that there are no more test inputs for the failure range A in the circuit i to be diagnosed.

Note that the procedural statements FSIMLS- and FSIMLE have meaning only when creating a diagnostic dictionary.

A conventional general processing flow of a simulation management program for executing the procedure shown in FIG. 4 in a failure simulator is shown in FIGS. 5A and 5B.

The process is as follows: (i) If it is UNIT, remember the unit number.

(ii) If it is SETREG, SETMEM, or SETCSL, set the logic value indicated by the parameter to the input/output pin of the element in the circuit information table, and perform logic simulation.

(iii) If it is CLOCK, the fault simulator flag bit is off and the clock is incremented by parameter x to perform logic simulation.

(iv) For FSIMLS, turn on the failure simulation flag bit. Also, it is notified that the failure occurrence range is A in the circuit information table.

(v) If it is CLOCK, the fault simulator flag bit is on and the clock is incremented by parameter y to perform fault simulation.

(vi) For SCANUT, the parameter (y-
1) Store the logical states of the logic elements shown by (y-n) and the fault groups detected by (y-1)-(y-n) in a fault list table.

At this time, this unit number and the fact that this is the first scan-out for this unit are also stored.

(vii) If it is CLCK, it will just be the clock number z
Same as (v) (viii) If SCANUT, the parameter is (z
~ ₁ )~(z~n), which is the same as (vi) except that it is the second scan out (ix) If it is CLCK, the number of clocks is w, but it is the same as (v) (x ) SCANUT, the parameter is (w
~ ₁ )~(w~n), which is the same as (vi) except that it is the third scan out.If ()FSIMLE, the failure simulation flag bit is turned off.

() From UNIT to FSIMLE is (i) ~ (
) is repeated, only the parameters etc. are different.

(viii) If TEND, the process for the circuit to be diagnosed i in the failure range A is ended. If a sentence other than the one specified as a procedural sentence is input, a procedural error will occur.

The above procedure is completed for the failure range A, but in creating the diagnostic dictionary for this circuit i to be diagnosed, A~
Since the fault occurrence range has been divided up to F, it was necessary to change the fault occurrence range to B to F shown in FIG. 3 and repeat the procedure statement ~ five times.

However, since the fault occurrence range is different from range A to range B to F from the first time to the second time onwards, the detected fault groups are different, but we focused on the fact that the logical state of each clock is the same. When creating a diagnostic dictionary for failure range A, if all logical states of the device to be diagnosed immediately before entering the failure simulation are memorized, then the second and subsequent failure ranges B ~
When creating a diagnostic dictionary for F, all the previously stored logical states of the device to be diagnosed are reset in the circuit information table, and then the processing after the failure simulation can be performed, omitting the processing for the procedure statements before the failure simulation. It will be possible. In other words, in the procedure shown in Figure 4, the first time (fault occurrence range A), all procedures up to ~ are executed, but from the second time onwards (fault occurrence range B to F),
UNIT and FSIMLE from FSIMLS and then
UNIT, FSIMLS to FSIMLE,
All you have to do is run TEND.

In order to realize the above method, the present invention provides an intermediate logic file that stores logic states,
A mode indicating whether to use the logical state in the intermediate logical file (corresponds to the first or second time in the above statement) is set as a parameter in the control statement of the simulation management program, and the use is determined by re-run. named.

As shown in FIG. 6, the structure of the intermediate logical file consists of a set of unit number, logical state, and FSIMLS procedure address, and only the number of UNIT statements.

In addition, the processing flow of the simulation management program for realizing the above method is shown in Figure 7 A and B.
Shown below.

In FIG. 7, points different from the conventional method shown in FIG. 5 will be explained.

When processing for the first time, that is, rerun is off, if it is an FSIMLS statement, the logical state, this unit number, and the FSIMLS address counter value are stored in the intermediate logical file.

In the second and subsequent processing, that is, when rerun is on, if it is a UNIT statement, the logic state of the unit matching this unit number is set in the circuit information table from the intermediate logic file.

In addition, the procedure address is set in the address counter so that the procedure statements up to the FSIMLS statement are not executed.

Below, we will compare the running times of the failure simulators of the conventional method and the method according to the present invention for a standard circuit i to be diagnosed when creating a diagnostic dictionary for a device to be diagnosed.

Comparing the processing time of procedural statements, the processing time of other statements is so small that it can be ignored compared to the CLCK statement. Therefore,
The running time of the failure simulator is determined as the processing time of the CLCK statement.

The conditions are: Number of clocks to reach immediately before diagnosis target circuit i = 10 Number of clocks in diagnosis target circuit i = 3 Number of divisions of fault occurrence range = 6 Logic simulation time for 1 clock =
t 1 clock failure simulation time =
5t If the running time of the failure simulator is T, then in the conventional method T = (10t + 3 × 5t) × 6 = 150t In the method according to the present invention, T = (10t + 3 × 5t) + 3 × 5t × 5 = 100t, compared to the conventional method. The method according to the invention is
This is approximately 2/3, and compared to the conventional method, the method according to the present invention reduces the failure simulator running time = computer usage time by 1/3.

Now, if the computer usage time required to create a diagnostic dictionary for a certain device is 400 hours, then 3/4 of that time is 400 hours.
Diagnosis target circuit i where 300H divides the failure range
spent on creating a diagnostic dictionary.

Since 100H out of 300H is reduced by the present invention, the computer usage time required to create a fault dictionary for this device is reduced by 1/4.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of a diagnostic dictionary creation system according to an embodiment of the present invention, FIG. 2 is a diagram showing a specific hardware configuration example at the time of diagnosis execution, and FIG. 3 is a diagram for explaining the diagnostic operation state. Figure 4 is a description example of a procedure statement, Figures 5A and B are the conventional general processing flow of a simulation management program, Figure 6 is the structure of an intermediate logical file, and Figure 7A and B are examples of implementation. 3 is a processing flow of a simulation management program in FIG. In FIG. 1, 5 is a circuit information table, 6 is a fault simulation program, 7 is a fault list table, 8 is a logic simulation program, 9 is a simulation management program, and 10 is a fault simulation program.
is a procedural statement table, 11 is a diagnostic dictionary file,
12 is a procedural statement file, and 13 is an intermediate logic file.

Claims (1)

[Claims] 1. A circuit information table, a fault list table, a logic simulation program,
A method for creating a diagnostic dictionary for an information processing device to be diagnosed by functional diagnosis using a fault simulator having a fault simulation program and a simulation management program, the method comprising: In addition to dividing the circuit into a plurality of individual blocks, the fault occurrence range for each circuit to be diagnosed in the individual blocks is divided into a plurality of parts, and a diagnostic event is created for each fault occurrence range, and processing that is different from the above fault simulator is performed. In the method for creating a diagnostic dictionary in which diagnostic dictionaries for each failure range are superimposed to form a diagnostic dictionary for the circuit to be diagnosed in the individual block, an intermediate logic file is created to create a diagnostic dictionary for the first fault range. During the first failure simulator processing, logic simulation is performed until the clock step immediately before the influence of input data reaches the circuit to be diagnosed, and the entire logic state in the information processing device at that time is calculated from the circuit information table above. After storing it in the intermediate logic file, a fault simulation is performed in the circuit to be diagnosed to create a diagnostic dictionary for the first fault range, and then a diagnostic dictionary for the second and subsequent fault ranges is created. During the second and subsequent fault simulator processing, all logic states in the information processing device stored in the intermediate logic file during the first fault simulator processing are read out and set in the circuit information table. A method for creating a diagnostic dictionary, characterized in that a diagnostic dictionary for the second and subsequent failure ranges is created by performing a fault simulation from the logic state whose clock has been incremented.