JPS628629A - Digital signal transmission device - Google Patents

Abstract

PURPOSE:To prevent deterioration in the S/N while shortening the length of operating word of a filter by comparing a maximum absolute value of an output from an encode filter having each characteristic with a prescribed value and selecting the lowest-order encode filter among those outputting the maximum absolute value being a prescribed value or below. CONSTITUTION:Whether or not each maximum absolute value (peak value) in each block of outputs from plural encode filters 14 is a prescribed positive value L0 is compared by a comparator circuit 23 and the lowest-order of encode filter is selected among plural coincide filters whose peak value is the prescribed value L0 or below. In applying the selection of the filter with priority, the noise level is reduced at a low level input or at no input without prolonging the operating word length. The said prescribed value l0 is selected as L0=2N<-1>-1, where N is a number of bits of the word length (requantized bit number) of a data outputted from a terminal 22 while being applied with requantization by a quantizer 16.

Description

[Detailed description of the invention] The present invention will be explained in the following order.

Industrial application field B0 Overview of the invention C6 Prior art 1 Problems to be solved by the invention E0 Means for solving the problems 29 Effects 0 Example G-1, overall schematic structure G-2, Specific example of encoder G-3, Specific example of filter selection operation G-4, Noise due to finite operation word length G-5, Specific example of measurement results H0 Effect of the invention A, Industrial application field The present invention is applicable to digital signals. Relating to a transmission device, particularly the bits of a digital signal to be transmitted.

The present invention relates to a digital signal transmission device that is preferably applied to a bit reduction system that reduces the rate.

B0 Summary of the Invention The present invention selects one of the encoding filters having a plurality of mutually different characteristics, and transmits a digital signal through the encoding filter having the selected characteristic. In the device, as one of the criteria for selecting the characteristics of the above-mentioned rainbow code filter, the maximum absolute value of the output from the encode filter for each characteristic is set to a constant value.

By selecting the lowest-order encode filter that outputs the maximum absolute value below this value Lo, it is easier to select a lower-order filter when a small signal is input, and the filter It is possible to prevent S/N deterioration by shortening the operation word length.

C1 Prior Art Predictive filter processing is known as an information compression technique for reducing the transmission bit rate when converting audio signals, video signals, etc. into digital signals and transmitting them. This extracts and transmits the error between the input signal and its predicted value signal, and the higher the prediction is performed, the greater the prediction gain can be obtained and the information compression rate increases.

However, when performing such high-order predictive filter processing, the information compression rate decreases when the input signal is in a high frequency range. For example, Japanese Patent Application No. 59-278501 proposes a signal transmission device in which a plurality of encoding filters are provided in advance so as to obtain a signal, and one of the plurality of filters is selected.

That is, in this prior art, an input digital signal is divided into blocks of a certain number of words along the time axis, and the signal of each block is transmitted through a filter for obtaining a prediction error. , N
A plurality of filters each using the following predictor and an eighth-order or lower predictor are provided, and the maximum absolute value or the maximum absolute value multiplied by a coefficient of the output from each filter in the block is compared with each other, and A signal transmission device is disclosed that is characterized by selecting a filter with a minimum value,
As a result, the selection of each of the above filters is performed depending on the frequency of the main component of the input signal.

Problems to be solved by the D0 invention By the way, when trying to reduce the transmission bit rate using predictive filter processing as described above, in order to obtain an ideal S/N improvement close to the theoretical value, It is necessary to make the arithmetic word length of the digital filter sufficiently long.

For example, the prediction gain using the second-order predictor is 86
When a dB encoding filter (FIR digital filter) is used on the encoder side, the II on the decoder side
As for the operation word length of the R digital filter, a margin of at least 6 bits is required on the lower side than the LSB (least significant digit). Furthermore, even if a 6-bit margin is provided, the noise level during unattended operation cannot be made equal to the noise level of a PCM signal that is not subjected to normal bit compression processing, and in order to equalize the noise level, the operation word length must be further increased. I need to take it. Therefore, the word length of multipliers such as IIR digital filters, adders, memories, etc. becomes long, and the circuit scale becomes large.

In view of these circumstances, the present invention provides a digital signal transmission device that can obtain an S/N close to or equivalent to the theoretical value with the same or shorter calculation word length than the conventional one, and has a simple configuration. For the purpose of providing.

E1 Means for Solving Problems In order to solve the above-mentioned problems, a digital signal transmission device according to the present invention divides an input digital signal into blocks for each predetermined number of words, and processes the digital signal for each block. In a digital signal transmission device that selects any one of a plurality of encoding filters having mutually different characteristics and transmits the digital signal through the selected filter, a method for selecting the encoding filter is provided. As one condition, the maximum absolute value in the block from the encoding filter for each of the above characteristics is compared with a constant value LO, and the lowest-order filter of the filter that outputs the maximum absolute value of the block below this value Lo. The feature is that you can select a filter.

10 When the input signal is at a minute level, at least one of the maximum absolute values within each block of the output from the encode filter of each characteristic is equal to the above-mentioned constant value.

The lowest-order filter that outputs the maximum absolute value less than or equal to LO is selected. In other words, when inputting a small signal in which the lower side margin bits of the operation word length inside the filter are important, a low-order side filter that does not require much lower side margin bits of the operation word length is selected, so the lower side margin bits are It is possible to prevent S/N deterioration even if the length is shortened.

G. Embodiment Hereinafter, an embodiment in which the digital signal transmission device according to the present invention is applied to an audio bit rate reduction system will be described with reference to the drawings.

G-1, Overall Schematic Configuration 1st rgJ is a block circuit diagram showing the overall schematic configuration. The audio bit rate reduction system shown in FIG. 1 is composed of an encoder 10 on the recording side (or generally on the transmitting side) and a decoder 30 on the playing side (generally on the receiving side). The input terminal 11 is supplied with an audio PCM signal x(n) obtained by sampling an analog audio signal at a frequency f3 and subjecting it to quantization and encoding.

This input signal X() is sent to the predictor 12 and the adder 13, respectively, and the predicted signal
n) is sent to the adder 13 as a subtraction signal. Therefore, in the adder 13, the input signal x(n
) by subtracting the prediction signal x (n) from the prediction error signal or differential output (in a broad sense) d (n
l, that is, d(n)=x (nl −x (nl
・・・・・・・・・・・・・・・■ is output.

Here, the predictor 12 generally uses p past inputs X(n
-p) l X(n-p+1) ,...tx(n-
The predicted value x(n) is calculated by the linear combination of 1), x'(n)=, fαh−X(n k) ・
・・・・・・・・・・・・・・・■1m11 However, αk (k==1.Z,...,p) is a coefficient. Therefore, the above prediction error output or (in a broad sense)
The differential output d (n) is expressed as d (n) = x (nl−Σα−x (n−k
) ・・・・・・・・・・・・・・・■ can be expressed as . The FIR filter 14 for obtaining such a prediction error output d (n) is hereinafter referred to as an encoding filter or a differential processing filter.

In addition, in this embodiment, data within a certain period of time of an input digital signal, that is, input data of a certain number of words j, is divided into blocks, and the above-mentioned encoding filter (differential processing filter) with optimal characteristics is applied to each block. I am trying to select 14. For example, as shown in FIG. 2, a plurality of (for example, eight) encoding filters 14A, 14B, and 14C having different characteristics are provided in advance, and the optimum characteristics of these filters 14A to 14C are selected. This can be achieved by selecting a filter. However, in the configuration of a general digital filter, a plurality of sets (for example, 8 sets) of the coefficient α of the predictor 12 of one encode filter 14 shown in FIG. 1 are stored in a coefficient memory or the like. By switching and selecting one or more sets of coefficients, an operation substantially equivalent to selecting one of the plurality of encoding filters described above is often performed.

Next, the difference output d (n) as the prediction error is passed through the adder 21 to the shifter 15 with the gain G, and the exponent part in the quantization form is the gain G, and the mantissa part is the output from the quantizer 16. Compression processing or ranging processing corresponding to each is performed. That is, the shifter 15 switches the so-called range by shifting the digital binary data by the number of bits corresponding to the gain G (arithmetic shift), and the quantizer 17 changes the range of the bit-shifted data. Requantization is performed to extract a certain number of bits. Next, the noise shaping circuit (
The noise shaper 17 uses an adder 18 to obtain a so-called quantization error corresponding to the error between the output and the input of the quantizer 16, and sends this quantization error to the predictor 20 via a shifter 19 with a gain of G. So-called error feedback is performed in which the predicted signal of the quantization error is fed back to the adder 21 as a subtraction signal. In this way, requantization by the quantizer 16 and error feedback by the noise shaping circuit 17 are performed, and an output Q(n) is taken out from the output terminal 22.

By the way, the output d (n) from the adder 21 is obtained by subtracting the predicted signal e (n) of the noise shaper 17 from the difference output d (n).
= d (n) −e (n) ...
......■, and the output d (n) from the shifter with gain G is d (n) = G - d (river
・・・・・・・・・・・・・・・■
becomes. Furthermore, the output Q(nl) from the quantizer 16 is the quantization error in the quantization process, e(nl),
a(n)=dτn) 10e(n)...
・・・・・・・・・・・・■The above quantization error e(n) is taken out in the adder 18 of the noise shaper 17, and passed through the shifter 19 with a gain G-1 to the past 1
The predicted signal e (n) of the quantization error obtained through the predictor 20 which takes a linear combination of inputs is expressed as e (nl = Σβ - e (n k) · G . . .
・・・・・・・・・・・・■ becomes ■l. This equation 0 has the same form as the equation 0 described above, and the predictors 12 and 20 are FIR (finite impulse response) filters with system functions as follows.

From these 0 to 0 formulas, the output from the quantizer 16 (・
) is the sum (nl = G − (d(n) − e(n)) + e(n
) Substituting the above equation 0 into d(n) of this equation 0 and making the conversions X(z), E(Z), and D(z), respectively, = G-X(z)(1-P( zl) 10B(zl(1
-4Qz)) ・−・■.

Next, the prediction/range adaptation circuit 24 outputs mode selection information as optimal filter selection information, and the encode filter (difference processing filter) 14, for example, the predictor 12 and the noise shaping circuit 1T, outputs mode selection information as optimal filter selection information. is sent to the predictor 20 and the output terminal M,
Furthermore, range information for determining the gains G and G or the bit shift pattern is output and sent to the valley shifters 15 and 19 and the output terminal -M.

Here, the selection operation of the optimal filter in the prediction/range adaptation circuit 24 may be the same operation as the signal transmission device of Japanese Patent Application No. 59-278501 previously proposed by the inventors of the present invention, or The maximum absolute values (peak values) of the outputs from a plurality of characteristic encoding filters (differential processing filters) in each of the above blocks or values obtained by weighting these peak values with a predetermined value are compared with each other, and the value is determined to be the minimum. Although an operation such as selecting a code filter may be performed, the filter selection operation, which is the main part of the present invention, is performed in priority to such selection of an optimal filter. In this preferential filter selection operation, the comparison circuit 2 checks whether the maximum absolute value (peak value) in each of the blocks of the outputs from the plurality of encode filters is equal to or less than a predetermined positive value Lo.
3, and selects the lowest one among the plurality of encode filters whose peak value is equal to or less than the constant value Lo. By performing this preferential filter selection, as will be described later, it is possible to eliminate noise during low-level input or unattended operation without increasing the calculation word length.
It is possible to reduce the level. Note that the above constant value Lo
When the word length (number of requantization bits) of data requantized by the quantizer 16 and output from the terminal 22 is N bits, Lo = Z ~l may be set, for example.

Next, the input terminal 31 of the decoder 30 on the receiving or reproducing side is supplied with a signal G'(n) obtained by being reproduced from the output terminal of the encoder 10.

This input signal d'(n) is sent to an adder 33 via a shifter 32 with a gain of G. Output x from adder 33
'(n) is sent to the predictor 34 and added to Δl. This addition output is output from the output terminal 35 as the decode output x(n).

Further, the range information and mode selection information outputted from each output terminal 26 and 27 of the encoder 10 and transmitted or recorded/reproduced are inputted to each input terminal 36 and 37 of the decoder 30, respectively. The range information from the input terminal 36 is sent to the shifter 32 to determine the gain G, and the mode selection information from the input terminal 3T is sent to the predictor 34 to determine the prediction characteristics. The prediction characteristic of this predictor 34 is selected to be equal to the characteristic of the predictor 12 of the encoder 10.

In the decoder 30 having such a configuration, the output d(n) from the shifter 32 is as follows.

d(n)=8'(n)・G-"...
・・・・・・・・・＠, and the output of the adder 33 is: 1 river=Q'fl+71・)
・・・・・・・・・・・・・・・◎. Here, since the predictor 34 has the same characteristics as the predictor 12 of the encoder 10, from the formula, (n
k) ”,”1. ■ml. Next, if the transformations of 仝(n) and Gin) are respectively Da(・) and Rei1・), then Cross(・)=Ig(Z)Jujitsu...Da(・)...-・mm
1 = G-'', can Z) + P (Zl-cost'(Z),
-0,-0,-1゜Therefore, if we assume that '('') '' e (z), then the above 0
From formula and formula 0, it becomes.

From this equation 0, it is clear that a noise reduction effect of G can be obtained for the quantization error E(z), and at this time, the spectral distribution of noise appearing in the decoder output is expressed as N(z
), then G-2, Specific example of encoder Next, FIG. 2 shows a specific example of the encoder 10 of the above-mentioned bit rate reduction system.
Among the parts in the figure, the parts corresponding to the valleys in FIG. 1 are given the same reference numerals.

In FIG. 2, as the encoding filter (difference processing filter) 14, a plurality of, for example, eight filters 14A, 14B, and 14C are provided in advance, and these filters are set for each block according to the input signal. 14A
~14C is selected with the optimum characteristics. These encoding filters 14A-14
C has predictors 12A to 12C, respectively, and is configured such that the output from each predictor 12& to 12C is sent to each adder 13A to 13C, and subtracted from the original input signal, respectively. That is, each predictor 12A, 12B, 1
2C(7) System function PI(Z).

When Pz(Z) and Pa(z), each filter 1
The transfer functions of 4A, 14B, and 14C are 1-P, respectively.
i(z), IR(z), 1-Pg('').An example of the characteristics of each of these filters 14A, 14B, and 14C is shown in characteristic curves A, B, and C in FIG. 8, respectively.

In this FIG. 8, each characteristic surface 111A, B
, C is, for example, A: I PI (z) = 1 B: 1- Pg (Z) = 1-0.9375 z-
1C: l-Pa(z)=1-1.796875z
+0.8125z-", and the sampling frequency f
S is set to 37.8kHz. That is, the characteristic curve A
From filter 14A corresponding to normal straight PC
M data is output and filter 1 corresponding to characteristic surface @B
The first difference PCM data is output from 4B, and the characteristic surface I
Second-order differential PCM data is output from the filter 14C corresponding to the IC.

Each of these encoding filters 14A, 14B, 14
The output from C is each! Word (l block) delay circuits 41A, 41B, 41C and maximum absolute value (peak value) hold circuit 42A.

42B and 42C, and each l word delay circuit 4
The respective outputs from 1A, 41B, and 41C are sent to selected terminals a, b, and c of a mode changeover (or filter selection) switch circuit 43, respectively. Namely, the valley! The word delay circuits 41A, 41B, and 41C each delay the l blocks, and during this time, each maximum absolute value (peak value) hold circuit 42A, 42B, and 42C processes each output data from each filter 14A, 14B, and 14C. di(n), da(river, maximum absolute value (peak value) within each block of da(n) dll)H
-d, p-kin? dspH is detected. However, m means the block number, and generally, when the largest integer not exceeding the number X is expressed as [X°], it is one word! Since it is a block, the above-mentioned intra-block peak value d t ptn)
+d z pbI) +dspt'11) are coefficient multipliers 44A and 44B, respectively.

44C, the weight (coefficient) β0. β2. It is multiplied by β3 and sent to the prediction/range adaptation circuit 24. In the prediction and range adaptation circuit 24, each coefficient multiplier 44A, 4
The above weighted peak values from 4B and 44C, β1”dlp(b), β2・dip−2β8・
dsp- are compared with each other, the smallest value among them is detected, and mode selection information for selecting the encoding filter that outputs this smallest intra-block peak value is output. This mode selection information is sent to changeover switch 43, predictor 20, and output terminal 26.

Here, the weighting coefficients βl, β2 . For example, βB is about 0.7
, 1, 2.0, each encode filter 1
FIG. 4 shows how 4A, 14B, and 14C are selected.

In FIG. 4, the frequency response to the characteristic curve corresponding to the filter 14A that outputs the straight PCM data is lowered by about 8 dB ( Song 1f moved to the lower level side)! Regarding the characteristic curve C corresponding to the filter 14C that becomes AA and outputs the second-order difference PCM data, the coefficient multiplier 44C calculates βa”2.0.
The curve C is weighted upward by about 6 dB (toward the high level side). Note that the characteristic curve B corresponding to the filter 14B that outputs the first-order difference PCM data is not weighted by the coefficient multiplier 44B (β
2=1], the original song @B is used as is. In these curves A and B, and in the response circuit 24, these characteristic surfaces @A, B.

Since the lowest level of C is selected, as shown by the bold line in FIG. 4, when the frequency of the input signal is low, straight PCM mode selection information is output. and,
When the mode selection information from the prediction/range adaptation circuit 24 is the straight PCM mode, the selector switch 43
is connected to the selected terminal a, and filters 14A to j
Straight PC obtained via word delay circuit 41A
The M data is sent from the changeover switch 43 to the adder 21 at the next stage. Similarly, when the mode selection information is the first-order difference PCM mode, the selector switch 43 is connected to the terminal, and the first-order difference PCM data obtained from the filter 14B via the delay circuit 41B is sent to the adder 21. Also, when the mode selection information is the second-order difference PCM mode, the selector switch 43 is connected to the terminal C, and the second-order difference PCM data obtained from the filter 14C via the delay circuit 41C is sent to the adder 21. sent to.

Therefore, the frequency response of the output d(n) sent from the changeover switch 43 to the adder 21 is expressed as the thick line in FIG.

Furthermore, in the present invention, the peak value within the block of the output from the encode filter on the low-order side is set to a constant value, giving priority to mode switching or optimal filter selection operation mainly depending on the frequency of the input signal. When the value is less than or equal to Lo, an operation is performed in which the filter is selected as the optimal filter.

In general, the constant value LO at this time is determined depending on the word length or requantization bit number N of the transmission data requantized by the quantizer 16 and sent out from the output terminal 22, for example, LO=2− It may be set to 1. - For example, when the number of requantization bits is 4 bits (N==4), Lo
If it is set to "7", the data can be transmitted without missing bits during the requantization. That is, the intra-block peak value (maximum absolute value) d of the straight PCM data from the filter 14A
When lp- is less than the above LO "7", the filter 14A for outputting PCM data (stray regardless of the input signal frequency) is preferentially selected, and the filter 14A for outputting PCM data is preferentially selected, and the filter 14A of higher order (large predicted gain) higher than the first-order difference is selected. Differential processing filters 14B, 14
C is not selected, and even if the intra-block peak value dt9 (E) is larger than the above-mentioned LO, the intra-block peak value d2p) of the first-order difference PCM data from the filter 14B is Lo. 7'' or less, the first-order difference processing filter 14B is selected preferentially, and the second-order difference processing filter 14 of a higher order (with a larger prediction gain) is selected.
I try not to select C. The intra-block peak values dxp (e) and d2p (e) of data from each of these low-order filters 14A and 14B (with small predicted gains) are sent to the comparator circuit 23 so that the above-mentioned constant value L
The comparison result is sent to the prediction/range adaptation circuit 24, and the preferential selection of the optimal filter as described above is performed. Therefore, the mode selection information from the prediction/range adaptation circuit 24 is such that the mode selection according to the above-mentioned filter output level is performed in preference to the mode selection according to the input signal frequency.

G-3. Specifics of filter selection operation Next, in the encoder 10 of FIG. 2 as described above,
A specific example of the operation when performing the above-mentioned preferential optimal filter selection will be explained with reference to the flowcharts of FIGS. 5 and 6.

First, in FIG. 5, in step 101, the intra-block peak value dlL of the stray 1-PCM data is determined.

It is determined whether or not p6n) is less than the above-mentioned fixed value (e.g., "7"), and if YES, the process proceeds to step 102, where the straight PCM data di(n) or pointer address in the block is stored in the register C. If NO, the process proceeds to step 103.

In step 103, it is determined whether the in-block peak value dzptnl of the primary difference PCM data is less than or equal to the constant value LO, and if YES, the process proceeds to step 104 where the primary difference PCM data dz (nl or its The pointer address is stored in the register FLC, and if No, the process proceeds to step 105.

The above operation corresponds to the preferential filter selection operation in the comparator circuit 23 of FIG.
The operation after 05 was first filed by the applicant in the patent application filed in 1982-27.
This corresponds to the optimum filter selection operation similar to the technique proposed in No. 8501 and the like.

That is, in step 105, the straight PC
The above weighting is calculated by multiplying the intra-block peak value dtp(m) of M data by a coefficient βl (for example, β1=0.7).
t-dxptn) and the block value ct2p (e) of the first-order difference PCM data are weighted by the coefficient β2 (for example, β2
It is determined whether βl-dip(e) is smaller than β2·d2p(JTl) by comparing the product β2·dip− multiplied by β2·d2p (=1.0). If YES, proceed to step 106; if NO, proceed to step 106. Proceed to step 107. Step 1
In 06, the above value β1-d1p#n) is stored in the register RB, and the straight PCM data d1 (
nl or its pointer address to register R1c.
and proceed to step 108, and step 10
At step 7, the value β2·d2p- is stored in the register Re, and the primary difference PCM data dz(n) or its pointer address is stored in the register Rc, and the process proceeds to step 108. In step 108, the intra-block peak value dBpM of the second-order difference PCM data is weighted by a value β8 multiplied by a coefficient β3 (for example, β3=2°0).
・d8p- is the data in the register RB (this is stored in RB)
), and if YES, proceed to step 109; if NO, proceed to step 110. Next, in step 109, the second difference PC
After storing the M data da (nl or its pointer address in the register Re), the process proceeds to step 110.

In step 110, the data at the address specified by the data in register FLc or the data in Rc is sent to the next stage ranging and noise shaping circuit system as optimal filter output data. Note that the process also proceeds to step 110 after each of steps 102 and 104 described above is executed.

The design of each step in the flowchart shown in FIG. 5 can be changed in various ways, and substantially the same operation as shown in FIG. 5 can be achieved by, for example, the procedure shown in FIG. 6.

That is, in FIG. 6, the intra-block peak values are determined in order from the higher-order difference processing filter. First, in step 201, the weighted intra-block peak value β8 is determined for the second-order difference filter.・
After storing dap (n) in register RB and storing data ds (b) in the block or its pointer address in register Re, step 20
Proceed to step 2. In step 202, it is determined whether the intra-block peak value dzp of the primary difference PCM data is less than or equal to the above-mentioned constant value Lo, and if No, the process proceeds to step 203, and Y
If ES, the process proceeds to step 204. In step 203, each weighted intra-block peak value β2·d
It is determined whether ip(E) is smaller than β8·dap-. If YES, the process proceeds to step 204; if NO, the process proceeds to step 205. In step 204, the weighted peak value β2·d,p(e) is stored in the register 5iELn, and the data dz(n) or its address is stored in the register Rc, after which the process proceeds to step 205. In step 205, it is determined whether the in-block peak value dlp(e) of the straight PCM data is smaller than the above-mentioned constant value Lo, and if No, the process proceeds to step 206,
If YES, proceed to step 207. In step 206, it is determined whether the value βl·dlp (1m) is smaller than the data (Ra) in the register R'B, and YES is determined.
If , proceed to step 207, if No, proceed to step 20
Proceed to B. In step 207, the data dt(nl or its address is stored in the register Re, and in step 20
Proceed to step 8. Step 208 is step 11 in FIG. 5 above.
0, and the data in the register Rc or the data at the address specified thereby is sent to the next stage circuit section as optimal filter output data.

By executing the filter selection operation according to the procedure of the flowchart shown in FIG. 5 or FIG. At the time of a minute input such that the value is less than a certain value Lo (for example, in the case of 4-bit transmission, Lo = 7),
A lower-order filter is selected preferentially, that is, a first-order differential processing filter is selected over a second-order differential processing filter, and a PCM data output filter is selected preferentially over a first-order differential processing filter. In general, the constant value LO may be set to Lo = 2-1 when the requantization bit is N, as described above.

G-4. More than noise due to finite operation word length, when the filter output level is small, by preferentially selecting a low-order filter (with a small prediction gain), the operation word length inside the filter can be reduced. The noise level can be kept low even if it does not take a long time.

This is because a filter with a small prediction gain is advantageous against noise caused by the limited word length of the operation.
The reason is explained below.

Here, the digital filters such as the predictors 12, 20, 34, etc. described above generally perform arithmetic processing such as multiplying input data or its delayed output data by a coefficient or adding these data. However, if the word length of this calculation process is set to be finite, noise due to truncation or rounding, or so-called calculation error, will occur.

These calculation errors are calculated as erz for each filter.
(n) p era (b) + ers (as a river, each two transformations are expressed as ER1(z) as shown in Figure 7.
, ERz(z), ERs(zl).In other words, on the encoder 10 side, a filter 14 including a predictor 12 whose transfer function or system function is P(z)
Let ERR (El be the calculation error at
Let the calculation error in the filter including 0 be ER,2(Z),
Furthermore, on the decoder 30 side, the system function is P (
The calculation error in the filter including the predictor 34 of zl is expressed as ER@
(z). The noise added by each of these filters is scattered as white noise without correlation with the input signal. Considering these noises and finding the encoding and decoding characteristics, x(z) (1-p(zl) - ERA(Z) =
D(z) -------...-@(D(zl E(z
l-iR(zl-ER2(Zl) G1FJ(Zl
=Xu Z)・・・・・・・・・[Phase] Substituting the 0 expression into the [Phase] formula and sorting it out, the encoded output is z))-G(ER□
(zl+ ERz(Z))+E(z) (1-R(z
) ) ・・・・・・・・・・・・・・・◎Similarly, the decoding characteristics are: Q(z)=e(z) −G−1+ P(Z)・6z)+
E R11 (Z) ..."@co7, transmission% GC engineering, -ka5 no mo.In B, set Rei1 □) = e (z) and substitute the 0 formula into the 0 formula,...・・・・・・・・・・・・［
As a result, the filter processing added by each filter will appear in the output. this is,
This means that the prediction accuracy of the encoding filter 14 is advantageous against noise due to the above calculation word length.

By the way, when applying an audio bit rate reduction system such as this embodiment to an optical data file disk system, so-called CDR, 0M system, etc., general users will be required to use an optical disk playback system. Since it is sufficient to have a device such as a so-called CD ROM player and there is no need to record data, even if the configuration of the encoder 10 is complicated to some extent, the decoder 30
It would be sufficiently practical if the configuration of could be simplified.

Taking these points into consideration, it is assumed that the encoder 10 side can have a sufficiently long operation word length, and the encoder side noise ER1 (ZI and ERz (z
) are both set to 0. At this time, the calculation word length required on the decoder side, that is, the maximum allowable noise B Rs (z
) will be considered.

Figures 8 and 9 schematically show the signal levels at each point a to e in Figure 7 above when the second-order differential mode is selected. In the case of data expressed within a range of 4 bits from the LSB (least significant bit), Figure 9 shows the case of data expressed within a range of 10 bits from the LSB with a relatively high input signal level. There is.

Here, in the differential processing filter 14, the predicted gain in the second-order differential mode is as large as about 86 dB on the low frequency side (about DC to 1 kHz), which is equivalent to being shifted by about 5 to 6 bits. , corresponds to the level shift from point a to point b in FIGS. 8 and 9. Next, ranging processing and noise shaping processing are performed by the shifter 15, the doji generator 16, and the noise shaping circuit 1γ. In this system, when the word length of the data to be transmitted after being subjected to ranging processing is 4 bits, the bit extraction position during ranging for the smallest input signal is the LSB (least significant bit).
The range is from Bo to the 4 upper bits Bs. Therefore, as shown in FIG. 8, the data at point b, which has been shifted below the LSB (that is, bit Bo) by the above-mentioned difference processing, is changed by the above-mentioned noise shaping processing as a change in Pip) Bo, 43s (8th bit).
(bold line arrow at point C) will be transmitted. This means that even the 4 bits Bo to B3 are low for low frequency signals.
This is because noise shaping makes it possible to transmit signals up to 6 bits lower than SB (bit B), and the low-frequency components of noise exist 6 bits lower than LSB (approximately 136 dB below). It turns out.

Next, 9, the decoder 30 receives the above-mentioned 4
Bit data is supplied to point d, and lower 6 bits are further generated from this 4-bit data through decoding processing to restore the data input to point a. In addition, in FIG. 9, the operation at a normal input level is shown for reference.

As is clear from the above explanation, when using a filter with a prediction gain of approximately 86 dB in the second-order difference mode, the calculation word length on the decoder side is approximately 6 bits lower than the LSB, especially when a small signal is input. I understand that you need some leeway.

Furthermore, according to actual measurement data, even if the lower 6 bits have a margin in unattended operation, it is still insufficient. It is also possible that there is an effect of so-called limit cycles, where .

Therefore, in the present invention, as described above, by preferentially selecting a low-order filter, that is, a filter with a small prediction gain, when the input is small, the margin bits lower than the LSB of the operation word length need not be lengthened. This makes it possible to achieve a sufficient S/N ratio.

That is, for example, when the input signal is a small input signal that can be expressed within the number of requantized bits N, even if the signal is compressed by high-order (first-order or higher) differential processing, there will be no S/N improvement effect at all. Instead, only the negative effects due to the limitation on the operation word length during decoding will increase. At this time, the intra-block peak value d1ptnl of the straight PCM data is a constant value Lo(
= 2 - 1), so the PCM mode encoding filter (filter 14A in Figure 2) is selected, and the input original sampling peak value PCM data (however, the number of valid bits as a signal is The requantization frequency is less than or equal to N. ) is requantized and transmitted as is (the lower N bits are taken out), and the original input signal can be restored without being affected by noise due to the operation word length limit, and as a result, the S/ N
Good decoding output can be obtained.

Furthermore, even if the effective signal component of stray) PCM data exceeds N bits, the primary difference output is expressed within N bits, and the peak value d2p- within the block is a constant value Lo (=2
-1) or less, the S/N improvement effect cannot be obtained even if a higher-order (larger prediction gain) second-order difference mode is selected, so it is sufficient to transmit first-order difference PCM data. In the decoded output at this time, noise due to the arithmetic word base restriction can be suppressed to a lower level than in the second-order difference mode.

Furthermore, overall, the proportion of low-order filters with small prediction gains being selected increases, so when a code error occurs, the negative effects of large prediction gains can be suppressed to some extent, and as a result, the code It is robust against errors.

G-5. Specific Example of Measurement Results Next, specific measurement results regarding the decoded output obtained by the above configuration and operation will be described.

FIG. 10 is a block circuit diagram showing a specific example of the decoder 30 in FIG. It has the configuration of an apparently second-order FIR (finite impulse response) digital filter consisting of 45 filters. Note that by inserting and connecting the predictor 34 having this FIR filter configuration into the feedback path returning from the output side of the adder 33 to the adder 33 itself, the overall apparent second-order I
An IR (infinite impulse response) digital filter is constructed.

When a digital signal with a word length of, for example, 16 bits is supplied from the shifter 32 to the II filter consisting of the adder 33 and the predictor 34, the LSB (least significant bit) of the word length of 16 bits is X on the lower side
It is assumed that calculations are performed within the filter by adding extra bits, and the word lengths of each part of the calculation at this time are shown in FIG.

When the decoder 30 having the configuration shown in FIG. 10 is used, and the encoder side has sufficient lower margin bits (for example, 6 bits or more) during filter calculation, and the preferential filter selection process described above is not performed ( The S/N measurement results of the decoder output for a comparative example (hereinafter referred to as a comparative example or an example without processing) and a case in which preferential filter selection processing according to the filter output level is performed as in the present invention are shown in Figures IEII and IEII. Shown in Figure 18.

First, FIG. 11 shows the noise level of the decoder output with respect to the input signal level, and -Fri! i! A shows the case where the preferential filter selection process of the present invention is applied and the lower side margin bit (x) of the decoder 30 in FIG. 10 is set to 4 bits. Also, the broken lines and C in Figure 11
Both indicate the case without treatment, which is the comparative example above,
An example is shown in which the lower margin bit (x) on the decoder side is 6 bits for b and 4 bits for C.

As is clear from FIG. 11, when the input level becomes smaller, the lower margin bits in the comparative example (example without processing) are 6 bits (folding [b)] and 4 bits (folding i!I).
Although the difference in valley noise level is large between case C), in the example (broken line a) in which the processing of the present invention is applied, even if the lower side margin pitch l-X is as small as 4 bits, it is still much lower than the above comparison. The noise level is comparable to that in the example 6-bit case (broken line C), and S/N deterioration is suppressed.

Next, FIG. 12 and FIG. 13 show the frequency spectrum of the decoder output. FIG. 12 shows the case when the preferential filter selection process of the present invention is applied, and FIG. The cases without treatment are shown in each case.

It should be noted that the operation word lengths both have a margin of 6 bits on the lower order side. Furthermore, in each figure, A indicates the case when a 1 kHz signal at -60 dB is input, B indicates the case when the input signal is -80 dB and 1 kHz, and C indicates the case when there is no human power.

When the level of the input signal changes in this way, in the example of FIG. 12 in which the process of the present invention is performed, A(7) -60
The first-order difference mode and the second-order difference mode are selected according to the dB and 1kHz input, and only the PC'M mode (stray) is selected according to the B-80dalkHz input, and the C
Only the straight PCM mode is selected even during unmanned operation. In contrast, the first sample without treatment as the comparative example above
In the case of Figure 8, the first-order difference mode and the second-order difference mode are selected for A's -60dB 1kHz input, but the first-order difference mode is selected for B's -80dB, 1kHz input. and the second-order difference mode is selected for the unmanned force of C.

Comparing these Fig. 12 and Fig. 18, it is found that when a minute signal is input (including when unmanned), Fig. 13 of the comparative example
It can be seen that the S/N ratio of FIGS. 12B and C according to the present invention is clearly improved compared to FIGS. In particular, when unmanned, the noise level in the entire band of Figure 18C is -89
, 9 dB, whereas the noise level in FIG. 12C is suppressed to 4 dB at 3.7', and an excellent S/N improvement effect is obtained.

H0 Effects of the Invention According to the digital signal transmission device of the present invention, when a small signal is input, a low-order filter with a small predicted gain is more likely to be selected, so that the calculation word length when using a high-order filter with a large predicted gain It is possible to suppress the noise due to the limitation of . Furthermore, since the proportion of low-order filters selected increases, the effect of being resistant to code errors can also be obtained at the same time. Furthermore, at least the lower margin bits of the filter internal calculation word length on the decoder side can be made smaller, so the circuit configuration of the decoder can be simplified.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block circuit diagram schematically showing the overall configuration of an embodiment of the present invention, FIG. 2 is a block circuit diagram showing a specific example of the encoder in FIG. 1, and FIG. The figure is a graph showing a specific example of the frequency characteristics of each encode filter in Figure 2.
FIG. 7 is a graph for explaining an example of filter selection operation according to the input signal frequency, FIG. 5 and FIG. 6 are flow charts showing examples of different procedures of optimal filter selection operation according to the present invention, and FIG. 8 and 9 are graphs showing each signal level at point a-6 in FIG. 7 for input signals of different levels, respectively. Figure 10 is a block circuit diagram showing a specific example of the decoder in Figure 1, Figure 11 is a graph showing the noise level of the decoder output with respect to the input signal level, and Figures 12 and 18 are the frequency spectra of the decoder output. This is a graph showing.

Claims (1)

[Claims] An input digital signal is divided into blocks for each predetermined number of words,
A digital signal transmission device that selects one of a plurality of encoding filters having mutually different characteristics for a digital signal of each block, and transmits the digital signal through the selected filter, As one condition for selecting the encoding filter, the maximum absolute value in the block from the encoding filter for each of the characteristics is compared with a constant value L_0, and the maximum absolute value in the block that is less than or equal to this value L_0 is determined. A digital signal transmission device characterized in that the lowest-order filter is selected from among output filters.