JPS628602Y2 - - Google Patents
Info
- Publication number
- JPS628602Y2 JPS628602Y2 JP1831078U JP1831078U JPS628602Y2 JP S628602 Y2 JPS628602 Y2 JP S628602Y2 JP 1831078 U JP1831078 U JP 1831078U JP 1831078 U JP1831078 U JP 1831078U JP S628602 Y2 JPS628602 Y2 JP S628602Y2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- coupling capacitor
- input
- circuit
- input electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 15
- 239000003990 capacitor Substances 0.000 claims description 13
- 238000006243 chemical reaction Methods 0.000 claims description 12
- 230000008878 coupling Effects 0.000 claims description 12
- 238000010168 coupling process Methods 0.000 claims description 12
- 238000005859 coupling reaction Methods 0.000 claims description 12
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Landscapes
- Circuits Of Receivers In General (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Superheterodyne Receivers (AREA)
Description
【考案の詳細な説明】
本考案はテレビジヨン受像機等において使用す
るチユーナ装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tuner device used in television receivers and the like.
比較的広帯域用のチユーナ装置において高バン
ド受信時は低バンド受信時に比し無線周波増幅用
トランジスタの電力利得が低いことや周波数変換
回路に供給する局部発振信号が大きくとり難い等
の理由により利得の低下が起こり易い。このため
第1図に示す従来例においては局部発振回路4の
発振パワーを出来るだけ増大させるようにしてい
る。しかしながら発振パワーを増大させると電源
電圧の変動に対する発振周波数の変動が大きくな
り、発振回路の特性が劣るばかりでなく、発振状
態が全体的に不安定になるという不都合が生じ
る。また、局部発振信号の漏れ(不要輻射)が増
大するという点も無視しえない。尚、第1図にお
いて6はチユーナ装置の入力端子、1は入力同調
回路2は無線周波増幅回路、TR1は増幅トランジ
スタ、3は段間増幅器、5は周波数変換回路、
TR2は周波数変換用トランジスタ、4は局部発振
回路C1は無線周波受信信号を周波数変換用トラ
ンジスタTR2のベースに結合する第1の結合コン
デンサ、C2は局部発振回路4の出力を周波数変
換用トランジスタTR2のベースに結合する第2の
結合コンデンサである。 In tuner devices for relatively wide bands, the power gain of the radio frequency amplifying transistor is lower when receiving high bands than when receiving low bands, and the local oscillation signal supplied to the frequency conversion circuit is large, making it difficult to obtain the gain. Deterioration is likely to occur. For this reason, in the conventional example shown in FIG. 1, the oscillation power of the local oscillation circuit 4 is increased as much as possible. However, when the oscillation power is increased, the fluctuations in the oscillation frequency with respect to fluctuations in the power supply voltage become large, which causes problems such as not only the characteristics of the oscillation circuit being inferior but also the oscillation state becoming unstable as a whole. Furthermore, it cannot be ignored that leakage of local oscillation signals (unnecessary radiation) increases. In FIG. 1, 6 is an input terminal of the tuner device, 1 is an input tuning circuit 2 is a radio frequency amplification circuit, TR 1 is an amplification transistor, 3 is an interstage amplifier, 5 is a frequency conversion circuit,
TR 2 is a frequency conversion transistor, 4 is a local oscillator circuit C 1 is a first coupling capacitor that couples the radio frequency reception signal to the base of the frequency conversion transistor TR 2 , and C 2 is a frequency converter for the output of the local oscillation circuit 4. a second coupling capacitor coupled to the base of the transistor TR2 .
一般に周波数変換用トランジスタTR2の入力容
量C0はバイポーラトランジスタで30PF程度と大
きく、一方第1の結合コンデンサC1は3〜6PF、
第2の結合コンデンサC2は1〜2PF程度であり、
従つて、コンデンサC1を含む無線周波信号供給
側のインピーダンス〔図示の例では段間同調回路
3のインピーダンス〕はトランジスタTR2の入力
インピーダンスよりもかなり大きくなり、同様に
第2の結合コンデンサC2を含む発振信号供給側
のインピーダンスもトランジスタTR2入力インピ
ーダンスよりかなり大きくなる。このことは特に
高バンドにおいて顕著である。勿論段間同調回路
3及び局部発振回路4を周波数変換回路5側と充
分インピーダンス整合するように選定すればよい
訳であるがこれらの回路3,4は同調周波数設定
の面から主として決定されるので、前記インピー
ダンスの整合が不充分となるのはやむを得ないと
いえる。 In general, the input capacitance C 0 of the frequency conversion transistor TR 2 is a bipolar transistor and is as large as about 30 PF, while the first coupling capacitor C 1 is 3 to 6 PF,
The second coupling capacitor C2 is about 1-2PF,
Therefore, the impedance on the radio frequency signal supply side including the capacitor C 1 (in the illustrated example, the impedance of the interstage tuning circuit 3) is considerably larger than the input impedance of the transistor TR 2 , and similarly the second coupling capacitor C 2 The impedance on the oscillation signal supply side including the transistor TR2 is also considerably larger than the input impedance of the transistor TR2. This is particularly noticeable in high bands. Of course, it is only necessary to select the interstage tuning circuit 3 and the local oscillation circuit 4 so as to sufficiently match the impedance with the frequency conversion circuit 5 side, but these circuits 3 and 4 are mainly determined from the aspect of tuning frequency setting. , it is unavoidable that the impedance matching is insufficient.
本考案は、チユーナ装置における周波数変換回
路5の入力とそれに信号を供給する回路側とのイ
ンピーダンス整合が充分でないために信号のロス
が生じ(特に高バンド時)ているとの認識に立つ
て、このロスを軽減することにより高バンド時の
利得低下を防止せんとするものである。 The present invention is based on the recognition that signal loss occurs (especially at high bands) due to insufficient impedance matching between the input of the frequency conversion circuit 5 in the tuner device and the circuit that supplies the signal. By reducing this loss, it is intended to prevent a decrease in gain at high bands.
この目的のため、本考案は第2図に示すように
周波数変換用トランジスタTR2のベース電極と第
1、第2結合コンデンサC1,C2との間にインピ
ーダンス整合用のインダクタンスコイルLを挿入
し、且つこのインダクタンスコイルの値を高バン
ド時に上述のインピーダンス整合を充分よくとる
ように選んでいる。例えば前述したC0,C1,C2
の値に対しインダクタンスコイルLの値は37nH
程度に選ぶものとする。尚、周波数変換用トラン
ジスタTR2としてバイポーラトランジスタでな
く、FETトランジスタを使用した場合にも同様
に効果を得ることができる。また、本考案は機械
的切換えチユーナ並びに電子同調チユーナ(同調
素子として可変容量ダイオードを使用したチユー
ナ)のいずれにも適用できる。 For this purpose, the present invention inserts an inductance coil L for impedance matching between the base electrode of the frequency conversion transistor TR 2 and the first and second coupling capacitors C 1 and C 2 as shown in FIG. Moreover, the value of this inductance coil is selected so as to sufficiently achieve the above-mentioned impedance matching at high bands. For example, the aforementioned C 0 , C 1 , C 2
The value of inductance coil L is 37nH for the value of
It shall be selected accordingly. Note that the same effect can be obtained when a FET transistor is used instead of a bipolar transistor as the frequency conversion transistor TR2 . Further, the present invention can be applied to both mechanical switching tuners and electronic tuning tuners (tuners using variable capacitance diodes as tuning elements).
以上説明した通り、本考案によれば高バンド受
信時の信号損失が軽減されるので、その分だけ低
バンドとの利得偏差を狭めることができ、従来の
ような局部発振特性を低下せしめるような利得偏
差防止策に比し遥かに有用である。 As explained above, according to the present invention, the signal loss during high band reception is reduced, so the gain deviation from the low band can be narrowed by that amount, and the conventional method that degrades local oscillation characteristics can be reduced. This is far more useful than measures to prevent gain deviation.
第1図は従来のチユーナ装置のブロツク回路図
であり、第2図は本考案のチユーナ装置のブロツ
ク回路図である。
1……入力同調回路、2……無線周波増幅回
路、3……段間同調回路、4……局部発振回路、
5……周波数変換回路、C1……第1の結合コン
デンサ、C2……第2の結合コンデンサ、TR2……
周波数変換用トランジスタ、L……インピーダン
ス整合用インダクタンスコイル。
FIG. 1 is a block circuit diagram of a conventional tuner device, and FIG. 2 is a block circuit diagram of a tuner device according to the present invention. 1... Input tuning circuit, 2... Radio frequency amplification circuit, 3... Inter-stage tuning circuit, 4... Local oscillation circuit,
5... Frequency conversion circuit, C 1 ... First coupling capacitor, C 2 ... Second coupling capacitor, TR 2 ...
Transistor for frequency conversion, L...Inductance coil for impedance matching.
Claims (1)
ランジスタの入力容量よりも充分小容量の第1第
2の結合コンデンサを並列に配置し、その第1の
結合コンデンサを介してVHF帯の無線周波受信
信号を上記入力電極に印加すると共に、第2の結
合コンデンサを介して局部発振信号を上記入力電
極に印加するようにしたチユーナ装置に於いて、
前記トランジスタの入力電極と前記第1第2の結
合コンデンサとの間に前記VHF帯の高バンド受
信時に前記入力容量とのインピーダンス整合を行
なうインダクタンスコイルを挿入したことを特徴
とするチユーナ装置。 A first and second coupling capacitor having a capacitance sufficiently smaller than the input capacitance of the transistor is arranged in parallel on the input electrode side of the frequency conversion transistor, and a VHF band radio frequency reception signal is transmitted through the first coupling capacitor. In the tuner device, a local oscillation signal is applied to the input electrode and also a local oscillation signal is applied to the input electrode via a second coupling capacitor,
A tuner device characterized in that an inductance coil is inserted between an input electrode of the transistor and the first and second coupling capacitors for performing impedance matching with the input capacitance during high band reception of the VHF band.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1831078U JPS628602Y2 (en) | 1978-02-13 | 1978-02-13 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1831078U JPS628602Y2 (en) | 1978-02-13 | 1978-02-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54121702U JPS54121702U (en) | 1979-08-25 |
JPS628602Y2 true JPS628602Y2 (en) | 1987-02-27 |
Family
ID=28845331
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1831078U Expired JPS628602Y2 (en) | 1978-02-13 | 1978-02-13 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS628602Y2 (en) |
-
1978
- 1978-02-13 JP JP1831078U patent/JPS628602Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS54121702U (en) | 1979-08-25 |
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