JPS6285543A - Originating control method for multiprocessor control exchange - Google Patents

Originating control method for multiprocessor control exchange

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Publication number
JPS6285543A
JPS6285543A JP22630585A JP22630585A JPS6285543A JP S6285543 A JPS6285543 A JP S6285543A JP 22630585 A JP22630585 A JP 22630585A JP 22630585 A JP22630585 A JP 22630585A JP S6285543 A JPS6285543 A JP S6285543A
Authority
JP
Japan
Prior art keywords
processor
control
hook state
originating
kept
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22630585A
Other languages
Japanese (ja)
Inventor
Tsuneo Taguchi
田口 恒雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22630585A priority Critical patent/JPS6285543A/en
Publication of JPS6285543A publication Critical patent/JPS6285543A/en
Pending legal-status Critical Current

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  • Monitoring And Testing Of Exchanges (AREA)

Abstract

PURPOSE:To reduce the load of an interface processor and a basic module processor by completing all originating control processes independently and at an initial stage each process through an originator processor storing a terminal regardless of the position of a control originating processor. CONSTITUTION:If the congestion, etc. are detected with a basic module processor BM in an operation mode and the originating control is needed, the information on the necessity for control of all subscribers stored in an interface module processor IM is sent to this processor IM. The processor IM set this received information in an under-control display area and furthermore turns on the sound source of a control talkie device. In such a constitution, an off-hook state is informed to the processor BM in case an incoming bit is kept on or a control bit is kept off when the off-hook state of the IM is detected. Thus the BM carries out the normal processing. While the off-hook state of terminal is disused in case the incoming bit is kept off and the control bit is kept on respectively.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は蓄積交換プログラム方式を採るマルチプロセッ
サで制御される交換機での加入者の発信規制方式に関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a system for restricting subscriber calls in an exchange controlled by a multiprocessor that employs a store-and-forward program system.

〔概要〕〔overview〕

加入者を監視制御するインタフェースモジュールプロセ
ッサと交換回路を制御する基本モジュールプロセッサと
で分担して軽鎖時に着信呼は存効にし、発信呼は廃棄す
るマルチプロセッサ制御交換機の発信規制方法において
、 インタフェースモジュールプロセッサで、基本モジュー
ルプロセッサで書替えられるテーブルに基づいて発信規
制を実行することにより、発信規制時にプロセッサ間の
情報授受を制限することができるようにしたものである
In a call restriction method for a multiprocessor-controlled exchange, the interface module processor, which monitors and controls subscribers, and the basic module processor, which controls the exchange circuit, maintain incoming calls while discarding outgoing calls during a light chain. By executing call restriction in the processor based on a table rewritten by the basic module processor, it is possible to restrict information exchange between processors when calling is restricted.

〔従来の技術〕[Conventional technology]

電話交換機のような処理システムでは、処理輻較の監視
が常時行われ、輻幀と判断されれば新たな処理要因とな
る発信が規制される。この発信規制では収容された加入
者クラスごとに自由に規制対象に選定することができ、
規制発動になればその対象加入者発信は規制トーキなど
に接続される。
In a processing system such as a telephone exchange, processing congestion is constantly monitored, and if congestion is determined, calls that become a new processing factor are regulated. With this outgoing call regulation, each subscriber class can be freely selected to be subject to regulation.
If the restrictions are put into effect, calls made by the target subscribers will be connected to the control phone network.

一方、全ての着信および規制対象外の加入者発信は通常
通りの接続処理が実施される。
On the other hand, all incoming calls and calls made by non-regulated subscribers are connected as usual.

第3図はマルチプロセッサ規制交換機の構成を示すブロ
ック構成図である。第4図は第3図中のインタフェース
モジュールプロセッサ(以下、1Mプロセッサという。
FIG. 3 is a block configuration diagram showing the configuration of a multiprocessor regulated exchange. FIG. 4 shows the interface module processor (hereinafter referred to as 1M processor) in FIG.

)と基本モジュールプロセッサ(以下、8Mプロセッサ
という、)が分担する発信規制に関する処理を示すフロ
ー図である。
) and a basic module processor (hereinafter referred to as 8M processor) are a flowchart illustrating processing related to call restriction.

ここで1Mプロセッサは加入者のオフフッタおよびオン
フックなどが監視され、これが検出されるとマスクバス
インタフェース装Wl (以下、M I B装置という
。)を経由してその旨の通知が行われる。このうち、オ
フフッタ時の発信規制処理時には1Mプロセッサ上で状
態管理が行われないので発呼としてのオフフックなのか
着信としてのオフフックなのか判断が行えない。このた
めに1Mプロセッサからオフフック信号がそのまま無条
件に8Mプロセンサに通知される。一方、8Mプロセッ
サでは各端末毎に状態管理が行われており、1Mプロセ
ッサからのオフフック信号が受信されるとこの状態管理
用テーブルが参照されて発信と着信応答とが識別される
。その後に、規制中表示が判定され、規制中であればひ
きつづき規制対象加入者か否かが判断される。規制実施
に判断されれば、発呼が受付けられず規制トーキに接続
されて、処理が終結する。
Here, the 1M processor monitors the subscriber's off-footer and on-hook, and when this is detected, a notification to that effect is sent via the mask bus interface Wl (hereinafter referred to as the MIB device). Among these, during the outgoing call restriction processing at the time of off-footer, state management is not performed on the 1M processor, so it cannot be determined whether the call is off-hook for outgoing calls or off-hook for incoming calls. For this purpose, the off-hook signal from the 1M processor is unconditionally notified to the 8M processor. On the other hand, in the 8M processor, state management is performed for each terminal, and when an off-hook signal is received from the 1M processor, this state management table is referenced to identify outgoing calls and incoming call responses. Thereafter, it is determined whether the subscriber is under restriction, and if the subscriber is under restriction, it is subsequently determined whether the subscriber is subject to restriction. If it is determined that the restriction is to be implemented, the call will not be accepted and will be connected to the restriction talkie, and the process will be terminated.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このように従来例では、輻幀に伴い規制発動になった後
も発呼が規制され、規制トーキを接続する処理はオフフ
ッタ検出−通信−状態の判定まで行われた後に消滅する
。したがって、発信規制中にもかかわらず1Mプロセッ
サ、通信バスおよび8Mプロセッサで各々処理を要し、
発信規制の効果が薄れる欠点がある。
As described above, in the conventional example, even after the restriction is activated due to congestion, outgoing calls are restricted, and the process of connecting the restricted talkie disappears after off-footer detection-communication-state determination is performed. Therefore, even though outgoing calls are restricted, each of the 1M processor, communication bus, and 8M processor requires processing.
The disadvantage is that the effectiveness of restrictions on outgoing communications is diminished.

本発明は、マルチプロセッサ制御交換機に適用された従
来の発信規制で生ずる欠点を除去するもので、規制発動
時に1Mプロセッサ独自に加入者オフフック監視処理の
過程で規制対象加入者の規制処理う終結させることがで
きるマルチプロセッサ制御交換機の発信規制方法を提供
することを目的とする。
The present invention eliminates the drawbacks that occur in the conventional outgoing call restriction applied to multiprocessor-controlled exchanges, and when the restriction is activated, the 1M processor independently terminates the restriction processing of the restricted subscriber in the process of subscriber off-hook monitoring processing. The purpose of this invention is to provide a method for regulating outgoing calls in a multiprocessor-controlled exchange.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、インタフェースモジュールプロセッサで、加
入者ごとのオンフック状態を検知する第一手順と、基本
モジュールプロセッサで、このオンフック状態が着信に
よるオンフック状態かまたは発信によるオンフック状態
かを判別する第二手順と、着信は処理し、発信は廃棄す
る第三手順とを含む手順を実行するマルチプロセッサ制
御交換機の発信規制方法において、上記第二手順による
判別結果を上記インタフェースモジュールプロセッサの
記憶部に記憶させる手順と、この手順で記憶された判別
結果に基づいて、上記インタフェースモジュールプロセ
ッサで上記第三手順を実行することを特徴とする。
The present invention includes a first step in which an interface module processor detects an on-hook state for each subscriber, and a second step in which a basic module processor determines whether this on-hook state is an on-hook state due to an incoming call or an on-hook state due to an outgoing call. , a third step of processing incoming calls and discarding outgoing calls; and a step of storing the determination result in the second step in the storage section of the interface module processor. , the interface module processor executes the third step based on the determination result stored in this step.

〔作用〕[Effect]

基本モジュールプロセッサでは、軽鎖状態の判定、オフ
フック状態が発信であることの判定、この判定結果のイ
ンタフェースモジュールプロセッサの有する記憶部への
書込みが実行される。
The basic module processor determines the light chain state, determines that the off-hook state is a call, and writes the results of this determination to the storage section of the interface module processor.

インタフェースモジュールプロセッサでは、オフフッタ
が検出されると、その記憶部に格納されている判定結果
に基づいて、規制発動加入者からの発呼は廃棄される。
In the interface module processor, when an off-footer is detected, the call from the restriction-invoking subscriber is discarded based on the determination result stored in the storage unit.

一方、着呼によるオフフックであるときには通常の交換
処理が実行される。
On the other hand, when the caller is off-hook due to an incoming call, normal exchange processing is executed.

〔実施例〕〔Example〕

以下、本発明実施例を図面に基づいて説明する。 Embodiments of the present invention will be described below based on the drawings.

第1図は第3図で示すマルチプロセッサ制御交換機での
発信規制の処理過程を示すフロー図であり、図のa部は
1Mプロセッサでの処理過程を示し、b部は8Mプロセ
ッサでの処理過程を示す。
FIG. 1 is a flowchart showing the process of calling restriction in the multiprocessor-controlled exchange shown in FIG. shows.

図に示すように、1Mプロセッサ側は規制中表示ビット
と着信中表示ビットを全加入者分表示できるテーブルを
存し、通常時はそれぞれはオフ状態に設定される。また
、加入者が通話などを終えたときに、その加入者に音源
がオフ状態の規制トーキトランクが第2図で示すように
接続される。加入者に着信があるときには8Mプロセッ
サから1Mプロセッサに対して該当する加入者へ着信呼
出し要求が送信され、1Mプロセッサではこれに基づき
着信表示エリアの加入者対応ビットがオン状態に設定さ
れる。被呼加入者がこの着信へ応答したときにまたは呼
出元が放棄したときにはオフ状態に設定される。このよ
うに、運転中に8Mプロセッサで軽鎖などが検出され発
信規制要に判断されると、1MプロセッサにそのIMプ
ロセッサ収容の全加入老公規制要否情報が送出され、1
Mプロセッサではこの情報が規制中表示エリアに設定さ
れる。さらに、8Mプロセッサで規制トーキ装置の音源
がオン状態にされる。以上のような処置によって、IM
プロセッサオフフック検出時に着信ビットがオン状態か
または規制ピントがオフ状態のときは8Mプロセッサに
オフフック通知が行われて通常処理が実行され、着信ビ
ットがオフ状態でかつ規制ビットがオン状態のときはこ
の端末のオフフックが廃棄される。これにより発信規制
処理が実現される。
As shown in the figure, the 1M processor side has a table that can display restricted display bits and incoming call display bits for all subscribers, and each is normally set to an off state. Further, when a subscriber finishes a call or the like, a restricted talk trunk with the sound source turned off is connected to the subscriber as shown in FIG. When a subscriber receives an incoming call, the 8M processor sends an incoming call request to the corresponding subscriber to the 1M processor, and based on this, the 1M processor sets the subscriber correspondence bit in the incoming call display area to the ON state. It is set to the off state when the called party answers the incoming call or when the calling party abandons. In this way, when a light chain or the like is detected by the 8M processor during operation and it is determined that transmission regulation is required, information on whether or not all the aging public regulations required in the IM processor are stored is sent to the 1M processor.
In the M processor, this information is set in the restricted display area. Furthermore, the sound source of the restricted talkie device is turned on by the 8M processor. By taking the above steps, IM
If the incoming bit is on or the restriction focus is off when the processor off-hook is detected, an off-hook notification is sent to the 8M processor and normal processing is executed, and when the incoming bit is off and the restriction bit is on, this Terminal off-hook is discarded. This realizes outgoing call restriction processing.

すなわち、この実施例では、マルチプロセッサ制御交換
機に発信規制が発動されると、規制発動光プロセッサの
位置にかかわらず端末を収容する発信元のプロセッサで
独自にしかも処理の初期段階で発信規制の全ての処理を
完結することができ、したがってインタフェースプロセ
ッサ、マスターバスインタフェース装置および基本モジ
ュールプロセッサの負荷を軽減させることができる。
In other words, in this embodiment, when outgoing call restriction is activated in a multiprocessor-controlled exchange, regardless of the location of the restriction-invoking optical processor, the originating processor accommodating the terminal independently performs all outgoing call restrictions at the initial stage of processing. can be completed, thereby reducing the load on the interface processor, master bus interface device, and basic module processor.

〔発明の効果〕〔Effect of the invention〕

本発明は以上説明したように、マルチプロセッサ制御交
換機での発信規制発動時の発信規制に関する処理が端未
収容元プロセッサで独自に行われるので、システム全体
の負荷を軽減させることかのでき、処理システムの品質
向上および経済化を図ることができる効果がある。
As explained above, in the present invention, processing related to call restriction when call restriction is activated in a multiprocessor-controlled exchange is performed independently by the end unaccommodated processor, so that the load on the entire system can be reduced. This has the effect of improving the quality of the system and making it more economical.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例方式の″手順を示すフロー図。 第2図は加入者と規制トーキの接続状態を示す説明図。 第3図は本発明が実行されるマルチプロセッサ制御交換
機の構成を示すブロック構成図。 第4図は従来方法の手順を示すフロー図。
Fig. 1 is a flowchart showing the procedure of the method according to the embodiment of the present invention. Fig. 2 is an explanatory diagram showing the connection state between a subscriber and a restricted talkie. Fig. 3 is a configuration of a multiprocessor-controlled exchange in which the present invention is executed. Fig. 4 is a flow diagram showing the procedure of a conventional method.

Claims (1)

【特許請求の範囲】[Claims] (1)インタフェースモジュールプロセッサで、加入者
ごとのオンフック状態を検知する第一手順と、基本モジ
ュールプロセッサで、このオンフック状態が着信による
オンフック状態かまたは発信によるオンフック状態かを
判別する第二手順と、着信は処理し、発信は廃棄する第
三手順と を含む手順を実行するマルチプロセッサ制御交換機の発
信規制方法において、 上記第二手順による判別結果を上記インタフェースモジ
ュールプロセッサの記憶部に記憶させる手順と、 この手順で記憶された判別結果に基づいて、上記インタ
フェースモジュールプロセッサで上記第三手順を実行す
ることを特徴とするマルチプロセッサ制御交換機の発信
規制方法。
(1) A first step in which the interface module processor detects an on-hook state for each subscriber; a second step in which the basic module processor determines whether this on-hook state is an on-hook state due to an incoming call or an on-hook state due to an outgoing call; A method for regulating outgoing calls in a multiprocessor-controlled exchange that executes a procedure including a third step of processing incoming calls and discarding outgoing calls, a step of storing the determination result in the second step in the storage section of the interface module processor; A call regulation method for a multiprocessor-controlled exchange, characterized in that the third step is executed by the interface module processor based on the determination result stored in this step.
JP22630585A 1985-10-11 1985-10-11 Originating control method for multiprocessor control exchange Pending JPS6285543A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22630585A JPS6285543A (en) 1985-10-11 1985-10-11 Originating control method for multiprocessor control exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22630585A JPS6285543A (en) 1985-10-11 1985-10-11 Originating control method for multiprocessor control exchange

Publications (1)

Publication Number Publication Date
JPS6285543A true JPS6285543A (en) 1987-04-20

Family

ID=16843122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22630585A Pending JPS6285543A (en) 1985-10-11 1985-10-11 Originating control method for multiprocessor control exchange

Country Status (1)

Country Link
JP (1) JPS6285543A (en)

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