JPS6278779A - Recording and reproducing device for pcm signal - Google Patents

Abstract

PURPOSE:To avoid the deterioration of the sound quality due to the dubbing by fetching the data on the track completion read out of a tape to a memory circuit and then reading out data for each track for the digital dubbing purpose independently of a fact that the data on the track completion is read out to a D/A converter after correction of errors. CONSTITUTION:The data on the completion of a track is read out to heads 2a and 2b from a tape wound round a cylinder 1 in the small thickness.Then the clocks are produced from a synchronizing circuit 4 and sent to a writing circuit 5 together with the data and written alternately to RAM 13 and 14. Then a correction processing circuit 7 performs correction of errors by means of two types of correction codes C1 and C2. Then a D/A reading circuit 8 reads data in a fixed cycle and a D/A converter 15 reproduces the sound signal. While a reading circuit 6 is actuated in a period during which the reproduction signals are interrupted and no writing action is carried out. Thus the corrected data is read out and a recording circuit 18 adds the additional information and the control signal to the data for modulation. Then these data are dubbed to other tapes by heads 17a and 17b. In such a way, the sound quality is never deteriorated regardless of the dubbing frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a PCM signal recording and reproducing apparatus, and particularly to a PCM signal recording and reproducing apparatus suitable for digital dubbing of PCM signals.

[Background of the invention]

As a device for recording PCM data on tape using a rotating head, there is a conventional device known as JP-A-59-16111 “PC
The device described in "Recording and reproducing device for M signal" is known.

However, no consideration was given to digitally dubbing this PCM signal onto other tapes.

[Object of the Invention] An object of the present invention is to provide a PCM signal recording and reproducing device suitable for digital dubbing.

[Summary of the invention]

In the present invention, the data for a complete track read from the tape is once input into the storage circuit, the error correction circuit performs error correction on a track-by-track basis, and then the data is read out to the DA converter. It is designed to read data on a track-by-track basis.

[Embodiments of the invention]

An embodiment of the present invention will be described with reference to FIG.

In Fig. 1, 1 is a cylinder, 2a and 2b are heads with an azimuth angle of ±ψ, 6 is a playback amplifier, 4 is a synchronization (b) path, and 5 is a write circuit that writes data read from the tape to RAM. , 6 is a read circuit that reads data from the RAM, 7 is a correction processing circuit that corrects errors in the read data, 8 is a DA read circuit that reads data to be DA converted from the RAM, and 9 is a circuit that turns off writing and reading of the RAM υ 10 is a correction processing and D
A switching circuit for switching the A readout; 11 is a switching circuit for switching the outputs of the switching circuits 9 and 100; 12 is a control circuit for controlling the above circuit; 13.1
4 is a RAM for recording data.

15 is a DA converter, 16 is another cylinder, 17α, 17
h is a head having an azimuth angle of ψ, 18 is a readout circuit, and 19 is a flag RAM circuit. Figure 2.

FIG. 3 is a time chart showing the operation of FIG. 1.

In the following PCM recording/reproducing apparatus using a rotating head,
We will explain how to perform digital dubbing.

The format recorded on the tape is shown in FIG. 1
Lch and Rch audio data is converted into PCH code and recorded on the track. Furthermore, Lch, Rc
Each signal of h has 5 sync and an error correction code C1 added to a set of fixed samples.

Furthermore, the C2 code, which has a correction means separate from the C1 code, is 1
It is added to the Lch and Rc data of a track and is recorded as a signal that completes one track.

In the conventional dubbing method, the signals reproduced from the heads 2α and 2b or once converted into digital signals are dubbed onto another tape using the heads 17a and 17b. However, this method cannot correct errors that occur on the transmission path, so each time dubbing is repeated, data errors increase, resulting in deterioration of sound quality.

In contrast, in the present invention, since dubbing is performed using corrected digital data, no deterioration in sound quality occurs.

In the present invention, data from a tape wound shallowly around the cylinder 1 is read out by the heads 2α and 2b. The read data is used to generate a clock synchronized with the signal in the synchronization circuit 4, and is sent to the write circuit 5 together with the data. The write circuit 5 alternately writes data reproduced by the heads 2α and 2A having +-azimuth into the RAMs 13 and 14 as a pair.

Once written into the RAM, 1 or data is corrected in a correction processing circuit 7 using two types of correction codes C1 and C2.

At this time, the correction processing circuit 7 first stores a flag indicating the error correction result by the 01 correction in the flag RAM 19. Next, 02 correction is performed, but if the error is known in advance from 01 correction, flag RAM1
This information is read from 9 and C2 correction is performed.

Furthermore, when errors are not found by C1 correction or cannot be corrected due to the large number of errors, the 02 code is similarly used to correct the errors. The corrected data is read out from the RAM 15.14 by the DA readout circuit 8 at regular intervals.
The DA converter 15 reproduces the audio signal. When performing the above processing, the operation of the RAM 15.14 is performed in a time-sharing manner as shown in FIGS. 2 and 6.

As shown in FIG. 3, the DA readout circuit 8 and the correction circuit 7
The switching circuit 10 is switched by the DASLOT signal, and during reproduction, the processing of the write circuit 5 is written by the control circuit 12, and the slot signal is switched by the switching circuit 9 and input. These processes are further carried out by the switching circuit 11.
Switching is performed using the switch signal, and time division is performed using the signal.

At this time, the switching control signal of the switching circuit 11 is
9-switching system of the switching circuit 11 is used to read the data at regular intervals.
The "L" timing of the signal is allocated for data read from the tape and for reading for tape recording.

In this way, it is possible to simultaneously write to RAM15.14 and extract M, and there is no charge for changing the address name of RAM as shown in the conventional example, and LSI
I am familiar with the process.

FIG. 2 shows the timing of the reproducing circuit constructed in this manner. Played at C9 points and 0 points/'14/
The 'I-' data is written into the RAM 15 by the '8@ write circuit 5. The correction operation starts as soon as data is written into the RAM, and the two types of correction codes C1 and C2 correct errors that occur during transmission.

The retained data is read out by the DA reading circuit 8 from point 0, while the next data (B++) is reproduced at point @, so this data is stored in the RAM 1a. At this time, the control circuit 12 controls the switching circuits 9, 10 and 11, and when the switching control signal is "H", the reproduced data is transferred to the RAM 1.
4, and @L" performs kLDA readout and correction processing alternately. Since there is no write operation during the period @~■ when the reproduction signal is interrupted, no operation is performed with the switching control signal °H". do not. Furthermore, during this period, corrected data AI+ AI- is stored in RAM 15.
is memorized. Therefore, the readout circuit 6 is operated during this period @~■, and the data in the RAM 15 (AI+'(I-) is
) is read out, the recording circuit 18 adds additional information and a control signal, modulates the data, and sends the data to another head 17α.

17b for digital dubbing onto another tape.

As stated above, according to this method, since the corrected data is digitally dubbed, there is no deterioration in sound quality no matter how many times dubbing is performed, and by having one correction circuit, playback and digital dubbing output can be obtained.

FIG. 5 shows details of the recording circuit. 100 is a 5 sync generation circuit % 101 is an identification signal circuit, 102 is a block address circuit, 106 is a parity check circuit 104 is a variable clock circuit, 105 is a timing circuit ~ 106 is a selection circuit that multiplies each signal, 107 is a RAM 1° 5 and 14, and 108 is a modulation circuit that modulates the signal.

No synchronizing signal, identification signal, or tracking control signal is added to the read data 107. Therefore, in the timing circuit 105, as shown in FIG.
ync occurrence times @100. Ill-specific signal circuit 101. Block address circuit 102. Parity check circuit 10
3 is generated, and these 13 are added to the gaps in the read data 107. Further, a modulation circuit 108 performs a recording change so that the format is the same as that of signal No. 9 read from the tape during playback.

FIG. 7 shows another embodiment according to the present invention. In FIG. 7, the same symbols as in FIG. 1 have the same functions. FIG. 8 is a time chart showing the manufacturing of this embodiment. The embodiment shown in FIG. 1 has a RAM 19 dedicated to flags, but the
As shown in the figure, since the two RAMs 15 and 14 are used alternately, a part of the RAM not used for writing can be used as a flag RAM.

That is, during the periods ① to ②, the area in which the BO+ data including the correction code is recorded has already been read out for digital dubbing. ■ B during the period of ~@. + and B
, - are read out to the DA converter, but D
Since the correction code area is not necessary for A reading, B is read sequentially as shown in FIG. The area for the +Bo- correction code can be used as the area for recording the /'1+AI- correction flag.

In the above explanation, an example was described in which the correction code area is used as a 7-lag RAM, but the DA converter 1
It is also possible to use the data area read out in 5 and no longer needed as a flag RAM area.

FIG. 9 shows yet another embodiment of the present invention. In FIG. 9, the same symbols as in FIG. 7 have the same functions. 110
, 111 is a RAM. In the embodiment shown in FIG. 1, the memory is configured to have each award for two reproduced tracks, but in this embodiment, the memory is configured to have a larger capacity.

Figure 10 is a memory map.

For example, address addresses 0 to 5FF + address address 400, which is the area that stores the data reproduced by the azimuth head.
~7FF is an area for storing data reproduced by one azimuth head, 800~8FF is an area for storing a correction flag when +unmass data is corrected by the correction processing circuit 7, and 900~91F is an area for correcting -azimuth data. This is an area for storing a correction flag when the processing circuit 7 performs a correction process. When a large-capacity RAM is used in this way, it is not necessary to use a data area as a storage area for correction flags as described in the embodiment of FIG.

According to this embodiment, the circuit configuration for reading and writing the correction flag can be realized with a simpler configuration.

FIG. 11 shows another embodiment according to the present invention. In FIG. 11, the same symbols as in FIG. 1 have the same functions. 30 is a reference oscillator that generates a read clock; 31 is a write/read circuit that serves both writing and reading; and 32 is a switching circuit that switches clock data for writing and reading.

In this embodiment, writing and reading are not used at the same time, and the RAM access type for writing and the RAM access type for reading are the same, so that writing and reading can be used simultaneously. It was planned. The control circuit 12 switches to the clock and data side from the synchronization circuit 4 during the period when the heads 2α and 2h are reproducing data (for example, @ to ■ in FIG. 2), and outputs the clock from the synchronous circuit 4 to the data side.
Write on 5.14. Next, during a period in which data is not reproduced (for example, @ to ■ in FIG. 2), the switching circuit 62 switches to the clock from the reference oscillator 30, and R
Read the corrected data from AM15.14. This signal is digitally dubbed onto another tape by heads 17α and 17b via a recording amplifier.

According to this method, by using both the write circuit and the read circuit, digital dubbing can be performed without providing a dedicated read circuit.

FIG. 12 shows yet another embodiment of the present invention. 1st
In FIG. 2, the same symbols as in FIG. 1 have the same functions.

40 reproduces the heads 2α and 2b every half rotation of the head 3. A switching circuit alternately switches to a recording amplifier 45, 41 is a reproducing tape 42 is a recording tape, and 43 is a recording amplifier.

In this embodiment, a reproduction tape 41 and a recording tape 42 are wound around the same cylinder 1 at 90 degrees, facing each other at 180 degrees, and digital dubbing is performed using one cylinder.

During normal playback, the control circuit 12 performs write processing, correction processing, and DA read processing in a time-sharing manner as explained in FIG.

When dubbing, time-division operation is stopped for a certain period of time, all RAM operations are allocated to correction processing, and head 2α or 2
When the head 2h is reproducing data, the corrected data is read out and recorded in the head 2h or 2α in a time-division operation, thereby performing digital dubbing.

This operation will be illustrated below using the timing chart shown in FIG. The head 2α is reproducing the signal of the +azimuth track during the periods shown in (1) to (2). At this time, the switching circuit 40 switches the head 2tt to the playback amplifier 3 and the head 2h to the recording amplifier 4.
The reproduced data connected to the synchronous circuit 4 generates a synchronized clock, and the write circuit 5 writes the reproduced data to the RAM 13.
．． 14. Next, in the interval from (1) to (2), the control circuit 12 discontinues the time division processing mode and always connects the switching circuit 11 to the correction processing circuit 7 to perform a correction operation.

As a result, the conventional correction time took a period from ■ to ■, but the switching control signal used by the write circuit 5"
Since the period of ``H'' can also be used for reading and writing for correction, the time required to transfer data from R, 4 & 13゜14 to the correction circuit 7 is half of the conventional ゛. In step 7, two correction processes, CI and C2, are performed, but the flag signal indicating the correction result of C1, which is performed first, must be stored once.
If you use the AMA++ area for flags, the following ■～■
Since reading is performed for dubbing in the area, the /(+1 area of RAM cannot be used. Therefore,
RAM that no longer needed to be read for dubbing during the ~ ■ period
By using the Bo- area for the RAMA and + flags, the correction process can be performed in the period from ■ to ■. .

Note that the time for transferring data to the correction circuit 7 is RA
This is possible by using all the slots of M13.14, but since the time required for correction in the correction circuit 7 is reduced by half, the correction may not be completed during the period (1) to (2). In this case, it is also possible to change the correction capability of the correction circuit 70 by the control circuit 12 to shorten the correction processing time.

When the correction process is completed (■), the control circuit 12 returns to the time division mode again. Next, the head 2h reaches the 0 point where it reproduces one azimuth track.

At this time, the +7 beam head 2a contacts the recording tape wound 180 degrees oppositely. Therefore, the switching circuit 40 is connected to the head 2b to the reproduction amplifier and the 9th head 2α to the recording amplifier, and the data of one azimuth track reproduced by the head 2h is written to the RAM via the writing circuit 5, while the data that has already been corrected and written to the RAM is The readout circuit 6 reads out the immediately preceding +azimuth track data in a time division mode, and sends it to the head 2α via the recording amplifier 43.
and perform digital dubbing.

As explained above, according to this embodiment, digital dubbing can be performed with one cylinder.

Note that during digital dubbing, the DA readout circuit 8 is not operating and the reproduced audio cannot be checked, but this can be easily done by having another set of the same circuit and inputting the output of the readout circuit 6. It becomes possible to output playback audio.

FIG. 14 shows another embodiment according to the present invention. In FIG. 14, the same symbols as in FIG. 1 have the same functions.

50α and C are +azimuth heads, 50b and d are 17 azimuth heads, and 51 is a cylinder having a diameter twice that of FIG.

When dubbing is performed using a cylinder configuration as shown in FIG. 5, since recording and reproduction are performed at the same timing, recorded signals may leak into the reproduction side. Therefore, in this embodiment, the diameter of the cylinder 1 is increased and the tapes 52, 5 are
The winding position of No. 3 is shifted so that the recording and reproduction timings are at different positions. tape 5
2.55 are wound with a 165° shift, so that when one head is in contact with the tape 52, the other head is not in contact with the tape 56, and when one head is in contact with the tape 53, the other head is in contact with the tape 56. is arranged so that it does not come into contact with the tape 52.

This operation will be explained below based on the timing chart of FIG. When data is being reproduced from the tape 52 by the head 50α, this data is written to the RAM 15.14 via the write circuit 5 in a time-division operation. The written data is immediately subjected to C1 and C2 corrections. +
At the same time as the azimuth head 50α leaves the tape 52, the azimuth head 50d comes into contact with the tape 53. The data of the azimuth track, which has already been corrected and stored in the RAM'I5, 14, is recorded on the read tape 53 in a time division mode by the read circuit 6. On the other hand, the playback audio is D
The data read out at regular intervals by the A reading circuit 8 is reproduced by the DA converter 15 to reproduce audio.

As described above, according to this embodiment, the recording and reproducing timings do not overlap, so that the recorded signal does not leak to the reproducing side. Note that during normal playback, the playback is performed in the same manner as in FIG. 1, and there is no problem.

〔Effect of the invention〕

According to the present invention, sound quality deterioration due to dubbing is eliminated,
You can perform digital dubbing.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of an embodiment of the present invention, and FIG. FIG. 5 is a time chart showing the operation, FIG. 4 is a tape format diagram, FIG. 5 is a configuration diagram of one embodiment of the readout circuit, FIG. 6 is an explanatory waveform diagram, and FIG. FIG. 8 is a diagram showing the configuration of the embodiment, FIG. 8 is a time chart showing the operation, FIG. 9 is a diagram showing the configuration of still another embodiment according to the present invention, FIG. 10 is a diagram showing a memory map, and FIG. FIG. 12 is a configuration diagram of yet another embodiment according to the present invention, FIG. 13 is a time chart showing the operation, and FIG. 14 is a configuration diagram of yet another embodiment according to the present invention. The configuration diagram and FIG. 15 are time charts showing the operation.

Claims (1)

[Scope of Claims] 1. Recording means that adds a PCM signal and an error correction code for correcting errors in the PCM signal, and records on a track-by-track basis using a rotary head on a tape wound around a cylinder at a predetermined angle. and a first memory which temporarily stores the PCM signal and the error correction code to be reproduced track by track as a reproduction means.
a storage circuit, an error correction circuit that corrects errors in the PCM signal and the error correction code stored in the storage circuit using the error correction code, and a second memory that stores a correction flag of the error correction circuit. A PCM signal record reproducing device comprising: a circuit for reading out the PCM signal and the error correction code from the first storage circuit in the same order as in writing. 2. A PCM signal recording and reproducing device according to claim 1, wherein a synchronization signal and additional information are added to the PCM signal and the error correction code read from the first storage circuit. 3. A PCM signal recording and reproducing apparatus according to claim 1, wherein a correction flag of the correction circuit is stored in the first storage circuit. 4. A PCM according to claim 1, in which the same circuit serves as a write circuit for writing signals to the first memory circuit and a circuit for reading signals from the first memory circuit.
Signal recording and reproducing device. 5. In claim 1, the tape is a first
a magnetic tape and a second magnetic tape, the first magnetic tape is wound around the cylinder at a predetermined angle, and the second magnetic tape is separated from the first tape by 180° of the cylinder. The PCM signal and error correction code read from the first magnetic tape, which are wound at a predetermined angle at opposing positions, are written in the first storage circuit, and read out from the first storage circuit. PCM
A PCM signal recording and reproducing device that records a signal and an error correction code on the second magnetic tape with a synchronization signal and additional information added thereto. 6. The PCM signal recording and reproducing apparatus according to claim 5, wherein the first and second magnetic tapes are wound around the cylinder at a winding angle of approximately 90 degrees.