JPS6275782A - Picture coding device - Google Patents

Abstract

PURPOSE:To attain the coding of a picture data that appears in various directions only with one reference code table by providing a code vector conversion circuit that converts the bit arrangement of each element of a code vector after converted. CONSTITUTION:The vector Xi of an input picture data is arranged as it is at an rearranging circuit 2 as a picture vector Xi, and an address generating circuit 7 generates in order the address Aj of a code table 6 and reads a code vector Yj. A conversion assigning circuit 10 outputs a conversion mode information Ml in order and a conversion circuit 9 converts the arrangement of each element of the code vector Yj to a code vector Yjl. Each differential circuit 3 calculates the difference between each element of Xi and that of Yjl, and a sum of products circuit 4 calculates respectively for all combinations of the sum of products Sijl of the absolute values of the differences. A minimum value deciding circuit 5 detects a code vector Yb having the smallest distortion Sijl and an encoder 11 forms a code that information Ml is added on the high- order of the address (code) Ab of Yb, and a selector circuit 8 holds the code Ab' and outputs it.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an image encoding device, and particularly to an image encoding device using a vector quantization method.

[Prior art] Fig. 4 and Figs. 5 (a) and 5 (b) relate to the explanation of the prior art, and Fig. 4 is a block diagram of an image encoding device using the conventional vector quantization method. .

In the figure, 1 is an image cutting circuit that cuts out the inner fruit elements from the input image, 2 is a rearrangement circuit that arranges the extracted inner fruit elements in a predetermined order, and 6 is a code corresponding to the array (vector) xi of the inner fruit elements. A code table (ROM) that stores a plurality of arrays (vectors) Yj, 3 is the internal element vector Xi of the rearrangement circuit 2.
4 is a product-sum circuit that calculates the sum (distortion) Sij of the outputs of each difference circuit 3, and 5 is a minimum value judgment that judges the minimum value of the sum Sij. 7 is an address generation circuit that generates the read address Aj of the code table 6 in a predetermined sequence; 8 is a circuit that generates the address A at that time based on the minimum value judgment output of the minimum value judgment circuit 5;
This is a selector circuit that holds and outputs b.

Figure 5 (L) shows the original image input by the image cutting circuit 1.
FIG. 7 is a diagram illustrating a manner in which the image is divided into n-pixel medial elements. Hereinafter, this inner result; K will be referred to as an input image element. FIG. 5(b) is a diagram showing the relationship between a human image and input image elements. In the rearrangement circuit 2, for example, the input image element (Xt,
, x2 , ,...,)1 are arranged in nm dimensions and the vector X1=(X11 , X21 , X31 ,...=,
X1m, -, Xmn11. Hereinafter, this vector will be referred to as input vector Xi. The code table 6 is a ROM that stores a maximum of code vectors Yj (j=l to k),
Each code vector Yj has a read address Aj (j=1 to k
) is assigned. Note that each element of the code vector Yj corresponds to each element of the input vector Xi, and Elr
The Gk-th code vector is expressed as Yk= (Yl l , Y
2 t , +++, Ymnl kte is expressed.

In such a configuration, when there is a human vector Xi, the address generation circuit 7 converts the address Aj of the code table 6 into lllrl
The next occurrence (for example, in the order of 1 to 2) occurs. Each difference circuit 3 calculates the difference (Xz 1 - Yt 1 ,
X21-Y2 t , -, Xmn-Ymn) ij is calculated, and the product-sum circuit 6 calculates the sum Sij of the absolute value of the difference for each address Aj for j=1 to k, respectively.

That is, distortions Sij (j=1 to k) between input vector Xi and code vector Yj are sequentially calculated. The minimum value determination circuit 5 detects the existence of the code vector Yb with the smallest distortion Sij among the code vectors Yj in the code table 6, and determines the read address (code ) Ab is held by the selector circuit 8 and output.

Incidentally, the direction in which input image data appears is generally not constant. For example, depending on the scanning method of the image reading stirrup, the arrangement of read image data may appear from the right or from the left even for the same document image. Therefore, we would like to encode images using the above-mentioned image encoding method for the arrangement of various read image data, but to do this, conventionally it was not necessary to provide separate code tables for each arrangement of the various read image data. It didn't happen. Therefore, a large amount of memory was required to hold the code table.

[Problems to be Solved by the Invention] The present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is to solve the problem in various directions using a single standard code table. An object of the present invention is to provide an image encoding device capable of encoding image data.

[Means for solving the problem] As a means for solving this problem, for example, the image encoding device of the embodiment shown in FIG. 1 is an image encoding device that uses a so-called vector quantization method, and and a code vector generating means (ROM) 6 that generates a plurality of types of code vectors Yj (j=l to k).

Code vector Yj(1) elements fYz 1 , Y2 x , +°+, generated by the code vector generating means 6 according to the information M sentence (L; L=1 to p) of a predetermined conversion mode;
Ymnl jc7) array Yj statement = (Yll ′,
Y21'.

..., Yrnn'jj, and the input image vector X1=(X11,X
2 x , X31%+, Xx n ,. +, Xmn)i
and the code vector Yji after conversion, and calculate, for example, the difference of each element (Xl t - Yl 1 ', X2 t
-Y21',・",Xmn-Ymn') i
Read address information Ab of the ROM 6 that generates the code vector Yb when the distorted Sij sentence that is the sum of 31 is the minimum
image encoding means 1 for encoding the input image Xi into a code Ab' (information Ab added below the information Mu) based on the information M exchange (sentence=1-p) of the predetermined conversion mode;
1.8.

Preferably, the code vector conversion circuit 9 converts the bit array of each element of the converted code vector YJI.

In the configuration of such m1 diagram, vector X of one image data
i is the σ■ array circuit 2, and the image vector Xi= (
Xt l , X21, -, Xmn1 i. Next, the address generation circuit 7 generates the address Aj of the code table 6.
are generated sequentially (for example, in the order of
j=(Ytt, Y21.

..., Ymnl j (j=1 to k) is read. At this time, the conversion designation circuit 10 sets conversion mode information M (standing = 1 to
p) is generated in 11th order (for example, in the order of l to p) and outputted to the conversion circuit 9.The conversion circuit 9 generates 5 + vector Yj = (Yt 1 , Y21, . . . ) according to the information M.
The array of each element of Ymnl j is a code vector YjJl
= (Ytz', Y21', -, Ymn) Convert into one sentence. Therefore, the code vector Yj read from the code table 6 is converted by the conversion circuit 9 according to the conversion mode information f4iM statement (cross=1 to p) sequentially generated by the conversion designation circuit 10, and the code vectors Yjz, Yj2, . ...
, Yjp are generated.

Each differential circuit 3 receives information M for each address Aj and each conversion mode.
Each element of input vector Xi and code vector Y for l
Difference of each element of j sentence (x, , −yl t',
X21-Y2 t'---, Xmn-Ymn')i
jM is calculated, and the product-sum circuit 4 calculates the total sum Sij of the absolute head of the difference for each address Aj and the information Ml of each conversion mode for all combinations of j=1 to 1 sentence=1-p. . The minimum value determination circuit 5 converts kXp converted by the conversion circuit 9 from the code vectors Yj in the code table 6.
The code vector Yb with the smallest distortion 5iju between the input vector Xi and the input vector Xi is detected among the code vectors Yj. The encoder 11 forms a code M1, Ab in which the information M sentence is placed above the address (code) Ab of the information vector Yb at the L position of the address (code) Ab at that time. The selector circuit 8 holds and outputs this code Ab'=M sentence, Ab.

In this way, the image data Xi of the same image is converted into the code Ab no matter what order it appears, and the code Mu representing the code vector conversion method is prefixed to the code Ab.

Preferably, the conversion circuit 9 further converts, for example, the code vector Y j1= (Ymn , Ym-xn, . . .
, Ylz) 1 for each element of ju, e.g. element Ymnc
7) Bit array (Bzz, B21 +-.

Bml, Bx 2 , B22 , +++, Bm2. =-
, Bln , --..., B m n l as a human sequence (
Bmn, Bm-1n, -, Bz n, ·-, Brn2
, Bm-12.

-, Br2. Convert to Bmz, ..., B, 11.

By doing this, so-called main scanning when reading a document,
Even if image data inverted for the sub-scanning is input, it can be easily encoded.

[Examples] Examples of the present invention will be described in detail below with reference to two attached figures.

FIGS. 1 to 3 relate to detailed explanation of the present invention, and FIG. 1 is a block diagram showing an image encoding neck wear according to an embodiment.

It should be noted that structures having the same thickness as those in FIG. 4 are given the same numbers and their explanations will be omitted. In FIG. 1, 9 is, for example, a code vector Yj=I' according to the information Mu of the conversion mode of 180 degree rotation.
11x , Y21 , ..., Ymnl j as a code vector Y jl = iYmn , Ym
-1n, +++, yl 1 )j conversion circuit; 10 is a conversion designation circuit that outputs information (sign) of various conversion modes (sign) M; 11 is a conversion circuit that converts the address (sign) output Aj of address generation circuit 7; It is an encoder that forms a new code Ab′=M party, Aj (M sentence, Ab) by simply connecting them, for example, from the conversion mode information (code) output Mu of the designation circuit 10.

In the configuration shown in FIG. 1, vector X of image data
i is the image vector Xi= (X
I 1. X21. −, Xrnnl i. Next, the address generation circuit 7 sequentially generates the addresses Aj of the code table 6 (for example, in the order of 1 to 1) and generates the code vector Yj.
= (Yl 1 , Y2 t .

..., Ymn)j (j=l to k]. In this case, the conversion specification circuit 10 reads the conversion mode information M sentence (view=
1 to p) are generated sequentially. For example, when the information Ml of the 180 degree rotation mode is output to the conversion circuit 9, the conversion circuit 9
is the code vector yj= (Yzz,
Y21, -, Ymx, Yl 21 Y 221 = -
, Y m 21 =-, Y ln + -, Y mn)j
The array of each element of is expressed as a code vector Yjl=(Ymn, Ym
-1n, --., Yln, ..., Ym2, Ym-1
2,-,Yt2. Convert to Ymx, -, Yx1't Jl. Each difference circuit 3 calculates the difference (Xl 1-Ymn ) between each element of the input vector Xi and each element of the code vector 73 sentence for each address Aj.

X2 t −Ym−1n , −・−, Xrnn−Yt
z) i Calculate 3 sentences. The product-sum circuit 4 calculates the sum 5ijfL of the absolute values of the differences between each address Aj and the conversion mode information M1 for j=1 to j=1-p for all combinations thereof. The minimum value determination circuit 5 detects the code vector Yb that has the smallest total Sij sentence among the kXp code vectors Yjl after conversion and the input vector Xi. The encoder 11 forms codes Mu and Ab in the form of, for example, the address (code) Ab of the code vector Yb at that time, with an information M sentence added to the upper part. The selector circuit 8 holds and outputs the sign Ab'=MM, Ab according to the minimum value determination of the output of the minimum value 'r1 constant circuit 5. In this way, image data Xi of the same image is converted into the code Ab'=M sentence, Ab, no matter what order they appear, and the first code M sentence represents the method of converting the code vector.

Preferably, the conversion circuit 9 further converts, for example, the code vector Y j l= (Ymn, Ym-tn, .
..., Yzn)jJl, for example, element Y
Human sequence of mn (Bz 1. B2 t, .++.

Bml, Bz 2 , B22 ,..., Brn2. ...,B
ln, ..., B m n ) into a bit array (B
mn,Bm-1n,-,Bln,m,
Bm2, Bm-t2.

..., B t 2 , B m 1 , ...,
B 1t 't Convert.

This relationship is equivalent to the case where the code vector Yj is converted to the code vector Yj. By doing this,
When reading a document, even if image data that is inverted for both main scanning and sub-scanning is input, it can be easily encoded.

FIGS. 2(a) to (f) are diagrams showing aspects of various conversions in the embodiment. FIG. 2(a) is the code vector Yj when no conversion is performed.
! ; Figure 2 (b) is a diagram showing the arrangement of L; Figure 2 (b) is a diagram showing the array of code vector 73 sentences during 180 degree rotation conversion; Figure 2 (C
) is a diagram showing the arrangement of code vectors Y and ill during horizontal flip conversion, Figure 2 (d) is a diagram showing the array of code vector 73 sentences during vertical flip conversion, and Figure 2 (e) is 90 degree rotation. Diagram showing the arrangement of code vector 73 sentences during conversion, Figure 2 (f)
is a diagram showing the arrangement of 73 code vector sentences at the time of 270 degree rotation conversion. In this way, for example, if the total number of code vectors in the code table 6 is , then by providing the conversion circuit 9 for M vertical lines (text=l to p), the number of code vectors after conversion becomes substantially kXp. Moreover, on the contrary, the size of the code table 6 required to generate the same number of code vectors as in the conventional method is reduced to 1/p, which is economical.

FIG. 3 is a block diagram showing details of the conversion circuit 9 of the embodiment. The conversion circuit 9 can be composed of a plurality of data selector circuits as shown in the figure. Of course, the function of the data selector circuit can also be realized by software, so the conversion circuit 9 can also be realized by a microprocessor (CPU) executing a predetermined program. In Figure 3, now 18
To explain an example of 0 degree rotation, theta selector circuit 911
The code vector Y11 is input to the input terminal A of □, and the code vector Ymn is input to the input terminal B. Here, when the conversion information Ml is logic 0 (Mo), the information Y11 of the input terminal A appears on the output terminal 0, and the conversion information M
When l is logic 1 (Ml), the information at input terminal 'f-B' is
I Y m n appears on the output terminal ○. In addition, the input terminal A of the data selector circuit 91mn has a code vector Y
mn is input manually, and the code vector Y11 is input to the input terminal B. Similarly, the conversion information M is logical 0 (MO
), the information %lYmn of the input terminal A appears on the output terminal O, and when the conversion information M is logic 1 (Mz), the information Yll of the input terminal B appears on the output terminal 0. Therefore, by setting the conversion information Ml to logic O or logic 1, code vector Yj can be easily converted.

On the other hand, the data selector groups 9211 to 92mn also include a configuration similar to the configuration described above. However, in this case, each human power is not the code vectors Y11 to Ymn but the bits B11NBmn forming each vector element.

Although this embodiment deals with two-dimensional image data of mXn image elements, it can also be easily applied to one-dimensional data such as audio.

In addition, although this example deals with mXn image elements, especially when m=n, it can also be easily applied to the 90 degree rotation mode shown in 2(e) and the 270 degree rotation mode shown in 2(f). can.

Further, although the present embodiment is configured to convert the code vector Yj, instead of converting the input image vector Xi
It may be configured to convert.

[Effect J As described above, according to the present invention, by providing the f conversion means, the number of code vectors in the code table can be reduced, and therefore the memory capacity for storing the code table can be reduced, which is economical. be.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an image encoding device according to an embodiment. :JS2 Diagram (a) is a diagram showing the arrangement of code vector elements A when no conversion is performed, FIG. 752(d) is a diagram showing the arrangement of code vector Yj sentences during horizontal reversal conversion. FIG. 752(d) is a diagram showing the arrangement of code vector Yj sentences during vertical reversal conversion. 7JSZ diagram (e) is the code vector Y during 90 degree rotation conversion.
Figure 2 (f) is a diagram showing the arrangement of j sentences.
FIG. 3 is a block diagram showing the details of the conversion circuit 9 of the embodiment; FIG. 4 is a block diagram of an image encoding device using the conventional vector quantization method; FIG. In (a), the original image is input by mX by the image cutting circuit l.
FIG. 5(b) is a diagram showing the manner in which the image is divided into n-pixel medial elements, and FIG. In the figure, l...image cutting circuit, 2...image rearrangement circuit, 3...difference circuit, 4...product-sum circuit, 5...minimum (ic+judgment circuit), 6... Code table (ROM), 7...
・Address generator circuit, 8...Selector circuit, 9...
Conversion circuit, lO... Conversion designation circuit, 11... Encoder. Patent applicant: Canon Co., Ltd. Figure 1 w12 Figure 4 Figure 5 CG) (b)

Claims (4)

[Claims] (1) In an image encoding device using a vector quantization method, a code vector generating means generates a plurality of types of code vectors, and an element of the code vector generated by the code vector generating means according to a predetermined conversion mode. A code vector conversion means for converting an array, information for generating the code vector when the distortion thereof is minimized by comparison with the input image vector, and information on the predetermined conversion mode to encode the image. An image encoding device characterized by comprising an image encoding means. (2) The image encoding device according to claim 1, wherein the code vector conversion means converts the bit array of each element of the converted code vector. (3) A patent claim characterized in that the image encoding means encodes the image by adding information on a predetermined conversion mode above or below the information that generates the code vector when the distortion is minimized. The image encoding device according to item 1. (4) In an image encoding device using a vector quantization method, a code vector generating means generates a plurality of types of code vectors, and an image vector converts an array of elements of an input image vector according to a predetermined conversion mode. encoding an image based on a conversion means, information for generating the code vector when the distortion thereof is minimized by comparison with the image vector converted by the image vector conversion means, and information on the predetermined conversion mode; An image encoding device characterized by comprising an image encoding means.