JPS627551B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for generating display output information in a digital information processing device such as a calculator or a microcomputer.

In an information processing device, displaying the processing results is an essential condition. In that case, the processing results are temporarily stored in a main memory circuit such as random access, and then read out sequentially and stored in a display memory circuit, and the output of the display memory circuit is converted into glyph information by a decoding circuit and output. This is what is normally done.

At this time, the types of glyphs that can be displayed are often determined by the number of unit operation bits of the system. For example, in the case of a 4-bit microcomputer, it is most convenient to use 4 bits for display information. Four bits are also used in calculators. This is because arithmetic processing is executed using the BCD code. Therefore, the type of display information that can be obtained is quite limited, especially in such low-level systems. That is, for 4 bits, there are at most 16 types. Therefore, special tools were required to obtain more than 17 types of display information. For example, special latches or instructions have been provided to operate display memory circuits prior to or concurrently with display information processing operations to achieve the desired objective.

That is, in order to display more information than the types of information determined by the number of operation bits in a conventional information processing device, the method shown in FIG. 1 was used. This is the case in a system where the unit operation bit number is 4 bits, and the 4-bit parallel logic operation circuit 11
The calculation result is the 4-bit accumulator 1
2 is temporarily stored in memory. Carry information, ie, carry or borrow, generated as a result of the operation in the logic operation circuit 11 is stored in the flip-flop 13. The contents of the accumulator 12 are communicated via a 4-bit data bus 14 to necessary circuits within the device, such as RAM or output ports. The contents of the flip-flop 13 as well as the data bus 14 are stored in a 5-bit display memory circuit 15, and the contents of the memory circuit 15 are converted into display glyph information by a decoder 16, and the display device 17 is driven by the converted output. Ru.

Memory circuit 15 for displaying data on data bus 14
Only 16 types of information can be displayed by simply supplying the information to . However, by supplying one bit of the flip-flop 13 to the display memory circuit 15, 32
It is possible to display types. The information to be displayed is first subjected to appropriate arithmetic processing in a logical operation circuit 11 and then stored in an accumulator 12.
At this time, carry or borrow information is input to the flip-flop 13. The information from the accumulator 12 is stored in the display storage circuit 15 along with the information from the flip-flop 13 through the data bus 14, and becomes 5-bit display character shape information. Therefore, in this case, it is necessary to judge each time whether to set the flip-flop 13 and perform arithmetic processing, which requires considerably complicated software.

In some cases, the flip-flop 13 is disconnected from the logic operation circuit 11 as a means for setting the state of the flip-flop 13, and is used by setting or resetting it using a command prepared in advance in the device. In this case as well, a judgment is required as to whether to set or reset the flip-flop 13 as part of the display process, and the complexity of the software cannot be avoided.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a display information output device that is capable of outputting more types of display information than are determined by the number of unit operation bits, with a simple configuration and display processing.

According to the present invention, in an information processing device that reads and decodes and executes a program in a memory, the display storage device is configured to additionally supply not only data bus information but also at least part of address information for the memory. In other words, when the memory outputs a processing command to transfer the displayed information from the data bus to the display memory circuit, the memory address information at that time is also transferred to the display memory circuit, and the display memory circuit The complete information to be displayed is determined by both of these pieces of information input into the . In the end, the information on the data bus at that time is only part of the information to be displayed, but it can be treated as if it were complete display information. This greatly contributes to simplifying display processing.

FIG. 2 shows an embodiment of a display output information generating device according to the present invention. parallel arithmetic logic circuit 11,
The accumulator 12, data bus 14, display storage circuit 15, decoder 16, and display device 17 are the same as those shown in FIG. 1 with the same numbers. A program memory, generally read-only memory 18, is provided which governs the execution of the arithmetic operations of the device.
The address information on the address bus 19 is sent to the decoder 21
The address is converted into a specific address, and the program memory 18 is read out by specifying the address. By decoding and executing the read instructions, control necessary for information processing such as calculation by the arithmetic logic circuit 11 and storage of data into the display storage circuit 15 is performed.

In this invention, the display information includes not only the contents of the accumulator 12 but also the contents of the program memory 1.
Address information for 8 is also used. Therefore, some bits of address bus 19 are transferred to branch bus 2.
2 to the input side of the display storage circuit 15. Contents of accumulator 12 and memory 18
The contents of the address information are latched in the display storage circuit 15 so as to constitute one piece of displayed glyph information. The contents of this display memory circuit 15 are converted into actual display character shapes by a decoder 16. Assuming that the data bus 14 is a 4-bit bus, if only these 4 bits are used as the displayed information, only 16 types of display glyph information can be obtained at most. However, as shown in this embodiment, by adding address information of the program memory to the 4-bit information, display information can be expanded within a range proportional to the amount of added address information. It is also clear that display information can be switched simply by switching the address information.
Therefore, an output information generating device is constructed in which the display processing is extremely simple and the circuit configuration is also simple. Note that by performing appropriate calculations on the information to be displayed on the data bus 14 in the calculation circuit 11, it is also possible to perform display processing with appropriate conversion.

Furthermore, as shown in FIG. 3, for example, the address bus is branched and connected to the multiplexer 23, while a specific bit in the instruction read from the memory 18 and set in the instruction register 24 is connected to the multiplexer 23.
3 as a control signal. One or more bits of the address information selected by the multiplexer 23 may be supplied to the display storage circuit 15. Furthermore, when display information indicating a plurality of display digits of the display device 17 can be transmitted via the data bus 14,
It is also possible to add address information to one or more of the display information for each display digit of the data bus 14.

As explained above, according to the present invention, a wide variety of display character shapes can be obtained using extremely simple hardware and software, and is therefore particularly suitable for information processing devices using integrated circuits and the like.

In the embodiment described above, the output of the accumulator 12 was used as the information to be displayed, but the output or input information of the logic operation circuit 11 may also be used. In short, information on the data bus of this information processing device is used. Furthermore, the output of the decoder 21 may be used as address information added to the display storage circuit 15.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional display output information generating device, and FIGS. 2 and 3 are block diagrams showing an embodiment of the display output information generating device according to the present invention. 11: Logical operation circuit, 12: Accumulator, 14: Data bus, 15: Display memory circuit,
16, 21: Decoder, 17: Display device, 18:
Program memory, 19: Address bus, 23:
multiplexer.

Claims (1)

[Claims] 1 A memory that stores a program, a multi-bit display memory circuit for the purpose of transmitting glyph information to an external display device, a decoder that converts the output of the display memory circuit into glyph information, and information is transferred. and a data bus, and controls the display storage circuit, decoder, and data bus by reading and decoding the memory, wherein the multi-bit display storage circuit stores at least the address information. 1. A display output information generating device characterized in that the display output information generating device is configured such that both a portion of the display information on the data bus and the display information on the data bus are supplied as input information.