JPS627375A - Inverter controller - Google Patents

Abstract

PURPOSE:To smoothly change frequency, by selecting a high resolving controller for a timer determining frequency, and by setting values obtainable from the continuous addition and subtraction of the minimum resolved value of the timer to and from present frequency, on the timer determining frequency. CONSTITUTION:A PWM waveform output circuit 10 is driven by the respective data of a timer 1 for determining frequency, a timer 2 for regulating output voltage, a PWM assignment circuit 3, and a PWM data group 4. The input of signal from a frequency indication circuit 11 to a frequency assignment circuit 6 and an output voltage assignment circuit 8, is provided, and data corresponding to frequency from the frequency assignment circuit 6 and the output voltage assignment circuit 8 are respectively transmitted to a frequency correction circuit 5 and an output voltage regulating timer circuit 2. A high resolving controller is selected for the timer 1 for determining frequency, and values obtainable from the continuous addition and subtraction of the minimum resolved value of the timer to and from present frequency are set on the timer 1 for determining frequency, by the frequency correction circuit 5.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an inverter device that converts an alternating current power source of a constant frequency to an arbitrary frequency.

BACKGROUND OF THE INVENTION A block diagram of a conventional inverter device has a configuration as shown in FIG. It was generating a waveform.

Problems to be Solved by the Invention However, with this method, if there is a restriction that the timer data can only be possessed in units of several Hz, it is not possible to immediately shift to the next frequency when changing the frequency, and the timer data cannot be transferred immediately after a certain period of time has passed. The frequency was changed in such a way that it shifted to the frequency of fire, and when the frequency shifted, sound was generated in a step-like manner, which caused problems in terms of noise and vibration.

The present invention has been made in view of this point, and an object of the present invention is to eliminate the unpleasant step-like sound.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides an inverter control device that includes a frequency instruction means, a timer means for determining the frequency, a data group for outputting an unequal width waveform, and the unequal width waveform output data group. output voltage adjustment timer means for adjusting the output voltage by changing the output time of the width waveform; means for specifying one of the data groups for unequal waveform output described in i7; and setting in the frequency determination timer means. a data group to be set, a same wave number specifying means for specifying one of the data groups, a correction means for correcting this specified data, a data group to be set in the output voltage adjustment timer means, and this data. It is composed of voltage specifying means for specifying one of the groups.

With this configuration, a high-resolution timer is selected for determining the frequency, the difference between the timer value for the current frequency and the timer value for the next selected frequency is calculated, and the timer value for the current frequency is set. , the value obtained by successively adding or subtracting the minimum decomposition value of the timer value is set in the frequency determining timer to obtain the inverter output.

This makes it possible to slightly change the frequency, eliminate step-like sounds, and smoothly switch frequencies.

Embodiment FIG. 1 is a block diagram showing an embodiment of impark control of the present invention.

In FIG. 1, 1 is a frequency determination timer, 2 is an output voltage adjustment timer, 4 is an inverter PWM data group, and 3 is a timer for determining a frequency.
10 is a PWM data designation circuit (hereinafter referred to as PWM designation circuit) that designates one of the PWM data groups 4; 10 is the frequency determination timer (1); and the output voltage adjustment timer (2).
, a PWM designation circuit (3), a PWM waveform output circuit driven by each data of the PWM data group (4), 7 a frequency timer data group, and 6 a frequency timer data designation that designates one of the frequency timer data group 7. A frequency timer data correction circuit (hereinafter referred to as the frequency correction circuit) adds an appropriate correction value to the specified data and transfers the data to the frequency determination timer (1). 9 is a data group of the output voltage adjustment timer (2), and 8 is an output voltage timer data designation circuit (hereinafter referred to as the output voltage designation circuit) that designates one of the data groups (9) and transfers it to the timer 2. ). Reference numeral 11 designates a frequency designation circuit, and the signal from this is inputted to the frequency designation circuit 6 and the output voltage designation circuit 8, and the frequency designation circuit 6 and the output voltage designation circuit 8 each receive data corresponding to the frequency.
It is transferred to the frequency correction circuit 5 and the output voltage adjustment timer circuit 2.

Here, FIG. 2 shows the configuration of the frequency correction circuit (5),
The operation will be explained with reference to the flowchart in FIG.

In the figure, 1o1 is a comparison circuit, and a previous frequency timer data holding circuit (
The frequency timer data from the previous frequency holding circuit (hereinafter referred to as the previous frequency holding circuit) 103 is compared with the frequency timer data H1 from the frequency instruction circuit 6 shown in FIG. Output a signal.

In this correction circuit 102, the previous frequency timer data count is inputted from the previous frequency holding circuit 103, and when a mismatch signal, which is a signal, from the comparison circuit 101 is confirmed, an appropriate value is applied to the previous timer value. Correction is performed by adding or subtracting the value. In addition, the correction value includes the minimum time W? ,
By setting the frequency value, you can change the frequency most smoothly.

In addition, if a coincidence signal is confirmed, the correction circuit 102
holds the frequency timer data as is without any correction.

In the above manner, the frequency timer data that has been corrected or not corrected is transferred to the frequency determination timer 1 in FIG.
It is output to the previous frequency holding circuit 103 and prepared for the next frequency change.

Effects of the Invention As described above, the present invention is extremely useful because it can change the frequency in a smooth step-like manner with a simple structure, and the sound at the time of change can be changed continuously.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an inverter control circuit according to an embodiment of the present invention, Fig. 2 is a block diagram of a frequency correction circuit in the control circuit, Fig. 3 is a flowchart of the control circuit, and Fig. 4 is a conventional example. FIG. 2 is a block diagram of an impark control circuit shown in FIG. 1...Timer for frequency determination, 2...Timer for output voltage adjustment, 3...PWM data specification circuit, 4
PWM data details, 5. Same wave number timer data correction circuit,
6... Same wave number timer data designation circuit, 7... Frequency timer data group, 8... Output voltage timer data instruction circuit, 9... Output voltage timer data group,
10...PWM waveform output processing circuit, 11...
...Frequency indication circuit, 101...-Comparison circuit, 1
02...Correction circuit, 103-...Previous frequency timer data holding circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Illustrated I-sentence timer H1

Claims (1)

[Claims] a frequency instruction means, a frequency determination timer means, a data group for outputting an unequal width waveform, an output voltage adjustment timer means for adjusting an output voltage by changing the output time of the unequal width waveform; means for specifying one of the data groups for equal waveform output; a data group to be set in the frequency determination timer means; a frequency specifying means for specifying one of the data groups; and correcting the specified data. An inverter control device comprising: a correction means for adjusting the output voltage, a data group set in the output voltage adjustment timer means, and a voltage specifying means for specifying one of the data groups.