JPS6273731A - Sealing method for semiconductor device - Google Patents

Abstract

PURPOSE:To make a semiconductor device have high performance by forming a through hole in which the inner surface is metallized in a substrate or a slid, mounting the lid, then feeding gas via the hole into the lid, and then sealing the hole by a soldering unit. CONSTITUTION:A through hole 12 is formed in an Al2O3 lid 11, an aluminum metallized layer is accumulated, an IC ship 14 is them mounted on a package body 40, a metal rod 20 is secured by soldering via the hole 12 to the body 40, and the lid 11 is secured by bonding with epoxy resin to the body. The lead pin 42 of PIN-PD 41 hermetically attached to the side of the body 40 and the rod 20 are connected by soldering, and a package cover 43 is mounted. Thus, since it is not necessarily exposed with high temperature for a long time due to the sealing, there is no face that the chip exposed to a damage, and in turn, a soldered part can be used therein or a through hole can be formed in the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for sealing a semiconductor device. More specifically, the present invention relates to a method for sealing hybrid integrated circuits, etc., which does not require exposure to high temperatures for a long period of time for sealing, and which eliminates the risk of chip destruction.

BACKGROUND OF THE INVENTION Conventional technology hybrid integrated circuits (hereinafter referred to as hybrid ICs) have recently become widely used as a packaging technology that enables upgrading of various systems. In other words, there is a need for hybrid I
Various interesting features of C, such as small size, high density, and high performance, have greatly expanded its use. Therefore, there is a trend to improve hybrid ICs to further improve system functions.

Therefore, it is important to improve the configuration, packaging technology, and reliability of hybrid ICs, which can be expected to significantly improve the performance of the various systems described above.

When designing and manufacturing this package, in addition to various requirements such as system implementation, usage environment conditions, required reliability level, power consumption, and electrical characteristics, economic efficiency, mass production, uniformity of quality, etc. This will be a big challenge.

In particular, in high-frequency hybrid ICs, the IC chip is often directly bonded to the substrate, so the sealing technology is important.

Currently, the main packaging methods used for hybrid ICs are broadly classified into (i) hermetic sealing method, (ii) resin sealing method, and the like.

This type of backing is used to sufficiently maintain desired characteristic values by isolating semiconductor devices from the external atmosphere, to ensure thermal and electrical conduction, to ensure insulation distance between electrodes, and to facilitate transportation and handling. As mentioned above, in pursuit of miniaturization and higher performance of semiconductor devices, it is especially important to ensure consistency between semiconductor devices and external conditions. This must be done in parallel with improvements to the device itself.

The hermetic sealing method has already achieved a great deal of success as a packaging method for semiconductor devices, and is generally used in electrical resistance welding, which welds the base and cap metals together using pressure and electrical local heating, and in ceramics, metals, etc. that serve as package materials. In addition to the low melting point glass method or the soft soldering method, in which a sealing material such as glass or Au-3N is applied to the material and welded in an appropriate heating atmosphere, recently, an airtight sealing method using an epoxy resin as the sealing material has been developed. The latter is attracting attention in terms of low-temperature processing during sealing work and economical efficiency of the sealing material.

On the other hand, resin encapsulation is widely used as a package because it is superior in mass production and economically advantageous compared to metals, ceramics, etc., and various improvements have been made to improve performance. Its reliability has improved, making it highly practical.

However, unlike the hermetic sealing method, since the materials used directly come into contact with mounting components such as membrane elements, semiconductors, and passive elements of hybrid ICs, the stress, thermal expansion coefficient, adhesion of the resin, impurities contained, and water permeability are It is desired to develop highly reliable sealing technology that takes into consideration water absorption, stray capacitors generated in circuits.

In this resin encapsulation method, a semi-finished hybrid IC is set in a mold or case, and a resin such as silicone or epoxy is injected as a potting agent.
A casting method in which the hybrid IC is hardened, a dipping method in which the hybrid IC is directly immersed in a liquid resin and coated on the entire surface, and an IC chip is assembled into a lead frame by wire bonding in advance, and this is set in a mold to form a powder or tablet. A transfer molding method is known, in which epoxy, silicone, etc., is melted and injected into a mold in a low viscosity state, and then solidified.

Among these methods, the immersion method is a simple process, but in order to obtain uniform external shape and reproducibility, the thixotropic property of the resin9,
Viscosity, pot life, curing characteristics, etc. must be carefully examined, and efforts must be made to control horizontal level precision V during immersion, coating ratio, thickness, adhesion, etc.3.
Furthermore, although transfer molding is now the mainstream for semiconductor encapsulation, it requires the procurement of expensive molds and molding machines, and in the case of hybrid ICs, it is difficult to standardize the shape. Because of this, the cost is high.

The resin sealing method for conventional hybrid ICs is shown in attached No. 2.
As shown in the figure, first, a chip 2 is mounted on a substrate 1, wires 3 are stretched, and the chip is potted with resin 4 (see Fig. 2 (a)), which is an extremely simple process. , there are problems with reliability and high frequency characteristics.

Moreover, FIGS. 2(b) to (d) are schematic diagrams for explaining another conventional sealing method different from FIG. 2(a), and (1)) and (C) (d) shows an exploded view of the parts, and (d) shows an assembled view of these parts. In the example shown here, 8, the chip 2 on the substrate 1 is connected to the wiring pattern 5.
It is also sealed using a lid 6 and a sealing resin 7, and although it has better reliability and high frequency characteristics when compared to the example shown in FIG. 2(a), it has the following various drawbacks. ing.

First, the sealing resin is exposed to high temperatures for a long time to harden, so
May cause internal chip or wire destruction. Furthermore, it is difficult to use internal soldering components and to provide through holes in the board. This is because the solder used to seal the through-holes and the solder used to attach components are exposed to high temperatures for a long time during sealing and corrode the electrode patterns on the board. To avoid this problem, and to further strengthen the seal and prevent gas generation, if the sealing resin is soldered, please take care to avoid short circuits as shown in Figure 2 (C).
8 must be made into a three-layer structure consisting of a wiring pattern, an insulating layer, and a metal layer, but if this is done, the stray capacity between wirings will increase significantly.

Problems to be Solved by the Invention As mentioned above, as semiconductor devices progress, improvements in their packaging have become an important issue, but further improvements have been made to the sealing technology as well, and improvements to the packaging technology have been made. It is necessary to improve performance and reliability. However, as mentioned above, the conventional method is still insufficient, and there is still plenty of room for improvement.

Therefore, the object of the present invention is to avoid the low reliability and low high frequency characteristics seen in the resin sealing shown in FIG. 2(a), and to avoid the sealing shown in FIG. It is an object of the present invention to provide a novel and highly practical method for encapsulating a semiconductor device that does not have the drawbacks of conventional encapsulation methods and can satisfy the characteristics required by recent needs.

Of course, it is also a part of the object of the present invention to provide a sealed body of a semiconductor device that is highly reliable and has excellent high frequency characteristics, which can be obtained by the above method.

In view of the above-mentioned current state of conventional semiconductor device sealing technology, the present inventor conducted various studies in order to develop a sealing method that can be expected to improve the reliability of hybrid ICs in particular. As a result, it was found that providing a through hole in the substrate or the lid (or cap) and metallizing the inner surface of the through hole is extremely advantageous in achieving the above object of the present invention, and these new findings have been made. The present invention was completed based on this.

That is, in the sealing method of the present invention, when sealing a chip directly bonded on a substrate, a through hole whose inner surface is metallized is provided in the substrate or the lid, and after the lid is attached, the lid is inserted through the through hole. The method is characterized in that it includes a step of introducing gas into the through hole and then sealing the through hole with a soldering device.

In the present invention, various conventionally known materials such as ceramics such as alumina and beryllia or thermoplastic resin can be used as substrate and lid materials, and through holes can be formed by photoetching or mechanical grinding. method, laser processing method, etc. can be used.

The inner surface of the through hole is metalized 7 and sealed after completion of a predetermined process. This metallized layer can be formed by depositing A1, Au, Ag, Cu, etc. by various plating methods, such as electrolytic plating, electroless plating, gas phase reaction methods, and various vacuum evaporation methods. It is preferable to use a gas phase reaction method, plasma CVD method, etc., which have good rounding properties. The thickness of this metallized layer is not particularly limited, but generally a sufficient effect can be expected if it is about 1 to 20 μm.

According to another aspect, in the sealing method of the present invention, a metallized layer can be provided on each of the mutually contacting parts of the substrate and the lid by, for example, a photolithography method. The lid can be easily installed.

In connection with the sealing method in the mounting technology of vertical semiconductor devices,
Particularly important for hybrid ICs and the like are improvements in reliability and high frequency characteristics. Regarding the former, even if the characteristics of a semiconductor device are improved, high reliability cannot be ensured if a new failure mode occurs during mounting. There are problems such as internal chip breakage due to high temperature treatment during resin curing, which needs to be improved.

According to the method of the present invention, as shown in the attached FIG.
Or solder 16 the single chip 14 and the chip/knob parts 15.
Implement it with etc. Furthermore, resin, adhesive, solder, etc.1
7 to attach the lid 11 to the substrate 10. In addition, when attaching the lid using solder, it is also possible to mount it together with the chip component 15. Next, Nz and Ar are passed through the through hole 12.

Dry air, reducing gas, or other inert gas 18 is introduced into the lid to fill it, and the through hole 12 is sealed with solder 19 or the like in this gas.

Referring to FIG. 1(b), there is a through hole 1 in the lid 11.
2 is provided, and in this case, a metal rod 20 is fixed to the substrate 10 via a through hole 12 with a binder or conductive resin 21 (this metal rod 20 will be explained later). For example, PIN-FD (PI
Functions as a connection terminal for connectors such as N-type photodiodes). Other points are the same as those in FIG. 1(a), so the same numbers are given and explanations are omitted.

FIG. 1C illustrates another embodiment of the present invention, and is an example in which metallized layers 302 and 302 are applied to the mutually contacting portions of the substrate 10 and the lid 11, respectively. In this case, the lid 11 is attached using solder 31.
It is advantageous to do so.

Thus, according to the sealing method of the present invention, solder can be used to bond the substrate and the lid, so unlike conventional sealing methods, chips etc. can be used to harden the sealing resin. There is no need to keep the chip under high temperature for a long time, so the puff caging operation can be performed without the risk of chip damage, and the reliability of the resulting sealed body is greatly improved. Furthermore,
Wiring can be done through through-holes provided on the board or lid, and the three-layer structure part 8 described above is not formed, so the stray capacity between wiring can be greatly reduced. If a through hole is provided, an even greater effect can be expected, and sealing with solder or the like can be performed without significantly increasing the stray capacity.

EXAMPLES The method for encapsulating a semiconductor device of the present invention will be explained in more detail with reference to Examples. However, the scope of the present invention is not limited in any way by the following examples.

FIG. 3 shows an example in which the sealing method of the present invention is applied to an optical receiving module useful in optical data links and the like. In this example, the main configuration is the same as that in FIG. 1(b). A through hole is provided in the lid as shown in Fig. 1(b), into which a metal rod is inserted and fixed, and this serves as a connection terminal for the connector of the optoelectric converter (PIN-PD). The input signal from the PIN-FD is input to the circuit via a lead bin.

First, a through hole 12 is formed in the lid 11 made of A1□03, a metallized layer of AI is deposited by vapor deposition, and then an IC chip 1 is placed on the package body 40 (ceramic).
4 is mounted, the metal rod 20 is fixed to the main body 40 with solder through the through hole 12, and then the lid 11 is adhesively fixed to the main body 40 with epoxy resin. On the other hand, main body 4
The lead pin 42 of the PIN-PD 41 airtightly attached to the side of the PIN-PD 41 is similarly welded to the metal rod 20, and the package lid 43 is attached to complete the optical receiving module. Note that reference number 44 represents a pin.

The performance of an optical receiving module is greatly influenced by the stray capacity of the beam doped pin 42.
By adopting the sealing method of the present invention as described above,
It was found that the stray capacity was significantly reduced.

Effects of the Invention As explained in detail above, according to the method for encapsulating a semiconductor device of the present invention, first of all, it is possible to attach the solder to the substrate, so it takes a long time for the encapsulation. Since there is no need to expose the chip to high temperatures for an extended period of time, there is no need to worry about chip breakage, and it is also possible to use soldered parts inside or provide through holes in the board.

Furthermore, since wiring can be done via through holes and there is no conventional three-layer structure, stray capacity between wiring can be reduced, which is particularly effective when through holes are provided on the lid side. You can expect it. Also, it can be sealed with a soldering device without creating a large buildup of stray capacity.

In addition, since there is no need for long-term heating operations for sealing, the mounting time can be greatly shortened, and the assembly time of various semiconductor devices and devices that use them can be significantly shortened, making it extremely economical. .

(Thus, the sealing method of the present invention can be advantageously applied to sealing a substrate on which an IC or a single chip is directly mounted.

[Brief explanation of drawings]

FIGS. 1(a) to (C) are views schematically showing three different embodiments of the present invention, and FIGS. 2(a) and 2) to (d) are views showing two different conventional embodiments, respectively. FIG. 3 is a schematic diagram for explaining an example of applying the sealing method of the present invention to an optical receiving module useful in optical data links, etc. This is a typical diagram. (Main reference numbers) 1.10...Substrate, 2.14...Chip, 3.
・Wire, 4. Resin, 5. ・Wiring pattern, 6.11 ・Lid, 7. Sealing resin,
8.Three layer part, 12.Through hole, 13.30. ．． 302...metalized layer, 15...chip component, 16. 19.31...Solder, 17...
Sealing resin or solder, 18...Gas, 20...Metal rod, 40...Package body, 41...PIN-PD. 42... Lead pin, 43... Package lid, 44...
·bottle

Claims (3)

[Claims] (1) A method for sealing a chip directly bonded onto a substrate, in which a through hole is provided in the substrate or a lid, the inner surface of the through hole is metallized, and after the lid is attached to the substrate, the through hole is sealed. The method for sealing a semiconductor device as described above, comprising introducing gas into the lid through a hole, and then sealing the through hole with a soldering device. (2) The sealing method according to claim 1, characterized in that a metallized layer is provided on each portion of the lid and the substrate that are in contact with each other. (3) The sealing method according to claim 1 or 2, wherein the gas is N_2, dry air, an inert gas, or a reducing gas.