JPS6272211A - Transistor amplifier - Google Patents

Transistor amplifier

Info

Publication number
JPS6272211A
JPS6272211A JP60211599A JP21159985A JPS6272211A JP S6272211 A JPS6272211 A JP S6272211A JP 60211599 A JP60211599 A JP 60211599A JP 21159985 A JP21159985 A JP 21159985A JP S6272211 A JPS6272211 A JP S6272211A
Authority
JP
Japan
Prior art keywords
output
amplifier
gate current
gate
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60211599A
Other languages
Japanese (ja)
Inventor
Shinichi Murai
村井 伸一
Yoichi Arai
陽一 新井
Osamu Baba
修 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60211599A priority Critical patent/JPS6272211A/en
Publication of JPS6272211A publication Critical patent/JPS6272211A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To suppress generation of a gate current of a GaAs FET amplifier by providing a circuit detecting a gate current of an output stage transistor (TR) of an amplifier and a variable attenuator preventing excess input to the output stage TR, detecting the gate current so as to use the detection output thereby suppressing the gain. CONSTITUTION:A1, A2-An are n-set of amplifier stages and each has a GaAs FET 1. As a gate current detection circuit IGDET, a differential amplifier CA, for example, is used, a voltage at an output terminal B is fed to one input of the amplifier CA, a reference voltage is fed to the other input, and when the former exceeds the latter, the output is a gate current detection output of the outer stage TR An. A PIN diode is used for a variable attenuator ATT. The resistance of a PIN diode is changed depending on the current flowed thereto. Thus, when the gate current flows, the attenuation of the variable attenuator ATT is increased to lower the signal level, the input to the output stage TR An is decreased thereby bringing the gate curret into zero or minimizing it.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ヒ化ガリウム電界効果トランジスタを多段に
接続して構成される増幅器、特番こその出力段トランジ
スタの入力保護に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplifier constructed by connecting gallium arsenide field effect transistors in multiple stages, and to input protection of an output stage transistor.

〔従来の技術〕[Conventional technology]

半導体としてヒ化ガリウム(GaAs)を用し)た電界
効果トランジスタ(FET)は高速動作可能なので、こ
れを多段に接続してマイクロ波帯の増幅器が構成される
。GaAsは、シリコンのようにゲート絶縁膜を形成す
ることが容易でないので、CaAs  FETは絶縁ゲ
ート型ではなく、ダイオードゲート型になるのが普通で
ある。
Field-effect transistors (FETs) using gallium arsenide (GaAs) as a semiconductor can operate at high speed, so a microwave band amplifier is constructed by connecting them in multiple stages. Unlike silicon, it is not easy to form a gate insulating film on GaAs, so CaAs FETs are usually of a diode gate type rather than an insulated gate type.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながらダイオードゲート型では、入力が過大にな
る(ゲート電極とGaAs基板で構成されるショットキ
ダイオードをオンにする入力になる)とゲート電流が流
れる。ゲート電流(整流電流)が流れるとGaAs  
FETの信頼性に影響し、寿命を短かくするので好まし
くない。しかし入力を大にすると大出力が得られるから
、QaAsFETでも小入力の直線範囲だけでなく、大
入力飽和領域で動作させながちである。そこで本発明で
は、最も多くゲート電流が流れることになる出力段トラ
ンジスタのゲート電流を検出してその検出出力により利
得を抑え、過入力保護を行なおうとするものである。
However, in the diode gate type, when the input becomes excessive (the input turns on a Schottky diode composed of a gate electrode and a GaAs substrate), a gate current flows. When gate current (rectified current) flows, GaAs
This is not preferable because it affects the reliability of the FET and shortens its life. However, since a large output can be obtained by increasing the input, QaAsFETs tend to operate not only in the linear range of small inputs but also in the large input saturation region. Therefore, in the present invention, the gate current of the output stage transistor through which the largest amount of gate current flows is detected, and the gain is suppressed using the detected output to provide over-input protection.

r問題点を解決するための手段〕 本発明は、ヒ化ガリウム電界効果トランジスタを多段に
接続して構成される高出力増幅器において、該増幅器の
出力段トランジスタのゲート電流を検出する回路と、該
増幅器に挿入され、ゲート電流検出回路の出力電流によ
り減衰量を制御して出力段トランジスタへの過入力を防
止する可変減衰器とを備えることを特徴とするものであ
る。
Means for Solving Problems] The present invention provides a high-output amplifier configured by connecting gallium arsenide field effect transistors in multiple stages. The variable attenuator is inserted into the amplifier and controls the amount of attenuation based on the output current of the gate current detection circuit to prevent excessive input to the output stage transistor.

〔作用〕[Effect]

出力段トランジスタのゲート電流を検出し、検出出力が
あれば可変減衰器を操作して信号レベルを下げるように
すれば、過大入力を抑えてGaAsFET増幅器の寿命
を延ばし、信頼性を向上させることができる。
By detecting the gate current of the output stage transistor and operating the variable attenuator to lower the signal level if there is a detected output, it is possible to suppress excessive input, extend the life of the GaAsFET amplifier, and improve reliability. can.

〔実施例〕〔Example〕

第1図で説明すると、AI、A2.・・・・・・Anは
n個の増幅段で、各々はGaAs  FET1個を含む
。何段構成にするかは、必要な利得により定まる。IG
DETは、n段構成のこのGaAs  FET増幅器の
出力段トランジスタAnのゲート電流を検出する回路、
ATTは第1段トランジスタA1と第2段トランジスタ
A2の間に挿入された可変減衰器、CAは制御増幅段で
、ゲート電流検出回路IGDETの出力を増幅して可変
減衰器ATTに与え、該減衰器の信号減衰量を変える。
To explain using FIG. 1, AI, A2. . . . An is n amplification stages, each including one GaAs FET. The number of stages to be configured is determined by the required gain. I.G.
DET is a circuit that detects the gate current of the output stage transistor An of this n-stage GaAs FET amplifier;
ATT is a variable attenuator inserted between the first stage transistor A1 and the second stage transistor A2, and CA is a control amplification stage, which amplifies the output of the gate current detection circuit IGDET and supplies it to the variable attenuator ATT. Change the signal attenuation of the device.

ゲート電流検出回路IGDETは第2図に示すように、
出力段トランジスタAnへゲートバイアス電圧を供給す
る抵抗分圧回路RVDの出力端Bの電圧変化を検出する
回路で構成できる。R+、R:は該抵抗分圧回路の抵抗
、L及びCはローパス、ハイカットフィルタのインダク
タンス及びコンデンサである。分圧回路RDVは該ロー
パスフィルタを通して出力段トランジスタAnのゲート
Gへ、動作点を定める負のバイアス電圧(−〇、数V〜
=1、数V)を供給するが、高周波信号入力が過大にな
ってゲート電流が流れると、分圧回路RVDの出力端B
の電圧が下る(例えば−〇、8■であったものが−1,
2Vなどになる)。そこでゲート電流検出回路として例
えば差動増幅器を用い、該増幅器の一方の入力端に出力
端Bの電圧を加え、他方の入力端に基準電圧を加え、前
者が後者を越えるとき出力を生じるようにすれば、該出
力が出力段トランジスタAnのゲート電流検出出力にな
る。
The gate current detection circuit IGDET is as shown in FIG.
It can be configured with a circuit that detects a voltage change at the output end B of a resistive voltage divider circuit RVD that supplies a gate bias voltage to the output stage transistor An. R+, R: are the resistances of the resistance voltage divider circuit, and L and C are the inductance and capacitor of the low-pass and high-cut filters. The voltage dividing circuit RDV passes through the low-pass filter to the gate G of the output stage transistor An, and applies a negative bias voltage (-〇, several V to
= 1, several V), but if the high frequency signal input becomes excessive and a gate current flows, the output terminal B of the voltage divider circuit RVD
voltage decreases (for example, what was -0, 8■ becomes -1,
2V etc.) Therefore, for example, a differential amplifier is used as the gate current detection circuit, and the voltage of the output terminal B is applied to one input terminal of the amplifier, and the reference voltage is applied to the other input terminal, so that when the former exceeds the latter, an output is generated. Then, the output becomes the gate current detection output of the output stage transistor An.

可変減衰器ATTにはPINダイオード又はデュアルゲ
ートトランジスタを用いる。PINダイオードは流す電
流により抵抗が変り、従ってゲート電流検出回路IGO
ETの出力を増幅器CAで増幅して加えるとき、ゲート
電流が流れたとき可変減衰器ATTの減衰量を大にして
信号レベルを下げ、出力段トランジスタAnの入力を下
げてゲート電流を0又は僅小にすることができる。
A PIN diode or dual gate transistor is used for the variable attenuator ATT. The resistance of the PIN diode changes depending on the current flowing, so the gate current detection circuit IGO
When the output of ET is amplified and added by amplifier CA, when the gate current flows, the amount of attenuation of variable attenuator ATT is increased to lower the signal level, and the input of output stage transistor An is lowered to reduce the gate current to 0 or a small amount. Can be made small.

ゲート電流検出回路IGOETの出力に応じて入力段部
分のトランジスタのドレイン電圧を下げ、信号レベルを
下げる方法も可変減衰器として使用できる。
A method of lowering the signal level by lowering the drain voltage of the transistor in the input stage according to the output of the gate current detection circuit IGOET can also be used as a variable attenuator.

第3図はGaAs増幅器の具体例を示す図で、Ai、A
jは第1.第j増幅段、RVD及びLCは各段に対する
バイアス電圧供給用抵抗分圧回路及びローパスフィルタ
である。Ccは各段の結合用コンデンサ、MOは出力側
整合回路、Miは入力側整合回路、Vdは電源、GRD
はグランドである。
Figure 3 is a diagram showing a specific example of a GaAs amplifier, with Ai, A
j is the first. The j-th amplification stage, RVD, and LC are a resistance voltage divider circuit and a low-pass filter for supplying bias voltage to each stage. Cc is the coupling capacitor of each stage, MO is the output side matching circuit, Mi is the input side matching circuit, Vd is the power supply, GRD
is ground.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によればGaAsFET増幅
器のゲート電流発生を抑えることができ、該増幅器の高
信頼性化、長寿命化に有効である。
As explained above, according to the present invention, it is possible to suppress the generation of gate current in a GaAsFET amplifier, which is effective in increasing the reliability and extending the life of the amplifier.

【図面の簡単な説明】 第1図は本発明の実施例を示すブロック図、第2図はそ
の要部回路図、第3図はGaAs  FET増幅器の一
部分の詳細を示す回路図である。 図面でA1〜AnはGaAs  FETからなる各増幅
段、Anは出力段トランジスタ、IGDETはゲート電
流検出回路、ATTは可変減衰器、RVDは抵抗分圧回
路、L及びCはローパスフィルタのインダクタンス及び
コンデンサである。
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram of the main part thereof, and FIG. 3 is a circuit diagram showing details of a part of a GaAs FET amplifier. In the drawing, A1 to An are each amplification stage made of GaAs FET, An is an output stage transistor, IGDET is a gate current detection circuit, ATT is a variable attenuator, RVD is a resistive voltage divider circuit, and L and C are the inductance and capacitor of a low-pass filter. It is.

Claims (2)

【特許請求の範囲】[Claims] (1)ヒ化ガリウム電界効果トランジスタを多段に接続
して構成される高出力増幅器において、 該増幅器の出力段トランジスタのゲート電流を検出する
回路と、 該増幅器に挿入され、ゲート電流検出回路の出力電流に
より減衰量を制御して出力段トランジスタへの過入力を
防止する可変減衰器とを備えることを特徴とするトラン
ジスタ増幅器。
(1) In a high-output amplifier configured by connecting gallium arsenide field effect transistors in multiple stages, a circuit for detecting the gate current of the output stage transistor of the amplifier, and an output of the gate current detection circuit inserted into the amplifier. A transistor amplifier comprising: a variable attenuator that prevents excessive input to an output stage transistor by controlling an amount of attenuation using a current.
(2)ゲート電流検出回路は、出力段トランジスタのゲ
ートへローパスフィルタを介してバイアス電圧を供給す
る抵抗分圧回路の出力電圧検出回路で構成されることを
特徴とする特許請求の範囲第1項記載のトランジスタ増
幅器。
(2) The gate current detection circuit is comprised of an output voltage detection circuit of a resistor voltage divider circuit that supplies a bias voltage to the gate of the output stage transistor via a low-pass filter. The transistor amplifier described.
JP60211599A 1985-09-25 1985-09-25 Transistor amplifier Pending JPS6272211A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60211599A JPS6272211A (en) 1985-09-25 1985-09-25 Transistor amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60211599A JPS6272211A (en) 1985-09-25 1985-09-25 Transistor amplifier

Publications (1)

Publication Number Publication Date
JPS6272211A true JPS6272211A (en) 1987-04-02

Family

ID=16608429

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60211599A Pending JPS6272211A (en) 1985-09-25 1985-09-25 Transistor amplifier

Country Status (1)

Country Link
JP (1) JPS6272211A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04158608A (en) * 1990-10-23 1992-06-01 Mitsubishi Electric Corp Fet multi-stage amplifier
JPH05327363A (en) * 1992-05-19 1993-12-10 Pioneer Electron Corp Protector for power transistor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04158608A (en) * 1990-10-23 1992-06-01 Mitsubishi Electric Corp Fet multi-stage amplifier
JPH05327363A (en) * 1992-05-19 1993-12-10 Pioneer Electron Corp Protector for power transistor
JP2609567B2 (en) * 1992-05-19 1997-05-14 パイオニア株式会社 Power transistor protection device

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