JPS6269129U - - Google Patents

Info

Publication number
JPS6269129U
JPS6269129U JP16022985U JP16022985U JPS6269129U JP S6269129 U JPS6269129 U JP S6269129U JP 16022985 U JP16022985 U JP 16022985U JP 16022985 U JP16022985 U JP 16022985U JP S6269129 U JPS6269129 U JP S6269129U
Authority
JP
Japan
Prior art keywords
circuit
power supply
integrating
amplifier
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16022985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16022985U priority Critical patent/JPS6269129U/ja
Publication of JPS6269129U publication Critical patent/JPS6269129U/ja
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)
  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の実施例を示すもので、第1図は
本考案を構成する回路図の動作説明図である。 1……重量検出回路、2……直流電源、3……
電源スイツチ、4……演算増幅器、5……ミラー
積分回路、6……シユミツト回路、A,A
…CMOS直流増幅器。
The drawings show an embodiment of the present invention, and FIG. 1 is an explanatory diagram of the operation of a circuit diagram constituting the present invention. 1...Weight detection circuit, 2...DC power supply, 3...
Power switch, 4... operational amplifier, 5... Miller integrating circuit, 6... Schmitt circuit, A 1 , A 2 ...
...CMOS DC amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 演算増幅器、積分用抵抗、積分用コンデンサよ
りなるミラー積分回路の出力点を固定抵抗並びに
CMOS直流増幅器よりなるシユミツト回路の入
力点に接続し、ミラー積分回路の積分用抵抗をこ
のシユミツト回路の出力点に接続すると共に、更
にミラー積分回路の演算増幅器の電源端子を電源
スイツチを介して直流電源に接続し、かつ前記シ
ユミツト回路のCMOS直流増幅器の電源端子は
直接、直流電源に接続したことを特徴とするはか
りのドリフト減少回路。
The output point of a Miller integrating circuit consisting of an operational amplifier, an integrating resistor, and an integrating capacitor is connected to the input point of a Schmitt circuit consisting of a fixed resistor and a CMOS DC amplifier, and the integrating resistor of the Miller integrating circuit is connected to the output point of this Schmitt circuit. Further, the power supply terminal of the operational amplifier of the Miller integrating circuit is connected to the DC power supply via a power switch, and the power supply terminal of the CMOS DC amplifier of the Schmitt circuit is directly connected to the DC power supply. Drift reduction circuit for scales.
JP16022985U 1985-10-18 1985-10-18 Pending JPS6269129U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16022985U JPS6269129U (en) 1985-10-18 1985-10-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16022985U JPS6269129U (en) 1985-10-18 1985-10-18

Publications (1)

Publication Number Publication Date
JPS6269129U true JPS6269129U (en) 1987-04-30

Family

ID=31085411

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16022985U Pending JPS6269129U (en) 1985-10-18 1985-10-18

Country Status (1)

Country Link
JP (1) JPS6269129U (en)

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