JPS6265869U - - Google Patents
Info
- Publication number
- JPS6265869U JPS6265869U JP15889285U JP15889285U JPS6265869U JP S6265869 U JPS6265869 U JP S6265869U JP 15889285 U JP15889285 U JP 15889285U JP 15889285 U JP15889285 U JP 15889285U JP S6265869 U JPS6265869 U JP S6265869U
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- output terminals
- circuit package
- input
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 2
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15889285U JPS6265869U (en:Method) | 1985-10-16 | 1985-10-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15889285U JPS6265869U (en:Method) | 1985-10-16 | 1985-10-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6265869U true JPS6265869U (en:Method) | 1987-04-23 |
Family
ID=31082806
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15889285U Pending JPS6265869U (en:Method) | 1985-10-16 | 1985-10-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6265869U (en:Method) |
-
1985
- 1985-10-16 JP JP15889285U patent/JPS6265869U/ja active Pending