JPS6258413A - Control circuit for head position of disc storage device - Google Patents

Abstract

PURPOSE:To simplify the circuit constitution for detection of a head position and to operate this circuit surely by allowing a synchronizing circuit to output a synchronizing signal at a timing later than the start time of a reference information signal and allowing a threshold generating circuit to output a threshold signal whose time width is shorter than the period from the start to then end of the reference information signal. CONSTITUTION:A threshold signal generating circuit 10 issues a threshold signal RP, and a comparing circuit 30 compares a pulse signal in a reference signal RS with the threshold signal TS and output a count pulse CP if the peak value of the former exceeds the value of the latter. A time width Tt of the threshold signal TS which the threshold signal generating circuit 10 outputs is made shorter than a timer Tr from a start l top an and (n) of the reference signal RS. That is, the threshold signal TS is generated the delay time td after the reference signal RP, and the time width of the threshold signal TS is set to a sufficiently short value so that the end of the threshold signal TS is not later than the end (n) of the reference signal RS.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention is a circuit for controlling the position of a transducer head for reading and writing information in a disk storage device, typically a so-called fixed disk device. More precisely, a plurality of information recording tracks and a plurality of areas in which reference information for detecting the position of a transducer head that reads and writes information on the tracks are set on the storage medium disk, and the reference information is recorded on the storage medium disk. A group of repetitive patterns are recorded between adjacent areas, and the position of the head is determined based on a pair of reference information signals sequentially read out from the adjacent 1 pairs of areas via the head. The present invention relates to a head position control circuit for a disk storage device that detects and controls the head position.

[Prior art and its problems]

As is well known, a disk storage device is equipped with a plurality of disks or a single disk as an information storage medium, and this disk is moved by a motor to several thousand r, p, in a fixed disk device.
It is rotated at a high speed of st. On both sides of the disk, dozens to hundreds of concentric tracks for recording information are set. The head for writing information to or reading information from this track is one for each disk surface, and is positioned on one of the plurality of tracks each time reading or writing, and in principle, the head is positioned on one of the plurality of tracks. is positioned so that it is in the center of the As technology advances, efforts are being made to reduce the diameter of disks and increase their storage density in order to make disk storage devices more compact and capable of storing a larger amount of information. Conventionally, when the storage density is relatively low, open-loop control has been adopted for the above-mentioned head positioning. In this control method, only a predetermined number of pulse commands are issued to the actuator, such as a pulse motor, that drives the head so that the head comes to the specified track number position, and the current position of the head is not detected at all. Therefore, fine adjustment of the head position is not performed.
However, such an oven loop control system has a limit of up to 5007 PI (tracks/inch), taking a fixed disk with a diameter of 5.25 inches as an example. As the track density becomes higher and exceeds 700 TPI, it becomes necessary to employ closed-loop control for head positioning. To perform such control, it is of course necessary to accurately detect the position of the head, and various inventions and devices have been made for this purpose. Information, so-called servo information, is written in advance, this reference information is read by the head itself whose position is to be detected, and the read signal is processed to know the head position. The present case also relates to a head position control circuit for a disk storage device based on this principle. However, many of the prior art techniques, such as Japanese Patent Application Laid-Open No. 50-9970,
In the technology described in No. 9 and others, the pattern of reference information that is written in advance on the disk is devised, and when detecting the position of the head, it is necessary to accurately process the read signal indicating this special pattern in an analog manner. Therefore, a complex and sophisticated circuit must be used for the signal processing circuit, and since the pattern of reference information has a certain meaning, the writing to the disk must be quite accurate. An example of the prior art will be briefly explained with reference to FIGS. 4 to 6. FIG. 4 is a side view of the main parts of the fixed disk device, in which two disks 1 are fixed to the spindle shaft 1a,
It is driven at high speed by a spindle motor 1b. On each side of disk l there is track 2, as seen in FIG.
A large number of concentric annular areas are set for the reference information 3, and in the illustrated example, a sector-shaped area is set in a part of the circumferential direction of the annular area for the reference information 3. As seen in FIG. 4, each side of the disk 1 is provided with a transducer head 4 for reading and writing information, and each of these heads 4 is moved by a carriage 5 via a hand arm 4a. It is supported by This carriage 5 is guided to a fixed part by guides 5a, 5a, and the actuator 6 moves the carriage 5 and, therefore, the head 4 carried thereon via a thin metal band 5b, as indicated by the arrow P in the figure. Drive or position control to move forward and backward in the direction. The reference information 3 in the prior art described above has a pattern as shown in FIG. 0-car reference information 3a where is used,
3b is magnetically recorded by repeating S and N from the left to the right in the figure, and when the disk 1 moves in the direction of the arrow Q in the figure, at the center m between the starting end l and the ending end n, both reference information is recorded. 3a and 3b also move from N to S at the same time, but on both sides, the points at which the reference information moves from S to N are shifted from each other. First, when the head 4 is at the normal position PO with respect to the track 2b, the readout signal of the reference information 3 from the head 4 includes readout signals of both the reference information 3a and the reference information 3b. In this case, when the center m passes under the head 4, both reference information 3a and 3b move from N to S at the same time, so both reference information 3a, 3
The read signals b have the same direction, for example, negative polarity, and are added to each other. However, when both sides thereof pass under the head 4, both reference information 3a. Since 3b moves from S to N, its read signal has a positive polarity opposite to the previous one, and since the places where it moves from S to N are shifted from each other, the read signal of both reference information 3a and 3b has the positive polarity. occur at different times from each other. Therefore, from the readout signal from the reference information 3 from the head 4, the center m
Based on the negative polarity signal at , both reference information 3
It is possible to temporally distinguish and separate the positive polarity read signals from a + 3 b, and to detect the peak values of both the separated signals in an analog manner. Now, as you can easily understand, 1. When the head 4 is at the normal position PO, the separated read signals of both reference information 3a and 3b have equal peak values. However, if the head 4 deviates even slightly from this normal position Po, this balance will be disrupted. For example, if the head 4 is at a position PI that is deviated above the normal position PO by half the inter-track pitch, the reference information 3 The readout signal for the reference information 3 includes only the part from the reference information 3a, and conversely, when the head 4 is located at the position P2 shifted by the same amount downward in the figure, the readout signal for the reference information 3 includes only the part from the reference information 3b. It turns out. In this way, the two pieces of reference information 3a and 3b contained in the readout signal of the reference information 3 are separated from each other, and the deviation from the normal position PO of the head 4, i.e., is determined from the magnitude relationship of their peak values. It is possible to detect the amount of off-track and further correct it so that the amount of deviation is zero, but since the peak value of the signal must be accurately evaluated using an analog method, the circuit tends to be complicated and expensive. In addition, a circuit for mutually separating both reference information 3a and 3b is also required. Therefore, the inventor of the present invention previously proposed a head position detection method that has fewer such problems. Next, an overview of this method and its problems will be explained with reference to FIGS. 7 and 8. FIG. 7 shows reference information 3 of a different pattern from the previous one in FIG. 6, and parts that functionally correspond to those in FIG. 6 are given the same reference numerals. As in the case of FIG. 6, two pieces of reference information 3a are provided for the track 2b shown in the center. 3b is written, but unlike before, each reference information 3a. 3b consists of a simple repeating pattern as shown by the striped pattern in the figure, and is written in a manner shifted from each other in the longitudinal direction Q of the track. Therefore, the readout signal of both reference information 3a, 31) from the head 4 becomes a simple repetitive signal of positive and negative pulse-like signals as shown enlarged in the horizontal direction on the right side of FIG. Both reference information 3a, 3
The readout signal R5 of signal R5 occurs in periods separated in time from each other as shown by periods Ta and Tb at ta+ in the figure. However, Fig. 8 ial corresponds to the case where the head 4 is at the normal position PO with respect to the track 2b, and therefore the height of the repetitive pulse in the read signal of both reference information 3a and 3b is different from the rain period Ta and Tb. shall have the same value. The reference signal RP shown in FIG. The threshold signal TS shown in FIG.
It is a triangular wave-shaped signal generated in synchronization with P, whose instantaneous value provides a threshold value that changes over time, and the peak value of each pulse signal in the readout signal R5 mentioned above corresponds to this threshold value. be compared. As a result of this comparison, only a pulse signal having a peak value exceeding the threshold value in the read signal R5 is extracted as a count pulse CP, as shown in Tdl in the same figure. As can be easily seen, when the head 4 is at the normal position PO, the numbers na and nb of the count pulses CP corresponding to both the reference information 3a and 3b mentioned above are equal to each other. However, when the head 4 is located at a position PL that deviates upward from the normal position PO in FIG. 7, the peak value of the pulse in the read signal R3a from the reference information 3a is Both reference information 3a and 3b are larger than the peak value of the pulse in the readout signal R5bO corresponding to the reference information 3b and are compared with the threshold signal TS.
The numbers na and nb of the count pulses CPa and CPb, respectively, are different from each other, and when the head 4 is at the upwardly shifted position P1, na > nb. Similarly,
When the head 4 is at position P2, which is displaced downward, na
<nb. In this way, both reference information 3a, 3b
The numbers na and n of count pulses CPa and CPb corresponding to
The amount and direction of deviation of the head 4 from the normal position PO can be detected from the difference na−nb of b. In this newly proposed head position detection method, the peak value of the pulse signal in the readout signal RS is handled in an analog manner, but the count pulse CP after being compared with the threshold signal TS is handled in a digital circuit. The circuit configuration is simpler and the operation is more reliable than in the case of the method shown in FIG. 6 before signal processing. Further, since the count pulses CPa and CPb corresponding to both reference signals 3a and 3b occur clearly separated in time from each other, a signal separation circuit is not required. Furthermore, both signal information Ig3a. Since 3b can also be a simple repeating pattern, it has the advantage of being easy to write and having few errors. As described above, the newly proposed method has excellent advantages over the conventional technology in principle, but when it is put into practical use, there are unexpected problems, which are based on the threshold signal TS. It was found that this is caused by the fact that the signal is generated in synchronization with the signal +IP. As mentioned above, since the reference signal 3 is written in synchronization with the reference signal R5, the threshold signal TS
In principle, it should be possible to synchronize the reference signal RP with the reference signal RP, but in reality, the reference signal RP itself may become out of synchronization with the starting edge l of the reference signal 3. That is, while the reference information 3 is written on the disk 1, the reference signal R3 such as the well-known index pulse is usually generated from the spindle motor 1b that rotates the disk 1, so it is not affected by changes in ambient temperature or aging. Therefore, the reference signal RPI may be actually generated at a timing different from the timing of the reference signal R3 when the reference information 3 is written, as shown in FIG. Although the temporal variation tν in the timing of the generation of this reference signal RPI is small,
This affects the count pulses CPa and CPb mentioned above, causing their number na+nb to vary, thereby reducing the accuracy of detecting the head position. Figure 8 (phantom) shows the threshold signal TS that is generated in synchronization with the reference signal RPI when it occurs with a delay of time tv from the normal timing; The count pulses CPa, C of this comparison result indicate a comparison between the reference information readout signals RSa, R3b at the position PO and this delayed threshold signal TS.
Pb is shown in the same figure (1), and their number na,
Originally, nb should be equal to each other, but in reality, na > nb. Of course, all of these problems are caused by the fact that the reference signal RP is generated from a place other than disk 1, so it is recommended to write other reference information for generating the reference signal RP on disk l. This problem can be solved by doing so, but the recording area on disk 1 will be consumed, and the reference information for the reference signal will not be written to reference information 3 or track 2 written on the same disk 1. It is necessary to distinguish this from other data information, etc., which goes against the simplification of the circuit configuration.

[Purpose of the invention]

An object of the present invention is to provide a head position control circuit for a disk storage device in which head position detection accuracy is not affected even if the timing of generation of a reference signal deviates from the timing when reference information is written. It's about getting.

[Key points of the invention]

According to the present invention, the above object is achieved by recording a plurality of information recording tracks on the storage medium disk mentioned at the beginning and a plurality of reference information for detecting the position of a transducer head that reads and writes information on the tracks. A pair of reference areas are set, and a group of repetitive patterns that are mutually shifted between adjacent areas is recorded as the reference information, and a pair of reference information is sequentially read out from the pair of adjacent areas via the head. A head position control circuit of a disk storage device that detects and controls the head position based on an information signal includes a threshold signal generation circuit that generates a ramp-shaped threshold signal that changes over time, and a disk drive head position control circuit that detects and controls the head position based on an information signal. a synchronization circuit that issues a synchronization signal for starting the operation of the threshold signal generation circuit based on a reference signal that is issued in synchronization with the rotation; and a synchronization circuit that compares each of the pair of reference information signals with the threshold signal. a comparator circuit for emitting a count pulse for counting the number of repetitive pattern signals in the reference signal that cross the cough threshold; A positional deviation detection circuit detects the amount of deviation from the normal position of the head relative to the track based on the difference, and the synchronization circuit generates a synchronization signal at a timing later than the starting edge timing of the reference information signal. This is achieved by making the threshold generation circuit that receives the reference information signal generate a threshold signal having a time width shorter than the time from the start to the end of the reference information signal.

[Embodiments of the invention]

Hereinafter, in describing embodiments of the circuit of the present invention with reference to the drawings, first the outline of the configuration and its operation will be described with reference to FIGS. 1 and 2. FIG. 1 is a basic configuration diagram of the circuit of the present invention, and in FIG. 1 is shown in an expanded form, and in this example, reference information 3 is written in an area cut into a part of the circumferential direction of track 2, but as is well known, track 2 is There is no problem in writing repeatedly over the entire circumference of a surface different from the set surface of the disk l.Reference information 3 is similar to that shown in FIG. The areas are shifted from each other in the longitudinal direction of the track, and a repetitive pattern is written and recorded in one area by changing the pattern about 100 times. This reference information 3 is a reference signal 1, such as a so-called index pulse, which is generated in synchronization with the rotation of the spindle motor 1b by means such as a Hall element IC that is built into the spindle motor 1b and detects the position of the rotor. It is written by the head 4 with its starting end l synchronized with P. The head 4 for reading the reference information 3 written in this manner is driven forward and backward in the radial direction of the disk by an actuator 6 as shown by an arrow P. The actuator 6 is, for example, a two-phase or more multi-phase pulse motor, as is known in the art.
In the figure, it is simply shown by a rotor 6a and two-phase stator coils 6b and 6c, and an attached drive circuit 6d.
When it receives the so-called seek signal SK, it operates as a pulse motor to drive the head 4 to the approximate position of the track 2 designated by the seek signal SK, and when it receives the control signal C3, it operates as a kind of torque motor. The position of the head 4 can be finely adjusted to a position determined by the ratio of the current values supplied to the two stator coils 6b and 6c. The control circuit 8 that supplies the seek signal SK or control signal CS to the drive circuit 6d of the actuator 6 is, for example, a microcomputer. To determine the amount and direction of fine adjustment of the position of the upper head 4,
The reference information 3 is read out via the output 4, and the readout signal is amplified by the amplifier 7 to produce the reference information i4! which includes a large number of pulse signals as described above. It becomes R5. In FIG. 2 (al), the reference signal R5 when the head 4 is at the normal position PO is shown differentiated into two pieces of reference information R3a and RSb corresponding to the two pieces of reference information 3a and 3b, respectively. Threshold signal generation circuit 10 shown as a block in FIG.
As shown in the frame, for example, a medium-high triangular wave ramp (slope) threshold signal TS at the center m of the reference information 3 is output from the synchronization circuit 20 shown on the left side. It is generated in synchronization with the synchronization signal SS. The synchronization circuit 20 receives the reference signal RP and generates the synchronization signal SS, but does not immediately generate the synchronization signal SS based on the reference signal RP shown in FIG. 2Cb). In the same figure (as shown in C1, the synchronizing signal SS rises with a delay of a short time td from the reference signal RP.
emits. Therefore, the threshold signal generation circuit 10
Reference signal as shown in figure tel! After this small delay time td, the IP generates a threshold signal TS, and the comparison circuit 30 shown on the right side compares the pulse signal in the reference signal R5 with this threshold signal TS. A count pulse CP is generated when the former peak value exceeds the latter value. In FIG. 2 (fl), the count pulse CP resulting from this comparison is shown divided into two parts CPa and CPb corresponding to the reference information 3a and 3b, respectively. As can be seen from FIG. 2, the time width τt of the threshold signal TS emitted by lO is selected to be shorter than the time Tr from the start point l to the end point n of the reference signal R5.More precisely, in FIG. As can be seen, the threshold signal TS is delayed by a delay time t from the reference signal RP.
The time width of the threshold signal TS is set to be sufficiently short so that even if it is generated with a delay of d, its terminal end will not be delayed beyond the terminal end n of the reference signal R3. If this is done, the count pulse CPa shown in FIG.
, the respective numbers na and nb of CPb are shown in Figure 2 (a
The head 4 is at the normal position PO as shown in 1, and the reference signal RP is at the starting end of the reference signal 3 as shown in BL.
When they occur at the same time, the number of pulses na+nb of count pulses CPa and CPb shown in FIG. The threshold signal T is shifted by the fluctuation time tv.
As shown in the same figure (N), S is generated with a delay time td further behind this, but in this case as well, the terminal of the threshold signal TS is generated so that it does not lag behind the terminal terminal l of the reference signal R5. , the time width Tt of the threshold signal TS is selected.As can be easily seen from the figure, this condition is such that Tt≦↑r
-t sheet td. As long as this condition is satisfied, the count pulse C shown at +11 in the same figure
The number of pulses na+nb of each of Pa and CPb is equal to each other.Furthermore, in FIG. 2(k), the position of the head 4 is shifted from its normal position IPO to position P2 in FIG. 7, and the reference signal RP is Fluctuation time t from the starting point l of signal 3
As can be seen from Figure 0, which shows the waveforms of the reference signals R5a and R5b and the threshold signal TS when they are generated earlier by an amount v, the threshold signal TS is also delayed by the delay time td than the reference signal RP in this case. However, if td≧tv is selected, the starting edge of the threshold signal TS will never be earlier than the starting edge l of the reference signal R5, and therefore the count pulse shown in FIG. 2 (1) CPa, CP
The number of pulses of b is not affected by the fluctuation time tv of the occurrence of the reference signal RP.0As can be seen from the above explanation, the timing of the occurrence of the reference signal RP is before and after the start l of the reference signal R5 by the time tv. Even if it fluctuates, the threshold signal T
S is delayed from the reference signal RP by a time td that satisfies the relationship td≧tv, and the time width Tt of the threshold signal TS
If is selected so as to satisfy the relationship Tt≦Tr −tv −td, the number of pulses na of count pulses CPa and CPb. nb is unaffected and therefore their difference na-
nb, that is, the deviation of the head 4 from the starting position Po can be detected accurately. Returning to FIG. 1, the positional deviation detection circuit 40 detects the difference na-nb between the pulse numbers na and nb of the count pulses CPa and CPb. The circuit 40 generates both count pulses CPa, CPb separated from each other over time.
It is sufficient that the circuit can detect the difference na - nb between the number of pulses, but the simplest circuit can be constructed of one up/down counter circuit as shown in the figure. In this case, the positional deviation detection circuit 40 receives a count pulse CP at its count input terminal C, and its counting mode is switched by signals applied to two mode specifying inputs U and D. In this example, the synchronization signal SS from the synchronization circuit 20 described above is used for the count-up mode designation manual U, and the position shift detection circuit 40 starts counting at the same time as the rise of the signal SS, that is, the generation of the threshold signal TS. Set to amplifier mode. The signal given to the other countdown mode designator is a complementary signal SSI of the synchronization signal SS as shown in FIG. By switching the count mode of the positional deviation detection circuit 40 to the count pulses CPa and CPb in this way, the difference na-nb in the number of pulses described above is obtained at the end of the threshold signal TS. Since the stored count value is stored in the circuit 40, at this point, the stored count value can be read into the circuit B via the manual port 8a of the control circuit 8, for example, in bit parallel as shown. difference in numbers na
When the value of -nb becomes negative, a carry signal output from the last stage of the counter may be stored and the carry signal may be read at the same time as the above-mentioned count value is read. The control circuit 8 calculates the value of the control signal CS for the drive circuit 6d of the actuator 6 based on the positional deviation signal read in this way, and outputs the signal C8 via the output capacitor 8b. Next, a specific embodiment of the circuit of the present invention will be described with reference to FIG. The same circuit 7 that receives the read signal of the reference signal 3 from the head 4 includes a high-precision operational amplifier 71 with differential input and differential output, and an auxiliary circuit on its output side, and capacitors that receive the two differential outputs thereof. 72a and 72b cut off the DC component in the output signal and provide only the AC component to the right resistance circuit. The pair of resistors 73a and 73b are respectively differential output load resistors, and the reference signal R5 is actually taken from the interconnection point of both resistors 73a and 73b, but the differential amplification action of the operational amplifier 71 is symmetrical. A pair of resistors 7 to maintain the
4a and 74b are added. The center of the threshold signal generation circuit 1o is an operational amplifier 11 that performs an integral operation, and a known feedback capacitor 12 is connected between its input and output. The signal integrated by this amplifier 11 is the potential of a connection point V shown on the left side of the amplifier 11, and a synchronization signal SS from a synchronization circuit 20 is applied to this connection point V via a resistor 15. Therefore, the potential at the connection point V is rlJ from the starting edge 11 of the rising edge of the synchronizing signal SS to the center m1, and from the center ml to the terminal nl
On the other hand, the integration speed, that is, the slope of the threshold signal TS, is set by the time constant determined by the aforementioned capacitor 12 and the resistance values of the resistor 13 and adjustment resistor 14 connected in series with it. In response to the potential change at the connection point V as described above, this integration circuit first integrates the "1" value of the potential in the positive direction at such an integration speed, and then integrates it in the negative direction at the same integration speed. Therefore, the threshold signal TS, which is the output of the operational amplifier 11, has a symmetrical triangular waveform with a middle and high pitch. Note that the operating reference potential of the input on the upper side of the diagram of the operational amplifier 11 on the time constant circuit side is set by a pair of resistors 1
6a and 16b, and the operating potential of the lower input is set by another pair of resistors 17a. 17b and is applied to the lower input via a resistor 18. Furthermore, the two diodes Ila and Ilb and the resistor 11c attached to the operational amplifier 11 are a kind of limiter circuit for ensuring the above-described operation of the amplifier. The synchronization circuit 20 may be a counter 21 that is started by receiving a reference signal RP as shown, the counter 21 having its counter value reset by the reference signal RP and subsequently receiving clock pulses from a clock circuit 22. It receives the count input C and performs a count amplification. The flip-flop 23 is first reset by the reference signal RP, and is set when the counter 21 is counted up for a short time td and the count output is output from the counting stage B1. After a delay time td, a synchronizing signal ss is generated from the Q output. In this set state of the flip-flop 23, the count amplifier of the counter 21 advances and the subsequent count stage B
This continues until the count output is output from 2 and reset, and thereafter the reset state is maintained for the same amount of time as before. The aforementioned complementary synchronization signal s31 is obtained from the five outputs of the flip-flop 23. Of course, the synchronization circuit 2o is not limited to this simple example, and a more accurate synchronization circuit 2o can be easily constructed by combining known techniques. The main body of the comparator circuit 30 is a comparator operational amplifier 31, but in this example, a low-pass filter circuit is added to remove unnecessary high-frequency components that may be included in the reference signal R5. This filter circuit consists of the axle 32 and the capacitor 3 on the ground side.
This is an LC filter consisting of a capacitor 34 on the Bts side and a reference signal R of the comparison operational amplifier 31.
1 for setting the operating reference potential of the input on the receiving side
A pair of resistors 35a and 35b are combined, and this DC reference potential is applied to the input via a resistor 36. The comparison operational amplifier 31 compares the reference signal R5 applied to the upper input in this figure with the threshold signal TS applied to the lower input, generates a count pulse CP, and is configured as the amplifier down counter 41 described above. Positional deviation detection circuit 40
give to The head position control circuit for a disk storage device according to the present invention described above can be implemented in various ways other than the specific configuration mentioned in the embodiment. In particular, the synchronization circuit 20.
The circuit configurations of the comparison circuit 30 and the positional deviation detection circuit 40 can be freely selected according to the purpose by combining known techniques within the scope of the present invention. As for the threshold signal generation circuit 10, not only the circuit configuration but also the waveform of the generated threshold signal can be selected from waveforms such as a repetitive sawtooth wave in addition to those described in the embodiment. The triangular wave having a peak value at the center described in 1. has the following unique effect. That is,
Referring to FIG. 2 (hl or (k) above, the threshold signal TS is generated with a time difference of Td±Tv with respect to the starting edge β of the reference signal R5, so its central peak position is A slight deviation occurs with respect to the center m of the signal R5.For this reason, if the center peak value of the threshold signal TS is lower than the highest peak value of the reference signal R5, the count pulse C
This may cause an error in counting the number of pulses of P, but conversely, the center peak value of the threshold signal TS is used as the reference signal R5.
By selecting a value slightly higher than the highest peak value of , it is possible to prevent errors in counting the number of pulses of the count pulse CP under all conditions. That is, since a medium-high triangular wave naturally has a peak value at its center, it is advantageous in eliminating the above-mentioned counting error. The peak value of the triangular wave is naturally selected to be higher than the highest peak value of the reference signal R5, and more precisely, the maximum fluctuation width of the generation timing of the reference signal RP is set as tvv, and the delay time td of the threshold signal is selected. is the same as this, the highest peak value is 1+2・Td/
It is desirable to make it around Tt times or a little higher.

【Effect of the invention】

As can be seen from the above description, according to the present invention, a plurality of information recording tracks and reference information for detecting the position of the transducer head for reading and writing information on the tracks are recorded on the storage medium disk. A plurality of wi areas are set, and a group of repetitive patterns shifted from each other between adjacent areas is recorded as the reference information.
In a head position control circuit of a disk storage device that detects and controls the position of a head based on a pair of reference information signals sequentially read from a pair of areas via a head, the timing for reading reference information is determined. To always accurately detect the current position of the head and correctly correct the deviation from the normal position of the head, no matter how much the reference signal to be determined deviates from the timing when the reference information was originally written. According to the present invention,
The head position control circuit of the above-mentioned type of disk storage device can now fully exhibit its advantages over the conventional technology, and has simplified the circuit configuration for detecting the head position and ensured its operation. In contrast to the proposal of the earlier application of the present invention, in order to implement the present invention, it is only necessary to slightly delay the synchronization signal from the synchronization circuit, so there is no need to add any substantial circuit configuration. , it is possible to completely solve the problems that arose when implementing the new proposed method. Note that when implementing the present invention, it is necessary to make the time width of the reference signal longer than the generation time width of the threshold signal, and therefore it is theoretically necessary to have a wide writing area for the reference information. Since the range of variation in the generation timing of the reference signal is usually a small amount, less than 1720 times the total time width of the reference signal, it is not actually necessary to expand the area for reference information for the embodiment of the present invention.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing the basic configuration of a head position control circuit for a disk storage device according to the present invention together with related parts, and FIG. 2 shows waveforms of main signals in the circuit to explain the circuit operation. 3 is a circuit diagram of a specific embodiment of the present invention, FIG. 4 is a side view of a main part of an example of a disk storage device to which the present invention is implemented, and FIG. 5 is a plan view of the main part. FIG. 6 is a diagram illustrating the write area layout showing an example of the writing state of reference information in the prior art, and FIG. 8 is a waveform diagram showing the waveforms of main signals in the circuit for explaining the circuit operation in the conventional technology using the reference information. In FIG. 0, l: disk, 2nd rank, 3. 3a, 3b: Reference information or servo information, 4: Head, 6: Head actuator, 6d: Actuator drive circuit, 7: Reference signal amplification circuit, 8: Control circuit or microcomputer, 10 Rainbow threshold signal generation circuit , 20: synchronization circuit, 30: comparison circuit, 40: positional deviation detection circuit, 41 near-sub-down counter, CP. CPa, CPb: Count pulse, C1 control signal, l
: Start of reference information, m: Center of reference information, n: End of reference information, PO: Normal position of head, PI, P2: Head position deviated from normal position, RP: Reference signal or index pulse, R5, R5a , R5b: Reference signal, S
S: synchronization signal, S31: complementary signal of synchronization signal, TS rainbow threshold signal, td: delay time of L threshold signal, tv: fluctuation time of reference signal. 2 Tora Tsuku Figure 1 Figure 5 Figure 6 District 7

Claims (1)

[Claims] 1) A plurality of information recording tracks and a plurality of areas in which reference information for detecting the position of the transducer head that reads and writes information on the tracks are set on the storage medium disk, and mutual information is recorded as the reference information. A group of repetitive patterns shifted from each other is recorded between adjacent areas, and the position of the head is detected based on a pair of reference information signals sequentially read out from the pair of adjacent areas via the head. A threshold signal generation circuit that generates a ramp-shaped threshold signal that changes over time, and a threshold signal generation circuit that generates the threshold signal based on a reference signal that is generated in synchronization with the rotation of the disk. a synchronization circuit that issues a synchronization signal to start the circuit; and a synchronization circuit that compares each of the pair of reference information signals with the threshold signal and counts the number of repetitive pattern signals in the reference signal that cross the threshold. a comparator circuit that emits a count pulse for the purpose of determining the position of the head; and a position shift circuit that counts the count pulse for each of a pair of reference information signals and detects the amount of deviation from the normal position of the head relative to the track from the difference between the two counts. a detection circuit, the synchronization circuit emits a synchronization signal at a timing delayed from the starting edge timing of the reference information signal, and the threshold generation circuit receiving the synchronization signal detects the timing from the starting edge to the ending edge of the reference information signal. 1. A head position control circuit for a disk storage device, characterized in that a threshold signal having a time width shorter than time is emitted.