JPS6257950B2 - - Google Patents

Info

Publication number
JPS6257950B2
JPS6257950B2 JP47022602A JP2260272A JPS6257950B2 JP S6257950 B2 JPS6257950 B2 JP S6257950B2 JP 47022602 A JP47022602 A JP 47022602A JP 2260272 A JP2260272 A JP 2260272A JP S6257950 B2 JPS6257950 B2 JP S6257950B2
Authority
JP
Japan
Prior art keywords
input signal
time constant
circuit
output
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP47022602A
Other languages
Japanese (ja)
Other versions
JPS4890769A (en
Inventor
Haruo Hiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP47022602A priority Critical patent/JPS6257950B2/ja
Publication of JPS4890769A publication Critical patent/JPS4890769A/ja
Publication of JPS6257950B2 publication Critical patent/JPS6257950B2/ja
Expired legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Description

【発明の詳細な説明】 本発明は信号中にこの信号の定常的な最大ある
いは最小レベルを越える様な特殊な成分が混入さ
れる場合にこの成分の有無を検出する様にした振
巾検出回路に関するもので、特に簡単な構成によ
つて確実かつ安定な検出を行うことができる様に
したものである。
Detailed Description of the Invention The present invention provides an amplitude detection circuit that detects the presence or absence of a special component that exceeds the steady maximum or minimum level of the signal when it is mixed into the signal. The present invention is designed to enable reliable and stable detection with a particularly simple configuration.

以下本発明による振巾検出回路の一例を図につ
いて説明しよう。
An example of the amplitude detection circuit according to the present invention will be explained below with reference to the drawings.

図の例は定常時の光量を越える様な光が検出さ
れるときにその検出出力に基いて何らかの制御を
行なわんとする場合に本発明を適用した場合で、
直流電源1を抵抗2,3及びフオトトランジスタ
4の直列回路を介して接地し、フオトトランジス
タ4にて光を検出する。即ちフオトトランジスタ
4に光が入射するとこれはオンとなり、そのコレ
クタに光量に応じた入力信号が得られる。
The example shown in the figure is a case where the present invention is applied when some kind of control is to be performed based on the detection output when light exceeding the normal light amount is detected.
A DC power source 1 is grounded through a series circuit of resistors 2 and 3 and a phototransistor 4, and the phototransistor 4 detects light. That is, when light enters the phototransistor 4, it is turned on, and an input signal corresponding to the amount of light is obtained at its collector.

この入力信号を結合コンデンサ5を通じてPNP
形トランジスタ6のエミツタに供給する。このト
ランジスタ6には所定のベースバイアス電圧を与
えておき常にこれがオンになつている様にする。
従つて入力信号はそのままの極性でトランジスタ
6のコレクタ側に得られる。そしてこのコレクタ
側に得られる入力信号をNPN形のトランジスタ
7のベースに供給し、そのコレクタ側に第2図に
おいて実線で示す様にもとの入力信号に対して極
性が反転した信号S1を得る。ここでこの信号S1
の部分Saは定常時の光量を越える様な光がフオ
トトランジスタ4にて検出されたことを示してい
る。そしてこの極性反転された入力信号S1を検波
回路8を構成するPNP形のトランジスタ9のベー
スに供給する。この場合検波回路8の第1の時定
数回路を構成する抵抗10及びコンデンサ11で
決まる時定数を比較的小さく選定する。従つてト
ランジスタ9のエミツタには第2図において破線
で示す様な検波出力S2が得られ、入力信号S1の最
小レベルが検出される。そしてこの検波出力S2
単方向導通素子例えばダイオード12を通じで抵
抗13及びコンデンサ14よりなる第2の時定数
回路15に供給する。ここでこの時定数回路15
の時定数は検波回路8の時定数よりも充分大きく
選定する。従つて時定数回路15の出力側には第
2図において鎖線で示す様に入力信号S1の定常時
の最小レベルの平均値に等しい出力電圧E0が得
られる。即ちこの場合入力信号S1中に従つて検波
出力S2中に定常時の最小レベルを越える成分Sa
があつてもダイオード12によつて時定数回路1
5に蓄えられた電荷の検波回路8側への放電が阻
止されるので、この成分Saは回路15の出力側
には現われず、この部分でも回路15の出力電圧
はE0なる電圧に保持される。
This input signal is connected to the PNP through the coupling capacitor 5.
It is supplied to the emitter of the type transistor 6. A predetermined base bias voltage is applied to this transistor 6 so that it is always turned on.
Therefore, the input signal is obtained at the collector side of the transistor 6 with the same polarity. Then, the input signal obtained at the collector side is supplied to the base of the NPN type transistor 7, and a signal S 1 whose polarity is inverted with respect to the original input signal is supplied to the collector side as shown by the solid line in Fig. 2. obtain. Here, the portion Sa in the signal S1 indicates that the phototransistor 4 has detected a light amount exceeding the normal light amount. This polarity-inverted input signal S 1 is then supplied to the base of a PNP type transistor 9 forming a detection circuit 8 . In this case, the time constant determined by the resistor 10 and capacitor 11 constituting the first time constant circuit of the detection circuit 8 is selected to be relatively small. Therefore, a detection output S2 as shown by the broken line in FIG. 2 is obtained at the emitter of the transistor 9, and the minimum level of the input signal S1 is detected. The detected output S 2 is then supplied to a second time constant circuit 15 made up of a resistor 13 and a capacitor 14 through a unidirectional conduction element such as a diode 12 . Here, this time constant circuit 15
The time constant is selected to be sufficiently larger than the time constant of the detection circuit 8. Therefore, on the output side of the time constant circuit 15, as shown by the chain line in FIG. 2, an output voltage E 0 is obtained which is equal to the average value of the minimum level of the input signal S 1 during steady state. That is, in this case, there is a component Sa in the input signal S 1 and therefore in the detection output S 2 that exceeds the minimum level in the steady state.
Even if the time constant circuit 1 is
5 is prevented from discharging to the detection circuit 8 side, this component Sa does not appear on the output side of the circuit 15, and the output voltage of the circuit 15 is maintained at the voltage E0 even in this part. Ru.

そしてこの出力電圧E0を基準電圧としてNPN
形のトランジスタ16のベースに供給する。この
トランジスタ16のエミツタはPNP形のトランジ
スタ17のエミツタに直結して比較回路18を構
成する。そしてトランジスタ7のコレクタより得
られる入力信号S1をトランジスタ17のベースに
供給する。従つてトランジスタ16及び17のベ
ース・エミツタ間の順方向降下電圧を夫々VBE
すれば入力信号S1がE0−2VBE以下の電圧になる
ときトランジスタ17はオンとなる。従つて上述
の様に入力信号S1中に定常時の最小レベルを越え
る成分Saがあればこの時点でトランジスタ17
がオンとなつてそのコレクタ側より導出した出力
端19には検出電圧e0が得られる。
Then, using this output voltage E 0 as the reference voltage, NPN
to the base of a transistor 16. The emitter of this transistor 16 is directly connected to the emitter of a PNP type transistor 17 to form a comparison circuit 18. The input signal S 1 obtained from the collector of transistor 7 is then supplied to the base of transistor 17 . Therefore, if the forward voltage drop between the base and emitter of transistors 16 and 17 is VBE , transistor 17 is turned on when input signal S1 becomes a voltage equal to or lower than E0-2VBE . Therefore, as mentioned above, if there is a component Sa in the input signal S1 that exceeds the minimum level in the steady state, the transistor 17
is turned on, and a detection voltage e 0 is obtained at the output terminal 19 derived from its collector side.

よつて図の例の場合光源のリツプル等によつて
フオトトランジスタ4にて検出される光量が常時
変化する場合においても定常時の光量を越える様
な光が検出されたときこれが確実に検出される様
になる。
Therefore, in the case of the example shown in the figure, even if the amount of light detected by the phototransistor 4 changes constantly due to ripples in the light source, it is possible to reliably detect light that exceeds the amount of light during normal operation. It will be like that.

なお図の例では抵抗2及び3の接続点に得られ
る電圧をPNP形のトランジスタ20のベースに供
給すると共にこのトランジスタ20のエミツタ・
コレクタと直列に発光ダイオード21を接続して
フオトトランジスタ4にて定常時の光量を越える
様な光が検出されたときにトランジスタ20がオ
ンとなつて発光ダイオード21が点灯することに
よりこの状態が表示される様にしている。
In the example shown in the figure, the voltage obtained at the connection point of resistors 2 and 3 is supplied to the base of a PNP type transistor 20, and the emitter of this transistor 20 is supplied to the base of the transistor 20.
A light emitting diode 21 is connected in series with the collector, and when the phototransistor 4 detects light exceeding the normal light intensity, the transistor 20 turns on and the light emitting diode 21 lights up, indicating this state. I'm trying to make it happen.

上述の本発明回路によれば信号中の定常的な最
大あるいは最小レベルを基準としてこの最大ある
いは最小レベルを越える成分の有無を検出するも
のであるから、確実な検出を行うことができる。
しかも例えば電源電圧が変化することによつて入
力信号S1のレベルが変化する様な場合においても
基準電圧E0が入力信号S1のレベルに応じて変化
するので入力信号S1のレベルと基準電圧E0との
相対的な関係は一定になり、電源電圧の変化等に
対しても安定な動作を期待できる。
According to the above-described circuit of the present invention, since the presence or absence of a component exceeding the maximum or minimum level in the signal is detected based on the steady maximum or minimum level in the signal, reliable detection can be performed.
Moreover, even when the level of the input signal S1 changes due to a change in the power supply voltage, for example, the reference voltage E0 changes according to the level of the input signal S1 , so the level of the input signal S1 and the reference The relative relationship with the voltage E 0 is constant, and stable operation can be expected even with changes in the power supply voltage.

なお、入力信号中に含まれる背景成分に影響さ
れることなくこの入力信号を検出する方法とし
て、この発明のように時定数回路を2段に亘り接
続するのではなく、時定数を切換えて行なうよう
にしたものもあるが、この構成では入力信号中に
含まれる背景成分が変われば、その都度時定数を
切換えねばならないので、検出操作が面倒である
にも拘わらず、十分な検出精度が得られないこと
に加え、時定数を切換えてから所定の期間だけが
背景成分に影響されないで入力信号を検出できる
ので、どうしても間欠的な検出にならざるを得な
い。
Note that as a method for detecting this input signal without being affected by background components contained in the input signal, the time constant is switched instead of connecting two time constant circuits as in the present invention. However, with this configuration, the time constant must be changed each time the background component contained in the input signal changes, so although the detection operation is troublesome, sufficient detection accuracy cannot be achieved. In addition, since the input signal can only be detected during a predetermined period after switching the time constant without being affected by background components, intermittent detection is inevitable.

この従来例に対し、この発明ではスイツチの切
換操作なしで入力信号を検出できること、背景成
分のレベル変動に拘わらず入力信号を検出できる
こと及び連続的な検出が可能であること等の点
で、この従来構成よりも遥かに有用性が大きい。
In contrast to this conventional example, the present invention has the advantages of being able to detect an input signal without switching a switch, being able to detect an input signal regardless of level fluctuations in the background component, and being able to perform continuous detection. It is much more useful than the conventional configuration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明回路の一例の接続図、第2図は
その説明のための波形図である。 1は直流電源、4はフオトトランジスタ、8は
検波回路、15は時定数回路、18は比較回路で
ある。
FIG. 1 is a connection diagram of an example of the circuit of the present invention, and FIG. 2 is a waveform diagram for explaining the same. 1 is a DC power supply, 4 is a phototransistor, 8 is a detection circuit, 15 is a time constant circuit, and 18 is a comparison circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 入力信号を検波する検波回路と、該検波回路
の出力が供給される比較的時定数の小さい第1の
時定数回路と、該第1の時定数回路の出力がダイ
オードを介して供給される比較的時定数の大きい
第2の時定数回路と、該第2の時定数回路出力と
上記入力信号との比較を行う比較回路より成り、
上記入力信号中の定常的な最大あるいは最小レベ
ルを越える特殊な成分のみを検出するようにした
振巾検出回路。
1. A detection circuit that detects an input signal, a first time constant circuit with a relatively small time constant to which the output of the detection circuit is supplied, and the output of the first time constant circuit is supplied via a diode. It consists of a second time constant circuit with a relatively large time constant, and a comparison circuit that compares the output of the second time constant circuit with the input signal,
An amplitude detection circuit configured to detect only special components exceeding a steady maximum or minimum level in the input signal.
JP47022602A 1972-03-04 1972-03-04 Expired JPS6257950B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP47022602A JPS6257950B2 (en) 1972-03-04 1972-03-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP47022602A JPS6257950B2 (en) 1972-03-04 1972-03-04

Publications (2)

Publication Number Publication Date
JPS4890769A JPS4890769A (en) 1973-11-27
JPS6257950B2 true JPS6257950B2 (en) 1987-12-03

Family

ID=12087375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP47022602A Expired JPS6257950B2 (en) 1972-03-04 1972-03-04

Country Status (1)

Country Link
JP (1) JPS6257950B2 (en)

Also Published As

Publication number Publication date
JPS4890769A (en) 1973-11-27

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