JPS6257133B2 - - Google Patents

Info

Publication number
JPS6257133B2
JPS6257133B2 JP56068601A JP6860181A JPS6257133B2 JP S6257133 B2 JPS6257133 B2 JP S6257133B2 JP 56068601 A JP56068601 A JP 56068601A JP 6860181 A JP6860181 A JP 6860181A JP S6257133 B2 JPS6257133 B2 JP S6257133B2
Authority
JP
Japan
Prior art keywords
program
output
signal
receiver
storage circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56068601A
Other languages
Japanese (ja)
Other versions
JPS57183134A (en
Inventor
Michio Okamoto
Kyotake Fukui
Shunichi Nezu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6860181A priority Critical patent/JPS57183134A/en
Publication of JPS57183134A publication Critical patent/JPS57183134A/en
Publication of JPS6257133B2 publication Critical patent/JPS6257133B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits

Description

【発明の詳細な説明】 本発明はラジオ、テレビジヨン等の番組で、例
えば毎時間、毎日、毎週くり返して放送される特
定番組を自動的に受信することができる自動受信
装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic receiving device that can automatically receive specific programs such as radio and television programs that are repeatedly broadcast every hour, every day, and every week.

従来、ラジオやテレビジヨン等の特定番組を受
信しようとする場合、その特定番組を受信しよう
とする人が、他の手段たとえば新聞等でその番組
が放送される放送局と時間を予め知つて受信する
のが通例である。最近においては電子的に制御さ
れる電子同調受信機が普及しつつあるので、受信
者が放送局と時間を予め知り、正しい時間を受信
機にセツトしておくことも可能になつている。し
かしながらこれら従来の受信方法は基本的には、
受信者が他の情報媒体によつて予め番組と放送局
および時間を知り、これに基づいていちいち受信
機にセツトするものであるため、非常に煩わしい
ものである。
Conventionally, when a person wants to receive a specific program such as on radio or television, the person who wants to receive the specific program has to know in advance the broadcasting station and time on which the program will be broadcast by other means, such as a newspaper, etc. It is customary to do so. Recently, electronically controlled electronically tuned receivers have become popular, so it has become possible for receivers to know the broadcast station and time in advance and set the correct time on the receiver. However, these conventional reception methods basically:
This is extremely troublesome because the receiver must know the program, broadcasting station, and time in advance through other information media, and then set the program on the receiver each time based on this information.

本発明は、繰り返し放送される番組に対して、
番組開始の一定期間同一音声たとえばテーマミユ
ージツク、導入アナウンスメント、または同一画
像たとえばテーマ画像によつて番組が導入される
ことに着目し、これを基に特定番組を自動的に受
信せしめるようにしたものである。
The present invention provides for programs that are repeatedly broadcast.
Focusing on the fact that a program is introduced by the same sound, such as a theme music, introductory announcement, or the same image, such as a theme image, for a certain period of time after the start of the program, it is possible to automatically receive a specific program based on this. It is something.

以下本発明の一実施例について図面を用いて説
明する。
An embodiment of the present invention will be described below with reference to the drawings.

第1図において、アンテナ9が接続されたラジ
オ等の受信部1から出力されるたとえば音声信号
が、符号化回路3を通つて、スウイツチSW2に
導かれる。スイツチSW2は図示の状態において
はbが通じており、デイジタル記憶回路(たとえ
ばシフトレジスタ)7に一定期間の符号化信号が
記憶され固定される。ここに記憶される信号は将
来において再び受信しようとするたとえば番組の
テーマ音楽等の番組導入信号である。
In FIG. 1, for example, an audio signal output from a receiving section 1 such as a radio to which an antenna 9 is connected is guided to a switch SW2 through an encoding circuit 3. In the illustrated state, the switch SW2 is in communication with b, and the encoded signal for a certain period is stored and fixed in the digital storage circuit (for example, a shift register) 7. The signals stored here are program introduction signals, such as program theme music, which are to be received again in the future.

次に、受信者がSW2をaに接焼すると、受信
機は待機状態となり符号化回路3の出力信号がシ
フトレジスタ4に導かれる。この待機状態におい
て受信機が前記デイジタル記憶回路7に記憶した
のと同じテーマ音楽で始まる番組を受信した場
合、上記シフトレジスタ4の並列出力とデイジタ
ル記憶回路7の並列出力が一致することになる
が、この一致状態を比較回路5によつて検出す
る。その結果両者が一致した場合スイツチSW1
が閉じられて受信部1の出力信号が増幅器2を通
じて出力端子10に達し、番組受信が開始され
る。
Next, when the receiver contacts SW2 to a, the receiver enters a standby state and the output signal of the encoding circuit 3 is guided to the shift register 4. In this standby state, if the receiver receives a program starting with the same theme music as that stored in the digital storage circuit 7, the parallel output of the shift register 4 and the parallel output of the digital storage circuit 7 will match. , this matching state is detected by the comparison circuit 5. If both match as a result, switch SW1
is closed, the output signal of the receiving section 1 reaches the output terminal 10 through the amplifier 2, and program reception is started.

クロツク発生器8は消費電力節減のために用い
られる。第1図において、SW3に接続されてい
る端子B1,B2,B3,B4,B5,B6,B
7はそれぞれ各ブロツクの同一記号の端子と一対
としてすべて接続されている。この場合、受信者
は予め番組の開始時間を知つてそのクロツクに時
間をセツトしておけば、番組開始以前にスウイツ
チSW3が閉じ、本装置に電源が入る。ただし、
図示のようにクロツク発生器8および電源が供給
されなければ消去されるタイプの記憶回路の場合
の記憶回路7には常時電源が供給されることとな
る。
Clock generator 8 is used to save power consumption. In Figure 1, terminals B1, B2, B3, B4, B5, B6, B connected to SW3
7 are all connected as a pair to terminals with the same symbol of each block. In this case, if the recipient knows the start time of the program in advance and sets the time on the clock, the switch SW3 will be closed and the device will be powered on before the program starts. however,
As shown in the figure, power is constantly supplied to the clock generator 8 and the memory circuit 7, which is a type of memory circuit that is erased if power is not supplied.

次に符号化回路3について述べる。一般には入
力のアナログ信号と出力のデイジタル信号が1対
1に対応すれば、どんな変換が行なわれてもスイ
ツチSW2においてa、bの2状態に対して同じ
変換であれば充分である。一定期間PCM(パル
スコードモジユレーシヨン)、デルタ変調等のデ
イジタル変換を行ない、そのデイジタル化データ
を記憶回路7に記憶してもよい。あるいは入力信
号の包絡線をとり出し、これを符号化することも
考えられる。符号化には場合によつては単純に零
レベルまたはその信号の平均値レベルに対して大
きければ“H”ステート、小さければ、“L”ス
テートと云つたものでよい。
Next, the encoding circuit 3 will be described. Generally, if there is a one-to-one correspondence between the input analog signal and the output digital signal, no matter what kind of conversion is performed, it is sufficient that the same conversion is performed for the two states a and b in the switch SW2. Digital conversion such as PCM (pulse code modulation) or delta modulation may be performed for a certain period of time, and the digitized data may be stored in the storage circuit 7. Alternatively, it is also possible to extract the envelope of the input signal and encode it. Depending on the case, the encoding may simply be a zero level or an "H" state if the signal is larger than the average level of the signal, and an "L" state if it is smaller.

また、この基準信号を時間的に変動せしめる方
法も考えられる。以上の説明図を第2図に示す。
Another possible method is to vary this reference signal over time. An explanatory diagram of the above is shown in FIG.

は符号化しようとする信号、は平均値レベ
ル、は零レベル、は時間的に変化する基準信
号として図示している。
is a signal to be encoded, is an average level, is a zero level, and is a reference signal that changes over time.

付記した符号は、上辺図に対応した例で、信号
に対してサンプル点において比較しようとする
基準レベルより大きければ“H”、小さければ
“L”を対応させている。
The appended symbols are examples corresponding to the upper side diagram, and correspond to "H" if the signal is higher than the reference level to be compared at the sample point, and "L" if it is lower.

以上のように本発明は同一のテーマ音楽等によ
つて導入される時間毎、日毎、週毎等の放送番組
に対して予め導入部の一部または全部をパターン
化して記憶しておき、将来、再度受信するときに
はこのパターンが一致した時、受信機が自動的に
作動を開始するようにしたため、容易に自動受信
ができ、その効果は大である。
As described above, the present invention stores part or all of the introductory part in advance as a pattern for hourly, daily, weekly, etc. broadcast programs introduced by the same theme music etc. When receiving data again, the receiver automatically starts operating when this pattern matches, making automatic reception easy and highly effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2
図は同動作説明図である。 1……受信部、2……増幅器、3……符号化回
路、4……シフトレジスタ、5……比較回路、7
……デイジタル記憶回路、8……クロツク発生
器。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is an explanatory diagram of the same operation. DESCRIPTION OF SYMBOLS 1... Receiving section, 2... Amplifier, 3... Encoding circuit, 4... Shift register, 5... Comparison circuit, 7
...Digital storage circuit, 8...Clock generator.

Claims (1)

【特許請求の範囲】[Claims] 1 受信信号を、デイジタル変換する変換器と、
該変換器の出力の一部を記憶する記憶回路と、待
機状態において上記変換器の出力と、上記記憶回
路に記憶された内容とを比較する比較器およびこ
の比較器の出力により受信部を制御する制御部を
備えたことを特徴とする自動受信装置。
1 a converter that converts the received signal into digital;
a storage circuit that stores part of the output of the converter; a comparator that compares the output of the converter with the content stored in the storage circuit in a standby state; and a receiver that is controlled by the output of the comparator. An automatic receiving device characterized by comprising a control unit that performs the following functions.
JP6860181A 1981-05-06 1981-05-06 Automatic receiver Granted JPS57183134A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6860181A JPS57183134A (en) 1981-05-06 1981-05-06 Automatic receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6860181A JPS57183134A (en) 1981-05-06 1981-05-06 Automatic receiver

Publications (2)

Publication Number Publication Date
JPS57183134A JPS57183134A (en) 1982-11-11
JPS6257133B2 true JPS6257133B2 (en) 1987-11-30

Family

ID=13378467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6860181A Granted JPS57183134A (en) 1981-05-06 1981-05-06 Automatic receiver

Country Status (1)

Country Link
JP (1) JPS57183134A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5578633A (en) * 1978-12-07 1980-06-13 Matsushita Electric Ind Co Ltd Channel selection device
JPS55150623A (en) * 1979-05-14 1980-11-22 Sharp Corp Receiving unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5578633A (en) * 1978-12-07 1980-06-13 Matsushita Electric Ind Co Ltd Channel selection device
JPS55150623A (en) * 1979-05-14 1980-11-22 Sharp Corp Receiving unit

Also Published As

Publication number Publication date
JPS57183134A (en) 1982-11-11

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