JPS6257117U - - Google Patents
Info
- Publication number
- JPS6257117U JPS6257117U JP14970085U JP14970085U JPS6257117U JP S6257117 U JPS6257117 U JP S6257117U JP 14970085 U JP14970085 U JP 14970085U JP 14970085 U JP14970085 U JP 14970085U JP S6257117 U JPS6257117 U JP S6257117U
- Authority
- JP
- Japan
- Prior art keywords
- data
- repeatability
- memory
- signal
- conversion circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000011156 evaluation Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Transmission And Conversion Of Sensor Element Output (AREA)
Description
第１図は本考案の一実施例を示すブロツクダイ
ヤグラム、第２図は同他の例を示すブロツクダイ
ヤグラムである。
１は回転台、２はセンサ、３はＡ／Ｄ変換回路
、４はメモリー、７は演算回路、８はクロツク発
生装置、９は被検体、１０は入出力インターフエ
イス。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a block diagram showing another example. 1 is a rotary table, 2 is a sensor, 3 is an A/D conversion circuit, 4 is a memory, 7 is an arithmetic circuit, 8 is a clock generator, 9 is a subject, and 10 is an input/output interface.
Claims (1)
検体を回転させながらその繰返し精度を評価する
装置に於て、信号を変換するＡ／Ｄ変換回路、変
換されたデータを記憶する為のメモリー、メモリ
ーの位置を指定する為のアドレスカウンタ及びク
ロツク発生装置、メモリー上のデータをもとに精
度を計算する演算装置、結果を表示する表示装置
によつて構成されることを特徴とする信号の繰返
し精度評価装置。 ２ データ読込用のクロツク発生装置が被検体の
回転装置と連動する標準のロータリーエンコーダ
を用いてクロツク信号を発生させることを特徴と
する実用新案登録請求の範囲第１項記載の信号の
繰返し精度評価装置。[Claims for Utility Model Registration] 1. An A/D conversion circuit for converting signals, an A/D conversion circuit for converting signals, and converted data in a device for evaluating the repeatability of a rotating object on which mutually opposite signals are repeatedly recorded. consisting of a memory for storing the data, an address counter and clock generator for specifying the memory location, an arithmetic unit for calculating accuracy based on the data in the memory, and a display device for displaying the results. A signal repeatability evaluation device characterized by: 2 Evaluation of signal repeatability as set forth in claim 1 of the utility model registration claim, characterized in that the clock generator for reading data generates a clock signal using a standard rotary encoder interlocked with a rotating device of the subject. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14970085U JPS6257117U (en) | 1985-09-30 | 1985-09-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14970085U JPS6257117U (en) | 1985-09-30 | 1985-09-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6257117U true JPS6257117U (en) | 1987-04-09 |
Family
ID=31065157
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14970085U Pending JPS6257117U (en) | 1985-09-30 | 1985-09-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6257117U (en) |
-
1985
- 1985-09-30 JP JP14970085U patent/JPS6257117U/ja active Pending
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