JPS6256738B2 - - Google Patents
Info
- Publication number
- JPS6256738B2 JPS6256738B2 JP54057764A JP5776479A JPS6256738B2 JP S6256738 B2 JPS6256738 B2 JP S6256738B2 JP 54057764 A JP54057764 A JP 54057764A JP 5776479 A JP5776479 A JP 5776479A JP S6256738 B2 JPS6256738 B2 JP S6256738B2
- Authority
- JP
- Japan
- Prior art keywords
- opening
- closing
- flip
- main switch
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Description
【発明の詳細な説明】
この発明は電子機器などの電源開閉装置に係
り、特にリモートコントロール付きの機器のよう
に主たる開閉器と従となる開閉器とを備えた場合
の操作性の向上に関するものである。[Detailed Description of the Invention] The present invention relates to power switchgear for electronic equipment, etc., and particularly relates to improved operability when equipped with a main switch and a secondary switch, such as equipment with a remote control. It is.
近年、リモートコントロール付きテレビジヨン
受像機のような、主たる開閉器と従となる開閉器
とを電源回路に備えた機器が広く用いられるよう
になり、その操作性の向上が要望されている。 BACKGROUND ART In recent years, devices such as television receivers with remote controls that have a main switch and a secondary switch in their power supply circuits have become widely used, and there is a demand for improved operability.
この発明は以上のような要望に応えるためにな
されたもので、従開閉器回路にフリツプフロツプ
を備えることによつて操作性のよい電源開閉装置
を提供することを目的としている。 The present invention was made in response to the above-mentioned demands, and an object of the present invention is to provide a power switchgear with good operability by providing a flip-flop in a slave switch circuit.
図はこの発明の一実施例を示す回路図で、Ｐは
電源、Ｌは負荷、トランジスタQ1は電源Ｐを負
荷Ｌへ接続する主トランジスタ、S1は主スイツ
チ、S2は押ボタン式の従スイツチ、FFはトグル
形フリツプフロツプ回路で、図の一点鎖線から右
のＡ部が主開閉部、左のＢ部が従開閉部である。
主スイツチS1、トランジスタQ2、ダイオード
Ｄ、並びに抵抗R1およびR2は電源の開閉を制御
する主手段を構成し、フリツプフロツプFF、従
スイツチS2および抵抗R3は電源の開閉を制御す
る従手段を構成する。主スイツチS1はａ側に閉じ
たときは電源オフ（OFF）、ｂ側に閉じたときは
電源オン（ON）となる。従スイツチS2は主スイ
ツチS1が接点ｂ（ON）側に閉じているときのみ
電源の開閉に寄与する。すなわち、主スイツチS1
がON側にあるときは、抵抗R1，R5を通してトラ
ンジスタQ3のベースが付勢され、フリツプフロ
ツプFFの端子Ｓは接地されており、この端子Ｓ
の入力は抵抗R4があるためフリツプフロツプFF
の出力ＱがＬレベルになつても変わるものではな
い。またフリツプフロツプFFの端子Ｒは抵抗R6
を通して接地されている。またフリツプフロツプ
FFの出力Ｑは従スイツチS2を閉じる度に反転す
る。トランジスタQ3、抵抗R3および抵抗R5は主
スイツチS1が接点ａ（OFF）側に閉じたときに
フリツプフロツプFFをセツトする（ＱをＨレベ
ルにする）手段を構成する。コンデンサＣおよび
抵抗R6は電源Ｐが接続されたときにフリツプフ
ロツプFFをリセツトする（ＱをＬレベルにす
る）手段を構成する。そして、主スイツチS1が接
点ｂ（ON）側に閉じているときに、フリツプフ
ロツプFFがセツトされて出力Ｑが高電位になる
と負荷Ｌに電源Ｐから電力が供給され、フリツプ
フロツプFFがリセツトされて出力Ｑが低電位に
あるきは負荷Ｌへの電力はしや断される。 The figure is a circuit diagram showing one embodiment of this invention, where P is a power supply, L is a load, transistor Q1 is a main transistor that connects power supply P to load L, S1 is a main switch, and S2 is a push button type. The slave switch, FF, is a toggle type flip-flop circuit, where part A to the right of the dashed line in the figure is the main opening/closing part, and part B to the left is the secondary opening/closing part.
The main switch S 1 , the transistor Q 2 , the diode D, and the resistors R 1 and R 2 constitute the main means for controlling the opening and closing of the power supply, and the flip-flop FF, the slave switch S 2 and the resistor R 3 control the opening and closing of the power supply. constitutes a slave means. When the main switch S1 is closed to the a side, the power is turned off (OFF), and when it is closed to the b side, the power is turned on (ON). The slave switch S2 contributes to opening and closing the power supply only when the main switch S1 is closed to the contact b (ON) side. i.e. main switch S 1
is on the ON side, the base of the transistor Q3 is energized through the resistors R1 and R5 , and the terminal S of the flip-flop FF is grounded, and this terminal S
The input of is a flip-flop FF because there is a resistor R4 .
This does not change even if the output Q of the circuit goes to L level. Also, the terminal R of the flip-flop FF is a resistor R 6
is grounded through. Also flipflop
The output Q of the FF is inverted every time the slave switch S2 is closed. Transistor Q 3 , resistor R 3 and resistor R 5 constitute means for setting flip-flop FF (setting Q to H level) when main switch S 1 is closed to contact a (OFF) side. Capacitor C and resistor R6 constitute means for resetting flip-flop FF (setting Q to L level) when power supply P is connected. Then, when the main switch S1 is closed to the contact b (ON) side, the flip-flop FF is set and the output Q becomes a high potential, power is supplied to the load L from the power supply P, and the flip-flop FF is reset. When the output Q is at a low potential, power to the load L is immediately cut off.
従つて、次のように動作する。 Therefore, it operates as follows.
〔〕 従開閉部Ｂがないとき
(イ) 主スイツチS1をｂ（ON）側に閉じるとト
ランジスタQ1，Q2がONとなり、負荷Ｌに電
力が供給される。[] When there is no secondary switching section B (a) When the main switch S 1 is closed to the b (ON) side, transistors Q 1 and Q 2 are turned on, and power is supplied to the load L.
(ロ) 主スイツチS1をａ（OFF）側に閉じる
と、トランジスタQ2がOFFとなり、トラン
ジスタQ1もOFFとなり、負荷Ｌへは電力が
供給されない。 (b) When main switch S1 is closed to the a (OFF) side, transistor Q2 is turned off, transistor Q1 is also turned off, and no power is supplied to load L.
〔〕 従開閉部Ｂが接続されたとき
(1) 主スイツチS1がｂ（ON）側に閉じている
と前述のようにフリツプフロツプFFの状態
によつて負荷Ｌへの電力供給が左右され、
(イ) フリツプフロツプFFがセツトされると
電力供給が行われる。[] When the slave switching section B is connected (1) When the main switch S1 is closed to the b (ON) side, as mentioned above, the power supply to the load L is influenced by the state of the flip-flop FF. (a) Power is supplied when the flip-flop FF is set.
(ロ) フリツプフロツプFFがリセツトされる
と電力供給が停止される。 (b) When the flip-flop FF is reset, power supply is stopped.
(ハ) 従スイツチS2を閉路する度にフリツプフ
ロツプFFの出力Ｑは反転し、負荷Ｌへの
電力供給の有無が反転する。 (c) Every time the slave switch S2 is closed, the output Q of the flip-flop FF is inverted, and the presence or absence of power supply to the load L is inverted.
(ニ) 電源Ｐが接続されたときはフリツプフロ
ツプFFはリセツトされ、負荷Ｌへは電力
が供給されない。 (d) When power supply P is connected, flip-flop FF is reset and no power is supplied to load L.
(2) 主スイツチS1がａ（OFF）側に閉じてい
ると強制的に負荷Ｌへの電力供給はしや断さ
れる。このとき、フリツプフロツプFFはセ
ツトされるが、電力を供給させる能力はな
い。 (2) When the main switch S1 is closed to the a (OFF) side, the power supply to the load L is forcibly cut off. At this time, the flip-flop FF is set, but has no ability to supply power.
なお、上記実施例では従開閉部Ｂをリモー
トコントロールに使用するとき、図示一点鎖
線の部分で延長することを想定したが、従ス
イツチS2のみを延長してもよい。 In the above embodiment, when the slave switch B is used for remote control, it is assumed that it is extended along the dashed line shown in the figure, but only the slave switch S2 may be extended.
この発明になる電源開閉装置では以上のよ
うに構成されているので、
(イ) 従スイツチで電源からの負荷への電力供
給を停止していても、主スイツチを一度ａ
（OFF）側に切替えて、あらためてｂ
（ON）側に投入すれば、電力供給を開始で
きる。 Since the power switchgear according to the present invention is configured as described above, (a) Even if the slave switch stops power supply from the power supply to the load, the main switch can be turned on once.
Switch to the (OFF) side and press b again.
If you turn it on (ON) side, you can start supplying power.
(ロ) 従スイツチで電力供給としていて、停電
などで電源が一度切れて、再度投入されて
も、負荷への電力供給は行われない。 (b) Power is supplied by a slave switch, and even if the power is turned off due to a power outage and then turned on again, power will not be supplied to the load.
など、操作性、安全性においてすぐれた効
果を有する。 It has excellent effects in terms of operability and safety.
図はこの発明の一実施例を示す回路図である。
図において、Ｐは電源、Ｌは負荷、Q1は開閉手
段（主トランジスタ）、S1は主スイツチ、FFはフ
リツプフロツプ回路、S2は従スイツチ、R3，R5
およびQ3が保持回路手段を構成し、ＣおよびR6
は設定回路手段を構成する。
The figure is a circuit diagram showing one embodiment of the present invention.
In the figure, P is the power supply, L is the load, Q 1 is the switching means (main transistor), S 1 is the main switch, FF is the flip-flop circuit, S 2 is the slave switch, R 3 , R 5
and Q 3 constitute the holding circuit means, C and R 6
constitutes a setting circuit means.
Claims (1)
閉手段、 この開閉手段を開閉制御するための主スイツ
チ、この主スイツチが上記開閉手段に対する閉制
御位置にあるときのみ上記開閉手段を開閉制御す
る機能を有し第１の状態にあるときは上記開閉手
段に対し閉制御信号を、第２の状態にあるときは
上記開閉手段に対し開制御信号を出力し、かつＴ
入力端子へ入力があるごとにその出力を反転する
フリツプフロツプ回路、 上記主スイツチが上記開閉手段に対し開制御位
置にあるときは上記フリツプフロツプ回路を常時
上記第１の状態に保持する保持回路手段、 上記フリツプフロツプ回路のＴ入力端子への入
力を行うための従スイツチ、 上記電源が接続されたときに上記フリツプフロ
ツプ回路を上記第２の状態に設定する設定回路手
段とを備え、 上記主スイツチと従スイツチとにより電源から
負荷への電力供給を行うことを特徴とする電源開
閉装置。[Scope of Claims] 1. A switching means provided in a power supply path from a power supply to a load, a main switch for controlling the opening and closing of this switching means, and a main switch that controls the opening and closing of the switching means only when the main switch is in a closed control position for the switching means. The opening/closing means has a function of controlling the opening/closing of the opening/closing means, outputs a closing control signal to the opening/closing means when in a first state, outputs an opening control signal to the opening/closing means when in a second state, and
a flip-flop circuit that inverts its output every time there is an input to an input terminal; holding circuit means that always maintains the flip-flop circuit in the first state when the main switch is in the open control position with respect to the opening/closing means; A slave switch for inputting to the T input terminal of the flip-flop circuit, and setting circuit means for setting the flip-flop circuit to the second state when the power source is connected, the main switch and the slave switch A power switchgear characterized by supplying power from a power source to a load.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5776479A JPS55148322A (en) | 1979-05-09 | 1979-05-09 | Power switch device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5776479A JPS55148322A (en) | 1979-05-09 | 1979-05-09 | Power switch device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55148322A JPS55148322A (en) | 1980-11-18 |
| JPS6256738B2 true JPS6256738B2 (en) | 1987-11-27 |
Family
ID=13064938
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5776479A Granted JPS55148322A (en) | 1979-05-09 | 1979-05-09 | Power switch device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55148322A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0624317B2 (en) * | 1983-10-20 | 1994-03-30 | 三洋電機株式会社 | Energization control circuit |
| JPS6115875U (en) * | 1984-06-30 | 1986-01-29 | 日本電気ホームエレクトロニクス株式会社 | television receiver |
| JPH0159335U (en) * | 1987-10-09 | 1989-04-13 |
-
1979
- 1979-05-09 JP JP5776479A patent/JPS55148322A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55148322A (en) | 1980-11-18 |
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