JPS6256589B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a disk rotation control device in a disk playback device such as a CLV (constant linear velocity) video disk or digital audio disk, which compares the phase of a disk linear velocity detection signal and a reference signal. When the disk rotation motor is servo-controlled using a signal obtained by superimposing the original phase comparison signal on a signal obtained by smoothing this phase comparison signal using a time constant circuit, the upper and lower amplitudes of the pulse signals included in the superimposed signal are made equal. Accordingly, the servo response in the increasing and decreasing directions of the rotational speed of the disk rotating motor is made equal.

The entire control system of a CLV type digital audio disc playback device is constructed as shown in FIG.

In FIG. 1, a disk 1 is placed on a turntable 2 and driven by a disk rotation motor 3. As shown in FIG. The optical pick-up head 4 houses a semiconductor laser, an optical system, a light receiving element, a focus control coil 5, a tracking control coil 6, etc. inside, and irradiates the recording surface of the disk 1 with laser light from an objective lens 7, and also reflects the laser light. Light is received through an objective lens 7. The optical pickup head 4 is fed in the radial direction of the disk 1 by a feed motor 8.

A signal detected by the optical pickup head 7 is sent to a demodulation circuit 12 via a preamplifier 9, an AGC (Auto Gain Control) circuit 10, and a waveform shaping circuit 11.

The focus servo circuit 13 detects the shift in focus of the laser beam based on the light reception signal, and
The focus control coil 5 is driven so as to focus on the recording surface. This focus servo circuit 1
3, when operating with normal loop gain during feed operation due to random access, etc., the focus actuator vibrates as the optical pick-up head 4 crosses the track, producing a beeping sound. Put it away. However, if you disable the focus servo at all,
Regenerated clock for CLV control cannot be obtained. Therefore, here, the loop gain is muted by a command from the system control circuit 37 during the feed operation. In the tracking servo circuit 14, a tracking error detection circuit 15 detects a deviation of the laser beam with respect to the pit row based on the light reception signal, and drives the tracking control coil 6 to correct the deviation. As the disk continues to be played and the tracking displacement becomes large enough that the tracking control coil 6 can no longer handle it, the tracking displacement detection circuit 2
4 issues a feed request signal, and the system control circuit 37 drives the feed motor 8 via the feed motor drive circuit 40.

The output signal of the waveform shaping circuit 11 is sent to the demodulation circuit 12.
In addition to being sent to the system, it is also used to create detection signals for CLV disk rotation servos. That is, the output signal of the waveform shaping circuit 11 is applied to the clock regeneration circuit 16, where the clock signal is regenerated. The synchronization signal detection circuit 17 detects the synchronization signal included in the output signal of the waveform shaping circuit 11 and outputs the signal. Synchronous signal detection circuit 17
The synchronizing signal output from the synchronous signal is frequency-divided by a frequency dividing circuit 18 and applied to a phase comparator circuit 19. The phase comparison circuit 19 divides this signal and the master clock generated from the master clock generation circuit 20 into the frequency division circuit 2.
The phase of the signal frequency-divided by 1 is compared, and the disk rotation motor 3 is controlled via the disk rotation servo circuit 22 so that these phases match.

The demodulation circuit 12 uses EFM (Eight to Fourteen).
Modulation) Demodulates the modulated and recorded signal on disk 1 to the original 8-bit signal, and removes unnecessary items such as combined bits and synchronization signals. Data control circuit 26, error correction circuit 2
7. In the memory circuit 28, the signal output from the demodulation circuit 12 (signal of disk 1 recorded in an interleaved manner) is de-interleaved and restored to the original signal, and the presence or absence of an error is checked, and the signal containing an error is detected. Errors are corrected by the error correction circuit 27, and those that cannot be corrected are corrected. Further, the corrected and corrected signal is temporarily stored in the memory circuit 28 at the timing of the reproduction clock signal, and is read out at the timing of the master clock, thereby aligning the data and absorbing uneven rotation of the turntable 2. ing.

The signal read out from the memory circuit 28 (a signal in which a right channel signal and a left channel signal are arranged alternately in a time-sharing manner) is applied to D/A converters 29 and 30, respectively, and is separated into left and right channels at the timing of the master clock. It is converted to the original analog signal (audio signal).

The subcode detection circuit 36 detects a subcode (address, track number, time code, etc.) from the signal demodulated by the demodulation circuit 12 and sends it to the system control circuit 37. The system control circuit 37 inputs the address, track number, etc. specified by the operation key 38 via the decoder 39, compares it with the detected subcode, and sends the address, track number, etc. specified by the operation key 38 via the feed motor drive circuit 40 so that they match. Drive the feed motor 8. Further, the system control circuit 37 displays the detected subcode on the display section 42 via the drive circuit 41.

The entire CLV digital audio disc playback device is constructed as described above.

Here, the disk rotation servo circuit 22 is
In the past, for example, as shown in FIG. 2, the error signal from the digital phase comparator 19 (voltages of +B _V and O _V depending on phase lead and lag, respectively) is converted to +1/2B _V (+B _V is biased with a voltage divided into two by resistors R and R, and the disk rotation motor 3 is controlled via a loop filter 43 and a motor drive circuit 44. That is, the second
The waveforms of the respective parts a to d in the figure are shown in FIGS. 3a to d, respectively. + when the phase is ahead of the reference signal created from the master clock (Figure 3a)
B _V , and O _V when delayed, and a signal biased at +1/2 B _V with equal upper and lower amplitudes is obtained at the portion d in FIG. 2, as shown in FIG. 3 d.

However, in the configuration as shown in FIG. 2, the control signal for the disk rotation motor 3 (FIG. 3 d) contains many pulse components, which has the disadvantage of causing so-called motor noise (rotation of the disk rotation motor 3 wobbling). There is.

In addition, the conventional disk rotation servo circuit 2
Another configuration example of 2 is shown in FIG. By smoothing the error signal output from the digital phase comparator 19 with a time constant circuit 45 consisting of a resistor R and a capacitor C, pulse components are removed, and the DC voltage obtained by averaging the error signal is used to drive the disk rotating motor. 3. This circuit is shown in a block diagram using a transfer function as shown in FIG.
In FIG. 5, Kp: Conversion constant of phase comparator 1/T _1S +1: Transfer function of time constant circuit 45 1/T _2S +1: Transfer function of loop filter 43 A: Transfer function of motor drive circuit 44 K _T : Torque constant T _L of disk rotating motor 3: Disturbance torque I: Moment of inertia of turntable 2 B: Friction of turntable bearing S: Complex number (jω) 1/S: Transfer function of return path One cycle of the servo loop in Fig. 5 The transfer function is A・K _P・K _T・1/T _1S +1・1/T _2S +1・1/I _S +B・
1/S, and includes four time constant circuits S in the loop. Therefore, when the phase margin is small and the angular frequency ω becomes large, the phase lag becomes large, and when the phase lag becomes 180° or more, if the loop gain is positive, there is a drawback that oscillation occurs.

Therefore, a disk playback device has recently been proposed that can improve the above-mentioned conventional drawbacks and prevent motor squeal while ensuring a sufficient phase margin. As shown in FIG. 6, the phase comparison signal is smoothed by a time constant circuit 50 (hereinafter referred to as average DC voltage V _DC ), and the original phase comparison signal is superimposed in a superimposition circuit 51, and the disc rotation motor is 3. Figure 6a
The waveforms of each part of ~e are shown in Figures 7a~e, respectively, and the superimposed signal (Figure 7e) is + of Figure 2.
Since the pulse component is smaller (the pulse width is smaller) compared to the one with 1/2B _V fixed bias, motor noise is prevented. Furthermore, since pulse components with no phase lag are superimposed, there is no apparent phase lag caused by the time constant circuit 50, and a sufficient phase margin for the servo loop can be ensured.

However, if the CLV system is adopted with the configuration shown in FIG. 6, the average DC voltage V _DC varies depending on the disc playback position. That is, since the outer circumference is rotated at a low speed, the average DC voltage V _DC of the superimposed signal is low, as shown in FIG. 8a. In addition, in order to rotate at a high speed on the inner circumference, the superimposed signal is
As shown in Figure b, the average DC voltage V _DC increases. However, even if the average DC voltage V _DC fluctuates,
The upper and lower limits of the pulse components included in the superimposed signal are +B
Since _V and O _V are fixed, the upper pulse and the lower pulse are asymmetrical with respect to the average DC voltage V _DC . That is, as shown in Figure 8a, the average DC voltage V
When _DC is low (at the outer periphery), the amplitude of the upper pulse is large and the amplitude of the lower pulse is small. Furthermore, when the average DC voltage V _DC is high (inner circumference) as shown in Figure 8b, the amplitude of the upper pulse is small;
The amplitude of the lower pulse becomes larger. Due to this phenomenon, the average value of the drive voltage of the disk rotation motor 3 changes between the inner and outer circumferences of the disk (higher on the inner circumference and lower on the outer circumference) due to the fact that the disk drive method is the CLV method. The ratio of the phase change of the reproduced signal to the change in the drive voltage changes between the inner and outer circumferences of the disk, and as a result, the servo response (servo open loop gain) of the drive system of the disk rotation motor 3 is smaller at the inner circumference of the disk. , becomes larger at the outer periphery. Therefore, it is difficult to always set the servo response of the rotational speed control system of the disk rotation motor to the optimum state for both the inner and outer circumferences of the disk, and it is difficult to always set the servo response of the rotational speed control system of the disk rotation motor to the optimum state at both the inner and outer circumferences of the disk. In this case, a problem arises in that the response in the increasing direction of the rotational speed of the disk rotating motor 3 and the response in the decreasing direction become different.

This invention has been made in view of the above-mentioned points, and is a CLV type disk drive system that controls a disk rotation motor by superimposing the original phase comparison signal on the average DC voltage V _DC obtained by smoothing the phase comparison signal. In the rotation control device, by making the upper and lower amplitudes of the pulse component equal to the average DC voltage V _DC ,
This is intended to equalize the response in the direction of increase and decrease in the rotational speed of the disk rotation motor.

According to the present invention, the above object is achieved by limiting the level of the phase comparison signal to twice the average DC voltage V _DC .

Embodiments of the present invention will be described below with reference to the accompanying drawings. In the following embodiment, parts common to those in FIG. 6 are given the same reference numerals.

In FIG. 9, the digital phase comparison circuit 19
compares the phase of the reference signal created based on the master clock and the detection signal created based on the reproduced clock, and applies the phase comparison signal to the disk rotation servo circuit 22.

In the disk rotation servo circuit 22, a time constant circuit 50 smoothes the phase comparison signal to create an average DC voltage V _DC . The arithmetic circuit 53 calculates a voltage value twice this average DC voltage V _DC . The limiter circuit 52 limits the phase comparison signal to a value twice the average DC voltage V _DC calculated above and outputs it. The superimposition circuit 51 superimposes the limited phase comparison signal on the average DC voltage V _DC . The superimposed signal is passed through a loop filter 43 and a motor drive circuit 44.
The disk rotation motor 3 is driven through the.

The superimposed signal waveform obtained by the circuit of FIG.
0 As shown in the figure, the value is twice the average DC voltage V _DC
Since it is limited to 2V _DC , the power supply voltage +B _V
If +B _V ≧2V _DC is set, the upper pulse and the lower pulse each have an amplitude of V _DC and are symmetrical with respect to the average DC voltage V _DC . Thereby, the servo response of the drive system of the disk rotating motor 3 can be made equal regardless of the inner circumference and the outer circumference of the disk, and the response in the direction of increasing and decreasing the rotational speed of the disk rotating motor 3 can be made equal.

A specific example of the portion surrounded by the dashed line 54 in FIG. 9 is shown in FIG. 11. In FIG. 11, the phase comparison signal is resistor R1 (R1≪R2, R3, R4)
The voltage is smoothed by a time constant circuit 50 consisting of a resistor R2 and a capacitor C, and an average DC voltage V _DC is created. This average DC voltage V _DC is doubled by the operational amplifier 53 (R _NF1 = R _NF2 ), and further resistors R3 and R4
(R3=R4), it is multiplied by 1/2 and returned to the original level. Further, the phase comparison signal from the resistor R1 is transmitted via the signal line 55 to the average DC voltage V at the superimposition point 51.
It is superimposed on _DC and output. The signal line 55 is connected to the output end of the operational amplifier 51 via the anode and cathode of the diode D in this order. Therefore, the phase comparison signal is limited to 2V _DC , which is twice the output voltage of the operational amplifier 53, that is, the average DC voltage V _DC . Therefore, the superimposed signal is
The waveform will be as shown in the figure.

As explained above, according to the present invention, when the original phase comparison signal is superimposed on the average DC voltage obtained by smoothing the phase comparison signal to control the disk rotating motor, the level of the superimposed phase comparison signal is averaged. Since the limit is set at twice the DC voltage, the amplitude of the pulse included in the superimposed signal becomes vertically symmetrical with respect to the average DC voltage, and the responses in the increasing and decreasing directions of the rotational speed of the disk rotating motor are made equal. be able to.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the entire control system in a digital audio disk playback device, Figure 2
The figure shows the disk rotation servo circuit 22 in FIG.
FIGS. 3a to 3d are waveform diagrams of each part of a to d in FIG. 2, and FIG. 4 is a block diagram showing another conventional configuration example of the disk rotation servo circuit 22. , FIG. 5 is a block diagram showing the circuit of FIG. 4 using a transfer function, and FIG. 6 is an improved version of the circuit of FIGS. 2 and 4.
A block diagram showing an example of a disk rotation motor servo circuit to which the present invention is applied, FIGS. 7a to 7e are waveform diagrams of each part of a to e in FIG. 6, and FIG. 8 is obtained by the circuit in FIG. 6. A waveform diagram showing a state in which the pulse waveform of the superimposed signal is vertically asymmetric with respect to the average DC voltage V _DC , FIG. 9 is a block diagram showing an embodiment of the present invention, and FIG. 10 shows the superimposition point 53 in FIG. The waveform diagram of the superimposed signal obtained from (the dotted line is the waveform diagram when there is no limiter circuit 52), and FIG.
4 is a circuit diagram showing a specific example of the circuit surrounded by 4. FIG. 1...disc, 2...turntable, 3...
... Disk rotation motor, 5 ... Focus control coil, 6 ... Tracking control coil, 7 ... Objective lens, 20 ... Master clock generation circuit, 2
2...Disk rotation servo circuit, 42...Display section, 51...Superimposition circuit, 52...Limiter circuit,
53... Arithmetic circuit.

Claims (1)

[Claims] 1. A phase comparison circuit that compares the phases of the disk linear velocity detection signal and a reference signal and outputs a pulse signal according to the phase difference, a time constant circuit that smoothes the output signal of the phase comparison circuit, and the time constant. an arithmetic circuit that calculates a voltage value twice the output signal of the circuit; a limit circuit that limits the output signal of the phase comparison circuit to the voltage calculated by the arithmetic circuit; and a limit circuit that limits the output signal of the time constant circuit to the voltage value calculated by the arithmetic circuit. 1. A disk rotation control device for a disk playback device, comprising a superimposing circuit for superimposing an output signal of the circuit, and controlling a disk rotation motor based on the output signal of the superimposing circuit.