JPS6256197A - Integrated circuit card - Google Patents
Integrated circuit cardInfo
- Publication number
- JPS6256197A JPS6256197A JP60197903A JP19790385A JPS6256197A JP S6256197 A JPS6256197 A JP S6256197A JP 60197903 A JP60197903 A JP 60197903A JP 19790385 A JP19790385 A JP 19790385A JP S6256197 A JPS6256197 A JP S6256197A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- card body
- semiconductor integrated
- substrate
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Credit Cards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明はＩＣカードに係わり、特に、半導体集積回路の
固定された絶縁性基板をカード本体に貼着せしめる接着
材に関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an IC card, and particularly to an adhesive for adhering an insulating substrate on which a semiconductor integrated circuit is fixed to a card body.
〈従来の技術〉
従来のＩＣカードは、プラスチック等の絶縁性カード本
体に、半導体集積回路の実装された絶縁性基板と略等し
い凹みを形成し、該凹みに半導体集積回路の実装された
絶縁性基板を、半導体集積回路がカード本体と絶縁性基
板とに挟持される如く、挿入する。<Prior Art> In a conventional IC card, a recess approximately equal to the insulating substrate on which the semiconductor integrated circuit is mounted is formed in an insulating card body made of plastic or the like. The board is inserted so that the semiconductor integrated circuit is sandwiched between the card body and the insulating board.
カード本体の凹みには絶縁性の接着材が塗付されている
ことから、凹みに挿入された絶縁性基板はカード本体に
貼着され、固定される。Since the recess of the card body is coated with an insulating adhesive, the insulating substrate inserted into the recess is adhered and fixed to the card body.
〈発明の解決しようとする問題点〉
しかしながら、従来のＩＣカードにあっては、カード本
体と絶縁性基板とが絶縁性接着材で貼着されているので
、半導体集積回路が絶縁性接着材中に埋まり、絶縁性基
板と絶縁性カード本体との接着面に蓄積される電荷の放
電ができず、その結果、弱部的に高密度で蓄積された電
荷が半導体集積回路を構成しているトランジスタに印加
され。<Problems to be Solved by the Invention> However, in conventional IC cards, the card body and the insulating substrate are attached with an insulating adhesive, so the semiconductor integrated circuit is stuck inside the insulating adhesive. As a result, the charges accumulated on the adhesive surface between the insulating substrate and the insulating card body cannot be discharged, and as a result, the charges accumulated at a high density in the weak parts are transferred to the transistors that make up the semiconductor integrated circuit. is applied to.
半導体集積回路中で放電経路が形成される際にトランジ
スタを破壊するという問題点があった。There is a problem in that transistors are destroyed when a discharge path is formed in a semiconductor integrated circuit.
く問題点を解決するための手段〉
本発明は上記問題点に鑑み、カード本体と基板とを接着
材に導電性を付与することにより、電荷の局在を排除で
きるようにしたことを要旨とする。Means for Solving the Problems> In view of the above problems, the gist of the present invention is to eliminate the localization of charges by imparting conductivity to the adhesive between the card body and the substrate. do.
〈実施例〉
第１図は本発明の一実施例を表わす図であり、図中、１
は絶縁性カード本体である。このカード本体１の一端部
には、略直方体の凹み２が形成されており、この凹み２
には、略同形状の基板３が挿入される。基板３は、ガラ
ス、エポキシ樹脂等の絶縁体で形成されており、第２図
に詳示されている如く、プラスチック４でモールドされ
た半導体集積回路８が固定されている。半導体集積回路
８の端子は基板３スルーホール配、ｓ！５により電極６
に電気的に接続されており、かかる基板３は。<Example> FIG. 1 is a diagram showing an example of the present invention, and in the figure, 1
is the insulating card body. A substantially rectangular parallelepiped recess 2 is formed at one end of the card body 1.
A substrate 3 having substantially the same shape is inserted into. The substrate 3 is made of an insulator such as glass or epoxy resin, and as shown in detail in FIG. 2, a semiconductor integrated circuit 8 molded with plastic 4 is fixed thereon. The terminals of the semiconductor integrated circuit 8 are arranged through holes on the substrate 3, s! 5 to electrode 6
The substrate 3 is electrically connected to the .
プラスチック４でモールドされた半導体集積回路８を凹
み２の底面（第１図中斜線の付された面）に対向させ、
該底面に導電性接着剤７を塗布した後、凹み２に挿入さ
れ、カード本体１に貼着される。A semiconductor integrated circuit 8 molded with plastic 4 is placed opposite the bottom surface of the recess 2 (the shaded surface in FIG. 1),
After applying a conductive adhesive 7 to the bottom surface, the card is inserted into the recess 2 and attached to the card body 1.
したがって、半導体集積回路８は、第３図に詳示されて
いる如く、カード本体１と基板３との間に介在する導電
性の接着材７中に埋められる。Therefore, the semiconductor integrated circuit 8 is embedded in the conductive adhesive material 7 interposed between the card body 1 and the substrate 3, as shown in detail in FIG.
導電性接着材は、当業者に公知であり、導電性金属粒子
を含む接着材ペースト等も用いることができる。Conductive adhesives are well known to those skilled in the art, and adhesive pastes containing conductive metal particles can also be used.
く効果〉
以」＝説明してきたように１本発明によれば、カード本
体と基板とを導電性接着材により固定したので、電荷の
放電経路が接着材中に形成でき、接着材中の電位が等し
くなり、半導体集積回路を通しての放電が生じないこと
から、半導体集積回路を構成するトランジスタの破壊を
防止できるという効果が得られる。As explained above, according to the present invention, since the card body and the substrate are fixed with a conductive adhesive, a charge discharge path can be formed in the adhesive, and the potential in the adhesive can be are equal, and no discharge occurs through the semiconductor integrated circuit, resulting in the effect that destruction of the transistors constituting the semiconductor integrated circuit can be prevented.
第１−図は本発明の一実施例を示す分解斜視図、第２図
は第１図中の基板の平面図、第３図は第１図で示されて
いるＩＣカードの断面図である。
１・・・・・・・カード本体
３・・・・・・・基板
８・・・・・・・半導体集積回路
７・・・・・・・導電性接着材。
第１図
第２図Figure 1 is an exploded perspective view showing an embodiment of the present invention, Figure 2 is a plan view of the board in Figure 1, and Figure 3 is a sectional view of the IC card shown in Figure 1. . 1... Card body 3... Substrate 8... Semiconductor integrated circuit 7... Conductive adhesive material. Figure 1 Figure 2
Claims (1)
導体集積回路をカード本体との間で挟持する状態でカー
ド本体に貼着される絶縁性の基板とを有するＩＣカード
において、前記カード本体と基板とを導電性接着材によ
り貼着させたことを特徴とするＩＣカード。An IC card comprising an insulating card body and an insulating substrate to which a semiconductor integrated circuit is fixed and which is attached to the card body with the semiconductor integrated circuit sandwiched between the card body and the card body. An IC card characterized in that it is attached to a substrate using a conductive adhesive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60197903A JPS6256197A (en) | 1985-09-06 | 1985-09-06 | Integrated circuit card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60197903A JPS6256197A (en) | 1985-09-06 | 1985-09-06 | Integrated circuit card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6256197A true JPS6256197A (en) | 1987-03-11 |
Family
ID=16382195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60197903A Pending JPS6256197A (en) | 1985-09-06 | 1985-09-06 | Integrated circuit card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6256197A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01145197A (en) * | 1987-06-11 | 1989-06-07 | Dainippon Printing Co Ltd | Ic card and manufacture thereof |
| JPH0327599A (en) * | 1988-11-02 | 1991-02-05 | Robert Bosch Gmbh | Electronic controller |
-
1985
- 1985-09-06 JP JP60197903A patent/JPS6256197A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01145197A (en) * | 1987-06-11 | 1989-06-07 | Dainippon Printing Co Ltd | Ic card and manufacture thereof |
| JPH0327599A (en) * | 1988-11-02 | 1991-02-05 | Robert Bosch Gmbh | Electronic controller |
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