JPS6253580A - Recording and reproducing device for video signal - Google Patents

Abstract

PURPOSE:To equalize the sampling phases in a recording and a reproducing times and to obtain a reproducing image of less distortion by generating a sampling signal in the reproducing time setting a pilot signal in the recording time as a reference. CONSTITUTION:An adder 19 adds on output signal from a sample and hold circuit 5 with the pilot signal from a gate circuit 18 and generates and outputs a signal on which the pilot signal is overlapped at the back porch portion of a horizontal blanking. The output signal from a VXO24 is given to a sample and hold circuit 8 and a switch 14 as an operation timing signal, and to a sample and hold circuit 12, a reproducing pilot signal from the VXO24 is given through an inverter 13. The switch 14 makes pass selectively the signal from the sample and hold circuits 8 and 12 responding to the output signal from the VXO24. Therefore, as the output signal from the switch 14, a reproducing luminance signal in which the present signal is interpolated with the signal of 1H before the present signal can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for restoring a sampled signal during reproduction in a video signal recording and reproducing apparatus in which a video signal is band-compressed by sampling.

[Conventional technology VFI] Video signal recording and reproducing devices (hereinafter referred to as VTRs) currently used for home use have a tape/head configuration that is smaller than that of broadcasting VTRs, etc., considering operational economy. The relative speed is also slow, and therefore it does not have recording band characteristics sufficient to record and reproduce video signals of 4 MH2 or more. However, as the technology of tapes and heads progresses, it is becoming possible to record relatively high-band video signals even at the same tape/head relative speed. In order to perform such wideband recording and playback, the frequency allocation of the FM luminance signal, which is currently defined as a standard, must be significantly changed, and in this case, magnetic tape recorded using a new method must be When played back on a VTR, there was a problem in that an inversion phenomenon occurred and compatibility was not achieved.

In order to solve this problem, band compression is performed by frequency interleaving sampling, which allows wide band recording without changing the frequency allocation of the FM luminance signal, thereby widening the band of the reproduced video signal. The band compression and expansion method using this frequency interleave sampling will be explained below.

FIG. 6 is a block diagram showing the configuration of a recording luminance signal processing circuit in a conventional video signal recording/reproducing apparatus. In FIG. 6, the recording luminance signal processing circuit is a horizontal periodic signal separation circuit that receives a luminance signal including a periodic signal from which a chromaticity signal has been removed, which is applied via an input terminal 1, and separates and outputs a horizontal periodic signal. 2, a multiplier 3 that receives the horizontal periodic signal from the horizontal periodic signal separation circuit 2, multiplies its frequency by 765 and supplies it to the frequency divider 4, and divides the frequency-multiplied signal from the multiplier 3 by 1/2. A frequency divider 4 that divides the frequency and outputs it, and an output signal from the frequency divider 4 (hereinafter referred to as a sampling signal)
The sample and hold circuit 5 samples the signal applied from the input terminal 1 in response to the input signal and sequentially outputs the sampled signal.

FIG. 7 is a diagram showing signal waveforms for explaining the circuit operation of FIG. 6. The operation of the recording signal processing circuit will be described below with reference to FIGS. 6 and 7. Input terminal 1 receives a luminance signal (7th
Figure a) is given.

horizontal period from the input signal given via input terminal 1,
A horizontal periodic signal is separated by a signal separation circuit 2 and applied to a multiplier circuit 3. The multiplier circuit 3 uses the horizontal periodic signal from the horizontal periodic signal separation circuit 2 to multiply the frequency by, for example, 765 times and outputs the result.

The signal from the multiplier circuit 3 is divided into 1/2 by a frequency divider 4 and is provided as an operation timing signal, ie, a sampling signal, to the sample & hold circuit 5 (FIG. 7b). The sample and hold circuit 5 samples the signal applied from the input terminal 1 at intervals of the sampling signal and outputs the sampled signal (O in FIG. 7).

FIG. 8 is a diagram showing frequency spectra of input and output signals to be sampled. In Figure 8,
A signal obtained by sampling the input signal applied to the input terminal 1 (FIG. 8a) at a frequency t has a frequency spectrum as shown in FIG. 8(b). Normally, so-called aliasing noise occurs in the overlapping portion of the input signal and the sampling signal (indicated by the dotted circle in FIG. 8). However, the sampling signal frequency f is smaller than twice the input luminance signal band and has the following relationship with the horizontal frequency fH: fi-(2n-1)fH/2. If selected so that n-1, 2, -..., then r s / 2 with the frequency f, /2 as the boundary, as shown in detail in Figure 8 (C).
The higher luminance signal high-frequency component is folded back to the luminance signal low-frequency component side distributed for each f and a with an offset of (1,/2')·t8, and the high-frequency component is reflected in the lower frequency range without becoming noise. will be included in the component side, therefore r s
If there is a recording frequency band of /2, all the information of the input luminance signal band can be recorded. This band-compressed recording signal is recorded on a suitable recording medium. Next, during reproduction, it is necessary to return the high-frequency components of the luminance signal folded during recording to the original spectral arrangement. The processing on the playback side will be explained below.

FIG. 9 is a block diagram showing the configuration of a reproduction system in a conventional video signal recording and reproduction apparatus. In FIG. 9, the reproduced signal processing circuit is composed of three paths.

The first path includes a 1H delay line 7 that delays the reproduced luminance signal (including periodic signals) applied via the input terminal 6 by 1H (one horizontal scanning period) and outputs the delayed signal, and a signal from the inverter circuit 13 that outputs the delayed signal by 1H (one horizontal scanning period). It is comprised of a sample and hold circuit 12 which samples the signal from the 1H delay line 7 as a signal (sampling signal) and sequentially supplies it to one input terminal (L side in FIG. 9) of a switch 14.

The second path samples the reproduced luminance signal given through the input terminal 6 using the signal from the frequency divider 11 as a timing signal, and sequentially sends it to the other input terminal of the switch 14 (H side in FIG. 9). It consists of a sample and hold circuit 8 that outputs.

The third path is a path for creating a sampling signal,
a horizontal periodic signal separation circuit 9 that separates and outputs a horizontal periodic signal from the reproduced luminance signal applied via the input terminal 6;
The frequency of the horizontal periodic signal from the horizontal periodic signal separation circuit 9 is multiplied by a factor of 765, for example, and the frequency is multiplied by a multiplier circuit 10 which is applied to the frequency divider 11. Sample and hold circuit 8. It is composed of a frequency divider 11 which supplies the signal to the inverter circuit 13, and an inverter circuit 13 which inverts the phase of the signal from the frequency divider 11 and supplies it to the sample and hold circuit 12 as a sampling signal.

The output signal is provided from the output terminal of a switch 14 which selectively passes the signals from the sample and hold circuits 8 and 12 in response to the sampling signal from the frequency divider 11.

FIG. 1o is a signal waveform diagram showing the operation of the block diagram shown in FIG. 9. The operation of the reproduction system will be described below with reference to FIGS. 9 and 10.

The input terminal 6 is supplied with a reproduced n-degree signal shown in FIG. 10(b). This reproduced luminance signal is transmitted to the one-day delay line 7. Sample and hold circuit 8. The 1H delay line 7 provided to each horizontal periodic signal separation circuit 9 delays the input input reproduced luminance signal by 1H, outputs a delayed signal as shown in FIG. 10(a), and samples & Hold circuit 12
give to

On the other hand, using the horizontal periodic signal separated from the reproduced luminance signal by the horizontal periodic signal separation circuit 9 as a reference, the multiplier circuit 10 multiplies the frequency by 765 times and supplies the output signal from the multiplier circuit 10 to the frequency divider 11. The sampling signal (FIG. 10C) is obtained by dividing the frequency by 1/2 by 11. The process of creating the sampling signal up to this point is the same as that during recording, but the sampling signal frequency is <2n-1) f
Since the relationship is H/2, 1H (1H:
1 horizontal scan mm>The previous sampling signal phase and the current sampling signal phase have an opposite phase relationship as shown in FIGS. 10(a) and 10(b). The sampling phase during reproduction is equal to the sampling phase during recording, otherwise distortion will occur during interpolation. In order to avoid this, the sample phase when sampling the output from the one-day delay line 7 in the sample & hold circuit 12 and the sample phase when sampling the current signal in the sample & hold circuit 8 are inverted. The phase of the output signal from the frequency divider 11 is inverted in the inverter circuit 13 (see FIGS. 10c and 10d), and the sampling signal from the frequency divider 11 is applied to the sample & hold circuit 8. On the other hand, the sampling signal from the inverter circuit 13 is given to the sample & hold circuit 12. Each sample and hold circuit 8.12 samples the applied signal periodically at the rising edge of the sample signal. Switch 14 responds to the signal from frequency divider 11 to selectively pass the signal through one of sample and hold circuits 8 and 12. At this time, the sample signal from the frequency divider 11 is i Hn
When this happens, the switch 14 outputs the signal from the sample-and-hold circuit 8, and when the sample signal from the frequency divider 11 is "yes", it outputs the signal from the sample-and-hold circuit 12. Thereby, the switch 14 switches and outputs the signals from the sample & hold circuits 8 and 12 at f,/2 cycles. As a result, the portion that was not sampled during recording is interpolated with the signal from 1H before, and the original signal is restored.

FIG. 11 is a diagram showing a sampling pattern during recording and a pattern of an interpolated mechanical signal from the switch 14. In FIG. 11, O indicates the sampling pattern and the fist indicates the interpolated signal.

As shown in FIG. 11(a), during recording, each horizontal scanning line is sampled at a period of '+yfs.Nbetween adjacent horizontal scanning lines, the sampling phase of the sampling points is reversed. As a result, the deviation is 1/2fS. Therefore, the output signal from the switch 14 is a combination of the current signal and the signal 1H before. Since the output is switched at a cycle of /2fs, the first
As shown in Figure 1 (1), the current signal is interpolated with the sampling signal from one day ago, resulting in a signal equivalently sampled at a sampling frequency of 2fs, and the 10th
The signal is restored to the original signal as shown in Figure (e).

[Problems to be Solved by the Invention] However, in the conventional video signal recording and reproducing device, when creating a sampling pulse during reproduction, a 1/2 frequency dividing circuit 11 is provided at the subsequent stage of the multiplier circuit 1o. Because, 1. When dividing the frequency by /2, two phases can be taken, and it is difficult to determine which phase is equal to the phase during recording. Generally, when a 1/N frequency divider is used, N different phases can be obtained. In addition, if the phase shift in the horizontal periodic signal separation circuit for recording and playback directly becomes a sampling phase shift, for example, if the sampling phase becomes reversed, distortion occurs during interpolation as shown in Figure 10 (I). There was a drawback that it appeared as .

Therefore, an object of the present invention is to provide a video signal recording and reproducing device that can eliminate the above-mentioned drawbacks, equalize the sembling phase during recording and reproducing, and obtain reproduced images with less distortion. It is to be.

[Means for Solving the Problems] The video signal recording and reproducing apparatus according to the present invention uses a sampling signal to create a signal (hereinafter referred to as a signal to pylon 1) having a predetermined relationship with the sampling signal, This pilot signal is preferably superimposed within the horizontal blanking of the luminance signal.1. The sampling pulse is recorded using this pilot signal as a reference during playback, preferably using a phase periodic loop, and the restored sampling pulse is used to perform simbling.

[Operation] Since the sampling signal for playback is created based on the pilot signal that has a predetermined relationship with the sampling signal for recording, the phase of the sampling signal for playback is the same as the sampling phase for recording. It is possible to restore the original signal without distortion.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a recording system of a video signal recording and reproducing apparatus which is an embodiment of the present invention. In FIG. 1, first, in order to sample a luminance signal (including a periodic signal) applied to input terminal 1, a horizontal periodic signal is Separation circuit 2. A PLL multiplier multiplier circuit 3 times and a hold circuit 5 are provided. Next, as a feature of the present invention, a path is provided for creating a pilot signal and superimposing it on the recorded luminance signal.

This path includes a frequency divider 15 which receives the signal from the frequency divider 4, further divides the frequency, and supplies it to the reduction filter 16, and a frequency divider 1.
a low-pass filter 16 that removes unnecessary harmonics contained in the signal from the horizontal periodic signal separation circuit 2 and supplies the output signal to one input of the gate circuit 18; A one-shot multivibrator 17 that generates a pulse and supplies it to the other input terminal of a gate circuit 18, and an adder that selectively passes the signal from the low-pass filter 16 using the signal from the one-shot multivibrator 17 as a gate signal. 19, and an adder 19 that adds the signal from the sample & hold circuit 5 and the signal from the gate circuit 18 and outputs the result.

FIG. 2 is a signal waveform diagram showing the operation of the recording system of FIG. 1. The operation during recording will be described below with reference to FIGS. 1 and 2.

The sampling signal that is the sampling timing signal of the sample & hold circuit 5 is the conventional one, the spherical one, and the horizontal periodic signal separation circuit 2. For example, it is formed by a path of a multiplier circuit 3 and a 1/2 frequency divider 4, which are configured as a phase periodic loop. The sample and hold circuit 5 uses the sampling signal from the frequency divider 4 (FIG. 2a) as a timing signal to sample the signal applied via the input terminal 1 and outputs it to one input terminal of the adder 19.

On the other hand, the output signal from the divider 4, that is, the sampling signal, is also given to the frequency divider 15, where the frequency is divided by 17/3. Here, the frequency of the output signal of the frequency divider 15 (Fig. 2b) is <765/3x2)・f H − <255.7'2)
・“8.

However, fH is the horizontal frequency and maintains the offset condition of fH/2 from the luminance signal frequency. The output signal from the divider 15 is applied to a low-pass filter 16, where unnecessary harmonics are removed to obtain the signal shown in FIG.

Furthermore, the one-shot multivibrator 17 is connected to the output signal (horizontal periodic signal) of the horizontal periodic signal separation circuit 2 as a reference.
As a result, the output signal of the sample & hold circuit 5 becomes "H" in the pack porch portion of the horizontal periodic signal included in the output signal of the sample & hold circuit 5 (d) in Figure 2.
A gate signal (FIG. 2 e) in which the level is located is generated and applied to the other input of the gate circuit 18. The gate circuit 18 converts the output signal of the one-shot multivibrator 17 from the output signal from the low-pass filter 16. The signal shown in FIG. 2(f) is extracted by extracting only the gate part, that is, the part corresponding to the "H" period, and applies it to the other input of the adder 19.The signal from this gate circuit 18 is sent to the pylon 1-1. One adder adds the output signal from the sample & hold circuit 5 and the pilot signal from the gate circuit 18 and outputs the output signal from the horizontal blanking back porch as shown in FIG. A signal in which the pilot signal is superimposed on the part is created and output.The output signal from the adder 19 is then finally FM-modulated in a signal processing circuit such as pre-emphasis (not shown) and sent to a recording medium. , for example, is recorded on a magnetic tape.The above is the signal processing operation during recording.Next, the signal processing during reproduction will be explained.

FIG. 3 is a block diagram showing the configuration of a reproducing system of a video signal recording/reproducing main apparatus which is an embodiment of the present invention. In FIG. 3, the reproduction system is divided into a sampling signal forming system during reproduction and a reproduction luminance signal processing system.

The sampling signal forming system during reproduction includes a horizontal periodic signal 11 circuit 9 that separates a horizontal periodic signal from a reproduction luminance signal given through an input terminal 6 and supplies it to the one-shot multivibrator 2, and a horizontal periodic signal separation circuit. One-shot multivibrator 21 generates a one-shot pulse in response to a horizontal periodic signal from 9 and applies it to one input terminal of gate circuit 22, and 1 day! ! a goo-to circuit 22 that selectively passes a signal from a subtraction circuit 2o that subtracts a signal from the wire extension 7 and a signal from the input terminal 6 in response to a signal from the one-shot multivibrator 21;
A phase comparator 23 receives the signal from the gate circuit 22 and the signal from the frequency divider 25, compares their phases, and generates a signal according to the phase comparison information, and responds to the signal from the phase comparator 23. a voltage-controlled crystal oscillator (hereinafter referred to as vXo) 24 whose oscillation frequency is controlled;
The frequency divider 25 divides the frequency of the signal from 24 and supplies the divided signal to the phase comparator 23. Phase comparator 23゜V-X O
24 and the frequency divider 25 constitute a phase periodic loop, and the output signal from the vXo 24 is sent to the sample & hold circuit 8.
and is directly applied to the switch 14 and applied to the sample & hold circuit 12 via the inverter circuit N13 to serve as an operation timing signal for each sample & hold circuit.

The luminance signal processing system extends the reproduced luminance signal given through the input terminal 6 by 18ii and sends it to the sample & hold circuit 1.
A sample & hold circuit 12 holds the signal from the 1H delay line 7 for a sample length in response to a signal from the inverter circuit 13 and outputs it to one input terminal of the switch 14; A sample & hold circuit 8 which responds to the output signal (sampling signal) from the VX024 by holding the reproduced luminance signal from the terminal 6 for a sample length and supplies it to the other input terminal of the switch 14;
Sample and hold circuit 8 in response to the signal from O24
, 12, and a switch 14 that selectively passes signals from , 12. Here, the signal from the 1H delay line 7 is also given to one input terminal of the subtracter 20, and the subtractor II 20 separates the signal given via the input terminal 6 and the signal from the 1-day delay line 7. Subtraction is performed and the output signal is provided to the gate circuit 22.

FIG. 4 is a signal waveform diagram for explaining the operation of the circuit of FIG. 3. The operation will be described below with reference to FIGS. 3 and 4.

The reproduced luminance signal applied to the input terminal 6 is transmitted to the one-day delay line 7.
is applied to one input terminal of the subtracter 20 via the subtracter 20. On the other hand, the reproduced luminance signal applied to the input terminal 6 is directly transmitted to the subtracter 2.
It is also given to the other input terminal of 0. , the subtractor 20 has a one day delay M7 from the current signal applied via the input terminal 6.
4(b) by subtracting the 1H delay signal given through
), the luminance signal and (1,/2”t
- Extract the signal in the frequency interleave relationship of f8 and give it to the gate circuit 22. Since the pilot signal inserted into the back porch portion of the horizontal periodic signal during recording has an interleaving relationship of <1/2) f H with the luminance signal, the output signal from the subtracter 2o also includes the pilot signal. The one-shot multivibrator 21 uses the horizontal periodic signal separated by the horizontal periodic signal separation circuit 9 as a reference signal to generate a one-shot pulse whose timing coincides with that of the horizontal blanking back porch. Figure (C)) is applied to the gate circuit 22.

Gate circuit 22, one shot multi-by break 2
1 selectively passes the signal from subtractor 20 in response to the gate signal from subtractor 20 . At this time, since the "H" position of the Goo1- signal from the one-shot multivibrator 21 is located in the back porch portion of the horizontal retrace period where the pilot signal is superimposed, the output signal from the gate circuit 22 is Only the pilot signal is extracted as shown in FIG. 4(d). The pilot signal extracted by the gate circuit 22 is applied to a phase comparator 23. Phase comparator 23. The VXO 24 and the 1/3 frequency divider circuit 25 constitute a phase cycle loop. Therefore, the output signal from X024 becomes a continuous signal obtained by multiplying the pilot signal frequency given to the phase comparator 23 by three.

FIG. 5 is a diagram showing signal waveforms of the pilot signal applied to the phase comparator 23 and the output signal from the VXO 24. As can be seen from FIG. 5, the output signal which is tripled with the phase period of the signal given to the phase comparator 23 is VXO
Obtained from 24.

Here, the output signal phase of the VXO 24 and the phase of the pilot signal are tripled using a phase periodic loop, so they maintain a constant relationship and are not affected by a frequency divider or the like. Therefore, by using the output signal from the VXO 24 instead of the sampling pulse created by frequency-multiplying the conventional H[ horizontal periodic signal, stable sampling becomes possible. The output signal (sampling signal) from VXO24 is sent to sample & hold circuit 8
and is applied to switch 14 as an operation timing signal. On the other hand, a reproduced pilot signal from the VXO 24 is applied to the sample & hold circuit 12 via an inverter 13. Switch 14 selectively passes signals from sample and hold circuits 8 and 12 in response to a negative output signal from VXO 24 . Therefore, the output signal from the switch 14 is a reproduced luminance signal obtained by interpolating the current signal with the signal 1H before. In this way, stable sampling is possible without shifting the sampling phase during sampling during reproduction, and a signal without distortion can be reproduced.

Note that although the above embodiment describes sampling at a (1,/2) fM offset, the sampling is not limited to this offset, and can be applied to sampling at other offsets.

In addition, in this embodiment, a configuration is explained in which the current signal is interpolated with a signal 1H before, but when the current signal is interpolated with a signal 1 frame before, or adaptively interpolated from surrounding pixels. It can also be applied to other interpolation methods such as

Furthermore, in the above embodiment, the pilot signal frequency is selected to have an offset relationship of (1,/2) fs with the luminance signal, but what can be done under the condition that it has a constant relationship with the sampling frequency? It can be any frequency.

Further, in the above embodiment, a voltage controlled crystal oscillator is used as the voltage controlled oscillator, but similar effects can be obtained by using other ordinary voltage controlled oscillators.

[Effects of the Invention] As described above, according to the present invention, a pilot signal whose frequency has a constant relationship with the sampling signal during recording is created and superimposed on the blanking period of the luminance signal, preferably on the back porch. By recording and reproducing, a sampling signal is created based on this pilot signal and the reproduced luminance signal is sampled. Therefore, the sampling phase during reproduction can be made almost equal to that during recording, and the horizontal periodic signal can be multiplied. Since stable sampling can be performed without taking a plurality of phases with respect to the reference phase as in the case of a sampling signal created by the above method, a signal with less distortion can be reproduced.

Also, the pilot signal is (1/2) the frequency of the luminance signal.
Since there is a frequency interleave relationship of r□, it is easy to separate it from the luminance signal by using a rhombus filter or the like, and it is possible to improve S and /N.

Furthermore, since a voltage-controlled crystal oscillator is used as the voltage-controlled oscillator, side locks caused by harmonics of the pilot signal can be almost eliminated, and very stable sampling pulses can be created.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a recording system of a video signal recording and reproducing apparatus which is an embodiment of the present invention. FIG. 2 is a signal waveform diagram showing the circuit operation of FIG. 1. FIG. 3 is a block diagram showing the configuration of a reproducing system of a video signal recording and reproducing apparatus which is an embodiment of the present invention. FIG. 4 is a signal waveform diagram showing the operation of the circuit of FIG. 3. FIG. 5 is a diagram showing the signal waveforms of the input signal to the phase comparator of FIG. 3 and the output signal of the VXO. FIG. 6 is a block diagram showing the configuration of a recording system of a conventional video signal recording and reproducing apparatus. FIG. 7 is a signal waveform diagram showing the operation of the circuit of FIG. 6. FIG. 8 is a diagram showing the principle of band compression during recording. FIG. 9 is a block diagram showing the configuration of a reproduction system in a conventional video signal recording and reproduction apparatus. FIG. 10 is a signal waveform diagram showing the operation of the circuit shown in FIG. 9. 1st
FIG. 1 is a diagram showing an interpolation method for reproduced luminance signals. In the figure, 2.9 is a horizontal periodic signal separation circuit, 3 is a multiplier circuit, 4, 15.25 is a frequency division circuit, 16 is a low-pass filter, 17.21 is a one-shot multivibrator, and 18
．． 22 is a gate circuit, 19 is an adder, 7 is a one-day delay line,
20 is a subtracter, 23 is a phase comparator, and 24 is a voltage open crystal oscillator. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Masuo Daiiwa Figure 2, Figure 4 d) Lazy 2F - "Study Paste" - Figure 5, Figure 6, Figure 7, Return Volume?--!--F-11, Figure 8 1st round comparison Figure 9 f Offi 11th area

Claims (5)

[Claims] (1) A sampling signal having a frequency lower than twice the desired maximum recording frequency of the luminance signal and having a frequency such that the high frequency component of the luminance signal is frequency interleaved with the low frequency component is used as the luminance signal. The luminance signal is sampled and/or frequency converted, the luminance signal is thinned out and recorded, and during reproduction, the reproduced luminance signal is interpolated using a signal similar to the sampling signal at the time of recording to restore the original spectral arrangement. A video signal recording and reproducing device, wherein the video signal recording and reproducing device includes a recording system and a reproducing system, and the recording system includes: a sampling signal generating means for generating the sampling signal; and a sampling signal generating means for generating the sampling signal. a pilot signal generator that receives a signal and performs predetermined arithmetic processing to generate a pilot signal having a frequency lower than the sampling signal frequency; a sampling means that samples the recorded luminance signal in response to the sampling signal; and an addition unit configured to receive and add the pilot signal and the sampled recorded luminance signal and output the result, and the reproduction system separates the pilot signal inserted into the recorded luminance signal from the reproduced luminance signal. a pilot signal separating means for outputting a reproduced sampling signal; a reproduced sampling signal generating means for receiving the pilot signal separated by the pilot signal separating means and performing predetermined processing to generate a reproduced sampling signal; a reproduction sampling means for sampling and outputting the reproduced luminance signal in response; and an interpolation means for receiving the sampled reproduction luminance signal and interpolating and outputting the reproduced luminance signal in response to the reproduction sampling signal; A video signal recording and reproducing device configured to interpolate a reproduced luminance signal using a reproduced sampling signal from a sampling signal generating means to restore the original spectral arrangement. (2) The video signal recording and reproducing apparatus according to claim 1, wherein the pilot signal from the pilot signal generating means is inserted in a time division manner within the luminance signal blanking period. (3) The video signal recording and reproducing apparatus according to claim 1 or 2, wherein the frequency of the pilot signal from the pilot signal generating means is selected so as to be frequency interleaved with the luminance signal frequency. (4) The video signal recording and reproducing apparatus according to any one of claims 1 to 3, wherein the pilot signal generating means includes a frequency divider that divides and outputs a given signal frequency. . (5) The video signal recording and reproducing apparatus according to any one of claims 1 to 4, wherein the reproduced sampling signal generating means includes a phase cycle loop.