JPS625317B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a so-called program timer that automatically opens and closes the power supply of a television receiver or the like at preset times.

Recently, so-called televisions with built-in program timers have been attracting attention, which receive television broadcasts at preset times by attaching a timer to a television receiver as an adapter. When attaching a timer adapter to a television receiver, there are three ways to connect the timer relay, which is activated by a timer and turns the television power on and off, to the power switch attached to the television receiver.

(1) Connect the power switch and timer relay in series.

(2) The power switch is electrically turned on and the TV power is turned on and off via a timer relay.

(3) Connect the power switch and timer relay in parallel.

All three methods have drawbacks.

The drawbacks of the first method will be explained using FIG.
In the figure, 1 is an AC plug 2 is a power switch provided on the television receiver, 3 is a timer circuit, 4 is a timer relay driven by the timer circuit 2, and 5
is the television receiver power supply circuit.

Now, in this configuration, in order for the power circuit 5 of the television receiver to turn on and off in response to the opening and closing of the power switch 2, the timer relay 2 normally needs to be in a closed state.

On the other hand, in this configuration, the power switch 2 must be normally closed in order to enable the timer relay 4 to turn on and off the power supply circuit 5 of the television receiver at a time predetermined by the timer circuit 3. From the above, it is easy to understand that in order to freely turn on and off the power circuit 5 of the television receiver by opening and closing the power switch 2 and the timer relay 4, both the power switch 2 and the timer relay 4 must normally be turned on and off. It must be in a closed state. This means that the television power circuit 5 of the television receiver is normally on and receiving television broadcasts. Therefore, the power switch 2 and timer relay 4 shown in FIG.
A configuration in which they are connected in series cannot be used.

Needless to say, the disadvantage of the second method is that the power switch installed on the main body of the television receiver is electrically erect, so it is impossible to turn the TV power on and off using this power switch. It is clear that this configuration is not acceptable to general consumers who do not know the connection state of the electrical circuits inside television receivers.

Next, the drawbacks of the third method will be explained using FIG.

The components in this figure are the same as those in FIG. 1, except that the power switch 2 and timer relay 4 are connected in parallel instead of in series. In the configuration shown in the figure, usually timer relay 4 and power switch 2
is in the open state, that is, when the power supply circuit 5 of the television receiver is not turned on, the power supply circuit 5 can be turned on and off in response to the opening and closing of the power switch 2 and the timer relay 4, respectively. This eliminates the drawback that the TV is normally turned on.

The disadvantage of the configuration shown in FIG. 2 is that when the timer relay 4 is driven at the time preset by the timer circuit 3 and becomes connected, when the power supply circuit 5 is on,
Even if the power switch 2 is open, the timer relay 4 connected in parallel with it is connected, so the power circuit 5 is not turned off. That is, this means that the power supply circuit 5, which is turned on once at the time set by the command from the timer circuit 3, does not accept the operation of the power switch 2, which is also an unacceptable drawback.

The purpose of the present invention is to eliminate the above-mentioned conventional drawbacks,
To provide a television receiver capable of both manual operation of a power switch equipped on the television receiver and effective program timer operation using a timer.

The disadvantage of the configuration explained using FIG. 2 is that once the timer relay 4 is connected, it becomes impossible to turn on and off the power circuit 5 of the television receiver by manual operation via the power switch 2. I ended up having to do it. This inconvenience can be solved by providing a reset switch that opens and closes in conjunction with the opening and closing of the power switch 2, and by opening and closing the reset switch, the operation of the timer is stopped and the timer relay, which is the switching means, is opened.

Hereinafter, one embodiment of the present invention will be described in detail using FIG. 3. In the figure, 1, 2, 3, 4, and 5 are the AC plug, power switch, timer circuit, timer relay, and television receiver power supply circuit, respectively. thing or something equivalent.

31 and 32 are signal lines, 33 is a flip-flop 41 for keeping the timer relay open or closed, a relay drive circuit, 6 is a reset circuit,
61 is a reset switch, 62 is a signal line, 7 is an OR circuit, and 71 is a signal line. The reset switch 61 and the power switch 2 are opened and closed in conjunction with each other. In the figure, when the timer is not operating, that is, when timer relay 4 is in the open state, power switch 2
The TV power supply 5 is turned on and off by opening and closing the TV by hand. Further, when the power switch 2 is in the open state, as described above, the timer relay 4 is opened and closed at the time set in advance in the timer circuit, and the power supply circuit 5 is turned on and off.

This operation will be explained below.

Assume now that the timer circuit 3 is set to turn on the power supply circuit 5 at time A and turn off the power supply circuit 5 at time B. The timer circuit 3 transmits a pulse voltage to the set terminal of the flip-flop 33 through the signal line 32 at time A, and the flip-flop 33 responsively connects the timer relay 4 through the relay drive circuit 41, so that the power supply circuit 5 receives AC power.
Commercial power from plug 1 is connected, and power supply circuit 5
turns on. This state continues until the state of the flip-flop is reversed. Timer circuit 3 at time B
outputs a pulse voltage to the signal line 31 according to the settings, and this pulse voltage is input to the reset terminal of the flip-flop 33 via the OR circuit 7.
The flip-flop 33 inverts its state in response to this input and turns off the timer relay through the relay drive circuit 41, so that the power supply circuit 5 is turned off.

As explained above, it is possible to turn on and off the power supply circuit 5 at preset times using a timer.

Now, at the time between time A and time B, in other words, due to timer operation, it is not rare that it becomes necessary to turn off the power supply circuit 5 for some reason while the power supply circuit 5 is on. In this case, the power switch 2 for manually turning off the power supply circuit 5 cannot be operated because the timer relay 4 connected in parallel with it is in the connected state. 4 must be turned off. The reset switch 6 is involved in this operation.
1, a reset circuit 6, an OR circuit 7, and a signal line 62, and their operations will be explained below. As mentioned above, the reset switch 61 opens and closes in conjunction with the power switch 2. The reset circuit 6 detects that the reset switch changes from the closed state to the open state, and transmits a pulse voltage to the signal line 62. This pulse voltage is applied to the reset terminal of flip-flop 33 via OR circuit 7 and signal line 71, and flip-flop 33 inverts its state to open timer relay 4 as described above. That is, even if the power switch 2 is opened when the timer relay 4 is closed, it does not itself turn off the power supply circuit 5, but the reset switch 6 linked to the power switch 2 does not turn off the power supply circuit 5.
The reset circuit 6 resets the change from the closed state to the open state of 1.
is detected and timer relay 4 is opened, so
Even when the timer is operating, it is possible to turn off the power circuit 5 by manually changing the power switch 2 from the closed state to the open state.

This operation is actually as follows.

(1) If the power switch 2 is closed while the timer is operating, or if the timer operation starts while the power switch 2 is closed, the power circuit 5 will be turned off immediately by opening the power switch 2. .

(2) If the timer operation starts while the power switch 2 is in the open state, the power circuit 5 is immediately turned off by closing the power switch 2 and then returning it to the open state.

The second of the two types of operations mentioned above seems a little strange, but according to experiments, the operator who was trying to turn off the TV in the picture turned off the power switch 2.
This is a very natural operation when you see that it is already in the open state, so there is little discomfort with this operation.

Now, one embodiment of the reset circuit 6, which is one of the important functions of the present invention, will be described with reference to FIG. In the figure, 604 is a voltage determination circuit, 605 is a first voltage memory, 606 is a memory transfer circuit, 607 is a second voltage memory, 608 is a clock circuit, 609 is a memory content determination section V ₁ is a reset circuit 6 for power supply voltage, etc. This is a built-in voltage and is supplied to the terminal 601. The timing circuit 608 generates a timing signal, and the voltage determination circuit 604, memory transfer circuit 606, and memory content determination section 609 operate based on this timing signal.

The voltage determination circuit 604 determines that the ground voltage is the reset switch 6 when the reset switch 61 is open.
1 is in the closed state, the voltage V ₁ is input, and each time the timing signal is input, the result is "0" when the ground voltage is input, and "0" when the voltage V ₁ is input. 1”, judged first
Stored in memory 605. Memory transfer circuit 606
transfers the contents of the first memory 605 to the second memory 607 every time a timing signal is input, and the second memory 607 stores the contents. Therefore, when the reset switch 61 is in the open state, the contents of the first memory 605 and the second memory 607 are both "0".
When the reset switch 61 is in the closed state, the first
The contents of the memory 605 and the second memory 607 are both 1.
is memorized. The memory contents of the first memory 605 and the second memory 607 are input to the memory content determination circuit 609, and the output terminal 603 is output only when the content of the first memory 605 is "0" and the content of the second memory 607 is "1". Generates voltage pulses. Now, the content of the first memory 605 is "0", and the content of the second memory 605 is "0".
7 is "1" and a voltage pulse is generated at the output terminal 603 in the following case. That is, first, when the reset switch 61 is in the closed state and the contents of the first memory 605 and the second memory 607 are both "1", the reset switch 61 changes the power switch 2 from the closed state to the open state in FIG. It becomes open state in conjunction with manual operation, and voltage judgment circuit 6
04 correspondingly, “0” is stored in the first memory 605.
has been stored, but the memory transfer circuit 606 has not yet transferred it to the second memory 607. As explained above, at the moment the power switch 2 is changed from the closed state to the manual operation 2 open state in FIG. It becomes an open state, and the power supply circuit 5 is turned off.

The above is the explanation of the reset circuit 6.

Further, the timer circuit 3 and relay drive circuit 41 described above can be easily constructed by those skilled in the art, and therefore, the description of the construction itself is omitted in the description of this embodiment. Further, although the timer circuit 3 described using FIG. 3 has two signal lines 32 and 31 and generates pulse voltages at time A and time B, respectively, a timer circuit having another structure, For example, the present invention can be applied to a timer circuit that has one signal line and has a structure that outputs high voltage at times between time A and time B and low voltage at other times. What can be done can be easily deduced by those skilled in the art.

Further, in the embodiment of the present invention explained using FIG. 3, the timer circuit 3 reset circuit 6, flip-flop 33, etc. were explained as separate circuits, but these can be integrated as a large-scale integrated circuit or applied to a microcomputer. It goes without saying that it can be constructed as

As explained in detail above, if the program timer is configured to include the reset switch according to the present invention, even if the power switch and timer relay are connected in parallel, it is possible to manually turn off the TV power while the timer is operating. A good program timer can be provided.

[Brief explanation of the drawing]

1 and 2 are block diagrams showing the structure of a conventional program timer, FIG. 3 is a block diagram showing the structure of a program timer according to the present invention, and FIG. 4 is a block diagram of an embodiment of a reset circuit. . 2: power switch, 3: timer circuit, 4: timer relay, 5: television receiver power supply circuit,
6: Reset circuit, 61: Reset switch,
7: OR circuit, 33: flip-flop, 60
4: Voltage judgment circuit, 605: First voltage memory, 6
06: Memory transfer circuit, 607: Second voltage memory, 608: Timing circuit, 609: Memory content determination section.

Claims (1)

[Scope of Claims] 1. A power switch that is manually opened and closed; a switch means connected in parallel with the power switch; and a switch drive that closes the switch means in response to a set signal and opens the switch means in response to a reset signal. means; an OR circuit whose output end is connected to the reset signal input end of the switch driving means; a reset signal output end connected to one input end of the OR circuit, and whose set signal output end is connected to the reset signal input end of the switch drive means; a control circuit connected to a set signal input terminal of the switch means for opening and closing the switch means at preset times;
a reset switch that opens and closes in conjunction with the power switch; and a reset circuit that is connected to the reset switch and supplies an output signal to the other input terminal of the OR circuit when the power switch changes from closed to open. A timer device characterized by: 2. In claim 1, the reset circuit is a timing circuit; a voltage determination circuit connected to the reset switch; logic "0" when the reset switch is open; is a first voltage memory in which logic "1" is stored; a second voltage memory; a memory transfer circuit that transfers and stores the contents of the first voltage memory to the second memory every time a timing signal is derived from the timing circuit; is connected to the first voltage memory and the second voltage memory, and when the first memory stores logic “1” and the second memory stores logic “0”, outputs the output signal to the OR circuit; A timer device characterized by comprising a memory content determining unit for deriving memory contents.