JPS6249767A - Led array head - Google Patents

Abstract

PURPOSE:To appropriately drive an LED array without producing malfunctions and lowering its light emitting quantity, by dividing an LED array driving circuit into plural blocks. CONSTITUTION:An LED array 4 and its driving circuit 3 are respectively divided into plural (n) blocks correspondingly to each other. The blocks of the driving circuit 3 are respectively connected with a control circuit 8. Picture signals inputted to an S/P section 1 are simultaneously latched by a latching section 2. On the other hand, at the control circuit 8 a driving timing controlling signal is inputted from a terminal 7 and, at the same time, a control signal which is made synchronous to the picture signals is sent to a D-type flip-flop 8b from a clock generator 8a. Then a signal ENBk is outputted to the driving circuit 3 from the control circuit 8 and the LED array 4 is made to blink by block by means of the signal ENBk.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an LED array head that is used in high-speed printers that perform electrophotographic recording.

2. Description of the Related Art Conventionally, in this type of LED array head, as shown in FIG. , was designed to be latched by the latch section 2. Based on the latched image information, the voltage supplied from the power input terminal 6 is selectively applied to the LED array 4tL by the driver 3&.
The I, ED array 41L is made to blink in accordance with the image signal. Further, in this IICD array head, the drive time is controlled by an input signal from the drive time control signal input terminal 7.

Problems to be Solved by the Invention However, with such a configuration, there is a problem in that the LED array 4a does not blink in accordance with the logic of the image signal, resulting in malfunction. This problem arises for the following reasons.

The LED array 4a is composed of several dozen LED elements, and a current of 7 to IQIflA flows through these LED elements.

In general, several dozen currents flow through the LED array 41L as a whole. On the other hand, if the inductance component is L and the current is
is known to generate an electromotive force of Similarly, in the case of the LED array 4a described above, when the drive current is turned on and off, a large electromotive force is generated, which affects the circuit system as noise, and this causes the blinking of the LED array 4a. It did not follow the logic of the image signal.

Note that as a countermeasure to the above, it is possible to suppress the generation of noise by driving the LED array in a time-division manner and reducing the drive current supplied each time. However, in this case, the amount of light emitted from the LED array decreases, and when this LED array is used in, for example, an electrophotographic device, the recording speed decreases, which is a problem that cannot be solved properly.

The present invention has been made in view of the above problems, and an object of the present invention is to provide an LED array head that can appropriately drive an I4D array without causing malfunction or reduction in the amount of light emitted.

Means for Solving the Problems In order to achieve the above object, the present invention divides the LED array drive circuit into a plurality of blocks.

The control circuit that controls the drive circuit has, for example, a number of stages of flip-flops corresponding to the number of blocks of the LED array drive circuit, and has a configuration in which these flip-flops and each block of the drive circuit are connected to each block of the drive circuit. The drive currents are supplied at different timings.

When the driving of the active LED array is started, a driving current equal to the number of blocks in the entire LED array is sequentially supplied to the LED array. Furthermore, at the end of the drive, the drive current corresponding to the blocks is sequentially stopped in the same way. The rate of change in current is small both when driving is started and when it is stopped, suppressing the generation of electromotive force and, therefore, the generation of noise.

Embodiment FIG. 1 is a schematic configuration diagram showing an LED array head according to an embodiment of the present invention, and the same members as in FIG. 6 are indicated by the same symbols.

This ICD array head includes an LED array 4 in which a plurality of LED elements are arranged, and a drive circuit 3 for driving the LED array 4. LED array 4. The drive circuit 3 is divided into a plurality of n blocks corresponding to each other. Each block of the drive circuit 3 is connected to a control circuit 8, respectively. A drive time control signal input terminal 7 is connected to the control circuit 8 . A driving time control signal is sent from this terminal 7 to the control circuit 8, and based on this signal, the control circuit 8
A control signal ENB is output from the drive circuit 3 to each block of the drive circuit 3.

In this embodiment, one block 31 of the drive circuit 3 has the configuration shown in FIG. 3, and the control circuit 8 has the configuration shown in FIG. 3. That is, one block 31 of the drive circuit 3 is
A switching element 9 connected to a power source 6, a gate element 12 having an image signal input terminal 6 via a latch part 2 and a control circuit 8 on the input side, and a gate element 12 connected between the gate element 12 and the switching element 9. A resistor 11 is provided.

The gate element 12 receives an image signal and a control signal ICN from the input side.
B is input, and when both of them input the signal, a signal is output that turns on the switching element 9. When the switching element 9 is turned on, the LED is output from the terminal 1Q connected to the switching element 9.
A drive current is sent to the array 4. Also,
The control circuit 8 includes a clock generator 8 as shown in FIG.
? L, and (n-1) D-type flip-flops 8b connected to the clock generator 8a and arranged in series.
It is equipped with The D-type flip-flop 8b at the previous stage is connected to the drive time control signal input terminal 7, and the signal ENB is outputted from this connection to one gate element 12 of the drive circuit 31. Similarly, a signal ENBk (k=1. to .n) is inputted to the gate element 12 of the drive circuit 31 from the connecting portion of the adjacent D-type flip-flops 8b.

The operation of the LED array head configured as above will be explained.

First, an image signal is input from the image signal input terminal 6 to the "/p section 1.

The image signals input to the 872 section 1 are parallel-converted and then latched at the same time by the latch section 2.

On the other hand, in the control circuit 8, a drive time control signal is input from the terminal 7, and a control signal synchronized with the image signal is sent from the clock generator 8& to the D-type flip-flop 8b. Then, a signal ENBk is outputted from the control circuit 8 to the drive circuit 3, and the LED array 4 is blinked block by block by this signal ENBk.

In this embodiment, the LED array 4 is driven block by block by the control circuit 8 at timings as shown in FIG. That is, the signal ENBk applied to the th block of the drive circuit 3 is shifted from block to block. Signal EN
The BO application times are the same, but the rising and falling edges are each shifted by a minute time Δt, so that the rising edge and the falling edge do not coincide in time for each block. Specifically, the rising edge of the signal ENBk is the signal E
The rising edge of NB1 is delayed by Δt(k-1), and the falling edge of signal ENB' is delayed by Δt than the falling edge of signal ENBn.
I am trying to speed it up by (n-k). In this way, the amplitude level of the noise is reduced during the short time period Δt.

In this example, the case where the application time is the same for each block is explained as an example, but it can also be applied when the application time of each LED element is different by performing temperature correction and light emission variation correction of each I4D element. Can be applied.

That is, as shown in FIG. 6, one line scanning time is divided into a plurality of minimum exposure time sections, the minimum exposure time sections are shifted by a minute time Δt for each block, and the application time is an integral multiple of the minimum exposure time. may be applied to each LED element according to the amount of correction.

Furthermore, by setting the moment when the image signal is latched by the latch unit 2 to the time when the application of the drive current ends, it is possible to prevent the generation of noise caused by changes in the amount of applied current due to changes in the image signal. It is possible.

In this embodiment, a plurality of stages of D-type flip-flops are provided in the control circuit to control the drive circuit for each block. However, the present invention is not limited to D-type flip-flops. It is not limited to.

Effects of the Invention As is clear from the above explanation, the present invention divides the LED array drive circuit into a plurality of blocks, and supplies drive current to the LED array with the on/off timing shifted for each block. This reduces the rate of change of current and therefore the amplitude of noise, so it can be operated without malfunction.
Moreover, there is an effect that the IICD playhead can be operated without reducing the amount of light emitted.

[Brief explanation of the drawing]

FIG. 1 is a schematic configuration diagram of an LED array head according to an embodiment of the present invention, FIG. 2 is a time chart of driving time control signals of the LΣD array head shown in FIG. 1, and FIG.
4 is a configuration diagram showing an example of the control circuit in FIG. 1, and FIG. 6 is a configuration diagram showing an example of the control circuit in FIG. 1.
FIG. 6 is a time chart showing another example of drive time control signals by the D array head, and is a schematic configuration diagram of a conventional LED array head. 3... Drive circuit, 4... LED array, 8... Control circuit, 31... 1 block of drive circuit 3, 81... - 1 block of control circuit 8. Name of agent: Patent attorney Toshio Nakao and 1 other person2-
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Claims (1)

[Claims] An LED array in which multiple LED elements are arranged, and this LED
A circuit that supplies a drive current to the array to drive the LED array, and a circuit that controls the timing of supplying the drive current to the LED array, the drive circuit is divided into a plurality of blocks, and the control An LED characterized in that a circuit supplies a drive current with shifted on/off timing for each block to each block of the drive circuit.
array head.