JPS6249727A - Adaptive-antenna receiver - Google Patents

Adaptive-antenna receiver

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Publication number
JPS6249727A
JPS6249727A JP60188536A JP18853685A JPS6249727A JP S6249727 A JPS6249727 A JP S6249727A JP 60188536 A JP60188536 A JP 60188536A JP 18853685 A JP18853685 A JP 18853685A JP S6249727 A JPS6249727 A JP S6249727A
Authority
JP
Japan
Prior art keywords
signal
circuit
low
output signal
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60188536A
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Japanese (ja)
Other versions
JPH0669152B2 (en
Inventor
Yoshihiko Akaiwa
芳彦 赤岩
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NEC Corp
Original Assignee
NEC Corp
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Priority to JP60188536A priority Critical patent/JPH0669152B2/en
Publication of JPS6249727A publication Critical patent/JPS6249727A/en
Publication of JPH0669152B2 publication Critical patent/JPH0669152B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a high-performance mobile communication receiver, by providing two receiving antennas and automatically performing interference suppression of diversity reception or disturbing signals in accordance with signals received by the receiving antennas. CONSTITUTION:Signals S1(t) and S'2(t) outputted from a complex multiplier circuit 1 are inputted to and combined by a signal combining circuit 8 and a signal Z(t) is outputted from the circuit 8. The output signal Z(t) is given to an FM receiving circuit 9 and square-low detecting circuit 10. Part of the output signal Z(t) is fetched to an output terminal 11 as a receiving signal after passing through the FM receiving circuit 9. Moreover, another part of the output signal Z(t) is fetched by the square-low detecting circuit 10 as a detection output signal D(t) and the signal D(t) is divided into two parts and respectively inputted to a low-pass and high-pass filters 12 and 13. When a disturbing wave exists at the output terminal 11 of the FM receiving circuit 9, the disturbing wave is suppressed and only desired waves are outputted. The signals received by two receiving antennas 2 and 3 in relation with the desired waves are in-phase combined.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は移動通信に最適なアダプティブアンテナ受信機
に関し、特に干渉波が存在するときにはこれを抑圧し、
干渉波が存在しないときには同相合成ダイパーシティ−
を行うアダプティブアンテナ受信機に関するものである
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an adaptive antenna receiver that is most suitable for mobile communication, and in particular suppresses interference waves when they are present.
When there is no interference wave, in-phase synthesis diversity
The present invention relates to an adaptive antenna receiver that performs.

〔従来技術とその問題点〕[Prior art and its problems]

移動体で利用される移動無線通信では、フェージングに
よる受信信号の劣化と妨害信号による干渉が問題となる
。従来、フェージングによル受信信号の劣化に対しては
ダイパーシティ−受信枝’1ttiが、妨害信号による
干渉に対しては干渉抑圧技術が開発されている。2つの
技術は、いずれも2つの受信アンテナを利用し、2つの
受信アンテナから出力される信号を処理することにより
自動的に所要の制御を行う。しかし、従来では上記各技
術は別々に適用され、独立に動作するものであって、2
つの技術を同時に適用した方法は提案されていない。従
って、これらの2つの分野の技術を同一の制御アルゴリ
ズムに基づいて組合せて使用することができれば、例え
ば移動通信における受信機として有用性が高くなる。
In mobile radio communications used in mobile bodies, problems include deterioration of received signals due to fading and interference due to jamming signals. Conventionally, a diversity reception branch '1tti has been developed to deal with the deterioration of a received signal due to fading, and an interference suppression technique has been developed to deal with interference caused by a jamming signal. Both techniques utilize two receiving antennas and automatically perform necessary control by processing signals output from the two receiving antennas. However, in the past, each of the above techniques was applied separately and operated independently;
No method has been proposed that applies two techniques simultaneously. Therefore, if techniques in these two fields can be used in combination based on the same control algorithm, it will be more useful as a receiver in mobile communications, for example.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記要請に応えることにあり、2つの
受信アンテナを備え、これらの受信アンテナに受信され
る信号の状態に応じて自動的にダイパーシティ−受信又
は妨害信号の干渉抑圧を行い、移動通信の受信機として
の性能を高めたアダプティブアンテナ受信機を提供する
ことにある。
An object of the present invention is to meet the above-mentioned requirements, and includes two receiving antennas, and automatically performs diversity reception or interference suppression of interference signals according to the state of signals received by these receiving antennas. An object of the present invention is to provide an adaptive antenna receiver with improved performance as a mobile communication receiver.

〔発明の構成〕[Structure of the invention]

本発明は、第1及び第2の受信アンテナと、この第1及
び第2の受信アンテナの少なくとも一方に接続され、制
御信号によって前記第1及び第2の受信アンテナの受信
信号の間の振幅及び位相の関係を制御し、2つの出力信
号を出力する複素乗算回路と、この複素乗算回路の2つ
の出力信号を合成する信号合成回路と、この信号合成回
路の出力の一部を入力して復調を行う受信回路と、前記
信号合成回路の出力の一部を入力する2乗検波回路と、
この2乗検波回路の出力をそれぞれ入力する高域通過フ
ィルタ及び低域通過フィルタと、前記高域通過フィルタ
より得られる出力信号に直流信号を加えて成る信号を前
記低域通過フィルタの出力信号で除算する除算回路と、
直交する第1及び第2の低周波信号を発生する低周波信
号発生回路と、前記除算回路の出力信号と前記第1の低
周波信号の相関を求める第1の相関回路と、前記除算回
路の出力信号と前記第2の低周波信号の相関を求める第
2の相関回路と、前記第1の相関回路の出力信号から前
記第1の低周波信号を減算して1等だ信号を前記制御信
号として前記複素乗算回路へ出力する第1の減算回路と
、前記第2の相関回路の出力信号から前記第2の低周波
信号を減算して得た信号を前記制御信号として前記複素
乗算回路へ出力する第2の減算回路とから成ることを特
徴としている。
The present invention includes first and second receiving antennas, and the first and second receiving antennas are connected to at least one of the first and second receiving antennas, and the amplitude and the amplitude between the received signals of the first and second receiving antennas are controlled by a control signal. A complex multiplication circuit that controls the phase relationship and outputs two output signals, a signal synthesis circuit that synthesizes the two output signals of this complex multiplication circuit, and demodulation by inputting a part of the output of this signal synthesis circuit. a square-law detection circuit that inputs a part of the output of the signal synthesis circuit;
A high-pass filter and a low-pass filter each input the output of the square-law detection circuit, and a signal obtained by adding a DC signal to the output signal obtained from the high-pass filter is used as the output signal of the low-pass filter. A division circuit that performs division;
a low frequency signal generation circuit that generates orthogonal first and second low frequency signals; a first correlation circuit that calculates a correlation between the output signal of the division circuit and the first low frequency signal; a second correlation circuit that calculates a correlation between the output signal and the second low frequency signal; and a second correlation circuit that subtracts the first low frequency signal from the output signal of the first correlation circuit, and obtains a signal of 1st order as the control signal. a first subtraction circuit that outputs the signal as the control signal to the complex multiplication circuit; and a signal obtained by subtracting the second low frequency signal from the output signal of the second correlation circuit and outputting it as the control signal to the complex multiplication circuit. It is characterized by comprising a second subtraction circuit.

〔実施例〕〔Example〕

以下に、図面を用いて本発明の詳細な説明する。 The present invention will be described in detail below using the drawings.

第1図は本発明に係る受信機のブロック図である。この
図において、1は複素乗算回路で、複素乗算回路1は入
力端子101.102を介し2本の受信アンテナ2.3
を備える。受信アンテナ2,3はそれぞれ信号s+(t
)、  52(t)を受信するものとする。また入力端
子103.104には、減算回路4゜5からそれぞれ制
御信号α(t)、β(1)が入力する。かかる複素乗算
回路1は、例えば第2図に示す如く実現される。第2図
において、6は可変利得増幅器、7は可変移相器で、上
記制御信号α(1)は可変利得増幅器6に入力し、制御
信号β(1)は可変移相器7に入力する。このように構
成された複素乗算回路1では、−例として入力端子10
1から入力した信号5l(t)はそのまま出力端子10
5に出力され、入力端子102から入力した信号52(
t)は、可変利得増幅器6で振幅を増幅され、可変移相
器7で位相を制御され、信号S’2(t)として出力端
子106に出力される。
FIG. 1 is a block diagram of a receiver according to the present invention. In this figure, 1 is a complex multiplication circuit, and the complex multiplication circuit 1 connects two receiving antennas 2.3 through input terminals 101.102.
Equipped with Receiving antennas 2 and 3 each receive a signal s+(t
), 52(t). Further, control signals α(t) and β(1) are inputted to input terminals 103 and 104 from the subtraction circuit 4.5, respectively. Such a complex multiplication circuit 1 is realized, for example, as shown in FIG. In FIG. 2, 6 is a variable gain amplifier, 7 is a variable phase shifter, the control signal α(1) is input to the variable gain amplifier 6, and the control signal β(1) is input to the variable phase shifter 7. . In the complex multiplication circuit 1 configured in this way, - for example, the input terminal 10
The signal 5l(t) input from 1 is sent to the output terminal 10 as it is.
The signal 52 (
t) is amplified in amplitude by the variable gain amplifier 6, its phase is controlled by the variable phase shifter 7, and outputted to the output terminal 106 as the signal S'2(t).

従ってこの場合には信号52(t )の振幅及び位相が
制御信号α(t)、β(1)によって制御され、これに
より信号S+(t)と52(t)の振幅及び位相の関係
が制御されることになる。
Therefore, in this case, the amplitude and phase of the signal 52(t) are controlled by the control signals α(t) and β(1), which controls the relationship between the amplitude and phase of the signals S+(t) and 52(t). will be done.

複素乗算回路1から出力された信号5l(t)。A signal 5l(t) output from the complex multiplication circuit 1.

S’2(t)は信号合成回路8に入力され、ここで合成
され、信号Z(t)が出力される。この出力信号Z(t
)はFM受信回路9及び2乗検波回路10に与えられる
。信号Z(t)の一部はFM受信回路9を通った後受信
信号として出力端子11に取出される。また信号2(1
)の一部は2乗検波回路10によって検波出力信号D(
t)として取出され、この信号D(t)はその後2つに
分岐され、低域通過フィルタ12と高域通過フィルタ1
3に入力される。低域通過フィルタ12によって得られ
た信号L(t)は除算回路14に直接入力される。高域
通過フィルタ13によって得られた信号は2乗検波回路
15を通って信号H(t)となり、その後加算回路16
において入力端子17より与えられるレベルε0の直流
信号と加算された後に除算回路14に入力される。除算
回路14からは なる出力信号C(t)が出力される。
S'2(t) is input to the signal synthesis circuit 8, where it is synthesized and a signal Z(t) is output. This output signal Z(t
) is given to the FM receiving circuit 9 and the square law detection circuit 10. A part of the signal Z(t) passes through the FM receiving circuit 9 and is then outputted to the output terminal 11 as a received signal. Also, signal 2 (1
) is output by the square law detection circuit 10 as a detection output signal D(
t), and this signal D(t) is then branched into two, a low-pass filter 12 and a high-pass filter 1.
3 is input. The signal L(t) obtained by the low-pass filter 12 is directly input to the division circuit 14. The signal obtained by the high-pass filter 13 passes through the square-law detection circuit 15 and becomes a signal H(t), and then the adder circuit 16
The signal is added to the DC signal of level ε0 provided from input terminal 17 at , and then input to division circuit 14 . The division circuit 14 outputs an output signal C(t).

18、19は相関回路で、相関回路18には上記C(t
)と低周波発振回路20の出力信号εcosωtが入力
され、相関回路19には上記C(t)と90°移相回路
21の出力信号εsinωtが入力される。低周波発振
回路20と90°移相回路21は低周波信号発生回路2
00を構成する。相関回路18.19は、具体的に例え
ば第3図に示す如(、乗算器22と低域通過フィルタ2
3とループフィルタ24から実現される。
18 and 19 are correlation circuits, and the correlation circuit 18 has the above C(t
) and the output signal ε cos ωt of the low frequency oscillation circuit 20 are input, and the above C(t) and the output signal ε sin ωt of the 90° phase shift circuit 21 are input to the correlation circuit 19 . The low frequency oscillation circuit 20 and the 90° phase shift circuit 21 are the low frequency signal generation circuit 2.
Configure 00. Specifically, the correlation circuits 18 and 19 include a multiplier 22 and a low-pass filter 2, as shown in FIG.
3 and a loop filter 24.

乗算器22は2つの入力端子22a、22bを有し、入
力端子22aには信号C(t)が、入力端子22bには
εcosωを又はεsinωtがそれぞれ入力される。
The multiplier 22 has two input terminals 22a and 22b, and the input terminal 22a receives the signal C(t), and the input terminal 22b receives εcosω or εsinωt, respectively.

相関回路18.19からはそれぞれ信号α。。Signals α from correlation circuits 18 and 19, respectively. .

β。が出力され、前記減算回路4,5に入力される。β. is output and input to the subtraction circuits 4 and 5.

更に減算回路4.5には上記εcO5ωt。Furthermore, the above-mentioned εcO5ωt is applied to the subtraction circuit 4.5.

εsinωtがそれぞれ入力され、この結果前述した如
く制御信号α(t)、β(1)を複素乗算回路1に対し
て出力する。この場合α(t)、β(1)は、α(t)
=α。−εcoswt β(t)=β。−εsinωt と表される。ここで、上記ωは低周波信号の周波数、ε
は小さな正の数(ε(1)である。
ε sin ωt are respectively input, and as a result, control signals α(t) and β(1) are outputted to the complex multiplication circuit 1 as described above. In this case, α(t) and β(1) are α(t)
=α. −εcoswt β(t)=β. −εsinωt. Here, ω above is the frequency of the low frequency signal, ε
is a small positive number (ε(1)).

次に上記構成を有する受信機の動作を回路各部の信号を
数式で゛表わしながら説明する。
Next, the operation of the receiver having the above configuration will be explained while expressing the signals of each part of the circuit using mathematical expressions.

先ず前記受信信号5I(t)、  52(t>は次のよ
うに表わされる。
First, the received signals 5I(t) and 52(t> are expressed as follows.

S、(t)=D+(t)+U+(t)      ・・
・(1)32(t)=D2(t)+tJ2(t)   
    ・・・(2)ここで、Dt(t)、 D2(t
)はそれぞれ受信アンテナ2.3に受信される希望波信
号、u+(t)、 u2(t )は妨害波信号である。
S, (t)=D+(t)+U+(t)...
・(1) 32(t)=D2(t)+tJ2(t)
...(2) Here, Dt(t), D2(t
) are desired wave signals received by the receiving antenna 2.3, and u+(t) and u2(t) are interference wave signals.

Dt(t)、  D2(t)、  u、(t)。Dt(t), D2(t), u,(t).

U2(t)は更に次のように表わされる。U2(t) can be further expressed as follows.

Dt(t) = A、exp (j(ωct+θ(1)
+θ、))・・・(3) D2(t) = A2eXp(j(ωct+θ(1)+
θ2))・・・(4) ’J +  (t)  −B IeXp (J  (ω
ct  + φ (1)  + φ 1) )・・・(
5) U2(t)−B2exp(J(ω。t+φ(1)+φ2
))・・・(6) ここで受信信号はFM変調波であるものと仮定しており
、AI、A2.Bl、B2は振幅、ω。
Dt(t) = A, exp (j(ωct+θ(1)
+θ, ))...(3) D2(t) = A2eXp(j(ωct+θ(1)+
θ2))...(4) 'J + (t) -B IeXp (J (ω
ct + φ (1) + φ 1) )...(
5) U2(t)−B2exp(J(ω.t+φ(1)+φ2
))...(6) Here, it is assumed that the received signal is an FM modulated wave, and AI, A2. Bl and B2 are amplitudes, ω.

は搬送波周波数、θ(t)、φ(1)はそれぞれ希望波
及び妨害波の変調信号で定まる位相信号、θ1゜θ2.
φ1.φ2は位相定数である。上記振幅及び位相定数は
フェージングによってゆるやかに変化する。
is the carrier wave frequency, θ(t) and φ(1) are the phase signals determined by the modulation signals of the desired wave and the interference wave, respectively, and θ1°θ2.
φ1. φ2 is a phase constant. The above amplitude and phase constants change slowly due to fading.

次に複素乗算回路1で振幅と位相の制御を受けた信号S
 ’2(t)は、α(t〉、β(1)によって次のよう
に表わされる。
Next, the signal S whose amplitude and phase are controlled by the complex multiplication circuit 1
'2(t) is expressed by α(t>, β(1)) as follows.

S ’ 2(t) = α(t) (02(t) +U
2(t) ) exp(jβ(t))・・・(7) この結果、信号合成回路8の出力信号2(1)は、z(
t) =S+(t) +s ’ 2(t)= [AIe
xp(Jθ1) 十 α (t)A26XI]  (j(θ 2 + β
 (1ン ))、)exp(jθ(t)) + CB+exp(Jθυ + α(t)B2exp (j(θ2+β(1) ) 
) ]expUφ(t)) ・・・(8) と表わされる。また検波出力信号D(t)は、D(t)
= l 1Ct) + 2 = IA(t)12+ IB(t)12+2 l A(
t) l  l B(t) l cos (φ(1)−
θ(1)十ψ、(t)−ψb(D)・・・(9) となり、ここで、 l A(t) l ”=A、’十α2(t)A2 ’+
2α(t)A、A2cos (θ2−θ1+β(1) 
)・・・(10) l B(t) l 2=8.’+α2(t)L”+2α
(t) BI32CO9(θ2−01+β(t))・・
・(11) ・・・(12) ・・・(13) である。
S' 2(t) = α(t) (02(t) +U
2(t) ) exp(jβ(t))...(7) As a result, the output signal 2(1) of the signal synthesis circuit 8 becomes z(
t) =S+(t) +s' 2(t)=[AIe
xp(Jθ1) 1 α (t)A26XI] (j(θ 2 + β
(1n)), )exp(jθ(t)) + CB+exp(Jθυ + α(t)B2exp (j(θ2+β(1))
)]expUφ(t))...(8) Also, the detection output signal D(t) is D(t)
= l 1Ct) + 2 = IA(t)12+ IB(t)12+2 l A(
t) l l B(t) l cos (φ(1)−
θ(1) ten ψ, (t) − ψb(D)...(9), where l A(t) l ''=A, 'ten α2(t) A2 '+
2α(t)A, A2cos (θ2−θ1+β(1)
)...(10) l B(t) l 2=8. '+α2(t)L''+2α
(t) BI32CO9 (θ2-01+β(t))...
・(11) ...(12) ...(13).

上記検波出力信号D(t)のうち、低周波信号の周波数
が十分に低いものであるとすれば、l A(t) l 
2+l B(t) l 2が低周波信号となり、残りの
21 A(t) l  l B(t) l cos(φ
(1)−θ(1)+ψ、(1)−ψb(t))はFM変
調のために高域まで伸びる信号となる。
Among the detection output signals D(t), if the frequency of the low frequency signal is sufficiently low, l A(t) l
2+l B(t) l 2 becomes the low frequency signal, and the remaining 21 A(t) l l B(t) l cos(φ
(1)-θ(1)+ψ, (1)-ψb(t)) is a signal that extends to the high range due to FM modulation.

従って低域通過フィルタ12の出力信号L(t)は次の
ように近似できる。
Therefore, the output signal L(t) of the low-pass filter 12 can be approximated as follows.

L(U= l A(t) l 2+l B(t) l 
2#A0’+Bo” +2α。εA2 C(A2+AlC03(θ2−θ1+
β。))cosωt−A、sinωt〕 +2α。ε82 C(82+B、C03(θ2−θ、十
β。))cos ωt−B、sin cut) ・・・(14) ここで Ao2=A、2+α。2A2 +2α。A、A2cos(θ2−θ1+β0)・・・(
15) BO”=BI’十α。2B2′ +2α。B、B2cos(θ2−θ1+β。)・・・(
16) である。一方高域通過フィルタ13による信号H(t)
は、 H(t)−l A(t) l 21 B(t) l 2
z A 02 B 02 +2α。εAOB2 C(B2+B+cos(θ2−θ
1+β。))coscc+t−B、sinωt〕 +2α。εBOA2 [: (A2+A、cos(θ2
−θ1+β。))cosωt−A、sinωt〕 ・・・(17) と近似される。
L(U= l A(t) l 2+l B(t) l
2#A0'+Bo" +2α.εA2 C(A2+AlC03(θ2-θ1+
β. )) cosωt−A, sinωt] +2α. ε82 C(82+B, C03(θ2-θ, ten β.))cos ωt-B, sin cut)...(14) Here, Ao2=A, 2+α. 2A2 +2α. A, A2cos(θ2-θ1+β0)...(
15) BO"=BI'10α.2B2'+2α.B,B2cos(θ2-θ1+β.)...(
16). On the other hand, the signal H(t) generated by the high-pass filter 13
is H(t)-l A(t) l 21 B(t) l 2
z A 02 B 02 +2α. εAOB2 C(B2+B+cos(θ2−θ
1+β. )) coscc+t-B, sinωt] +2α. εBOA2 [: (A2+A, cos(θ2
−θ1+β. )) cosωt−A, sinωt] (17) It is approximated as follows.

上記の如くして得られるL(t)、 H(t)によって
除算回路14の出力信号C(t)は次のように近似され
る。
The output signal C(t) of the division circuit 14 is approximated as follows using L(t) and H(t) obtained as described above.

ζ      [A、”+80” Ao” +80’ +2α。εAOB2 (B、□cosa+t−B、si
nωt)+2αoEBoA2(A+2C(lsaJt−
A、5incut)・・・(18) ここで、 Al1 =A2 +A、cos(θ2−θ1+β。) 
   ・・・(19)B12 =82+B、cos(θ
2−θ1+β。)    ・・・(20)である。
ζ [A, "+80"Ao"+80' +2α. εAOB2 (B, □cosa+t-B, si
nωt)+2αoEBoA2(A+2C(lsaJt-
A, 5 incut)...(18) Here, Al1 = A2 + A, cos(θ2-θ1+β.)
...(19)B12 =82+B, cos(θ
2-θ1+β. )...(20).

以上の如くして得られた信号C(t)を相関回路18.
19に入力し、低周波信号jcosωを及びεsinω
tとの相関をとる。信号C(t)とεcosωtの相関
信号Cc、信号C(t)とεsinωtの相関信号Cs
は次のように与えられる。
The signal C(t) obtained as above is sent to the correlation circuit 18.
19 and input the low frequency signals jcosω and εsinω
Correlate with t. Correlation signal Cc between signal C(t) and εcosωt, correlation signal Cs between signal C(t) and εsinωt
is given as follows.

・・・(21) ・・・(22) 上記において、相関信号Cc及びCsは、それぞれ信号
C(t)のα(1)及びβ(1)に対するα。
...(21) ...(22) In the above, the correlation signals Cc and Cs are α for α(1) and β(1) of the signal C(t), respectively.

及びβ。付近における偏微分係数であって、その符号を
逆にしたものを表わしている。信号c < t > ハ
、β。の関数として概略第4図に示す如く下方に凸にな
った形をしており、極小値を与えるβ。が存在する。β
。がβっよりも大きいか、小さいかによって偏微分係数
の符号が異なり、信号Csをループフィルタ24に入力
することによって、制御信号β0は徐々に最適値β。に
近付づく。同様にしてα。
and β. It represents the partial differential coefficient in the vicinity, with its sign reversed. Signal c < t > Ha, β. As a function of β, it has a downwardly convex shape as roughly shown in FIG. 4, and gives a minimum value. exists. β
. The sign of the partial differential coefficient differs depending on whether Cs is larger or smaller than β, and by inputting the signal Cs to the loop filter 24, the control signal β0 gradually reaches the optimum value β. approach. Similarly, α.

の値も最適値αイに近づく。予め定められた直流信号ε
。の値を十分率さい値に設定すれば、α。及びβ0が最
適値に近づくにつれて、Ao’ Bo’は零、すなわち
八〇又はB。は零に近づく。このA。及びBoは、定義
式(15)、  (16)から明らかなように、それぞ
れ(8)式に示された希望波(第1項)の振幅の2乗及
び妨害波(第2項)の振幅の2乗を表わしている。従っ
て、ε。の値が十分に小さいときには、信号合成回路8
の出力信号Z(t)において、妨害波又は希望波が打消
される。この結果FM受信回路9の出力端子11におい
て、妨害波が存在するときにはこの妨害波を抑圧して、
希望波のみが出力される。なお妨害波を打消した場合に
は問題はないが、希望波を打消した場合にはシステムを
強制的に他の状態に変化させる手段が必要となる。
The value of also approaches the optimal value αi. Predetermined DC signal ε
. If the value of is set to a sufficiently small value, α. and as β0 approaches the optimum value, Ao'Bo' becomes zero, that is, 80 or B. approaches zero. This A. As is clear from definitions (15) and (16), Bo are the square of the amplitude of the desired wave (first term) and the amplitude of the interfering wave (second term) shown in equation (8), respectively. It represents the square of . Therefore, ε. When the value of is sufficiently small, the signal synthesis circuit 8
In the output signal Z(t) of , the interfering wave or the desired wave is canceled. As a result, at the output terminal 11 of the FM receiving circuit 9, when an interference wave exists, this interference wave is suppressed,
Only the desired wave is output. There is no problem if the interfering waves are canceled, but if the desired waves are canceled, a means for forcibly changing the system to another state is required.

そのためには、従来知られているように位相制御量β。For this purpose, as is conventionally known, the phase control amount β is required.

の符号を反転させるのが最も有効な方法である。The most effective method is to invert the sign of .

妨害波が存在しない場合、すなわちBl=82−B0=
81゜=Oの場合には(21)式、(22)式はかっこ
の中の第3項を除いて零になる。このとき、信号Cc、
Csは(15)式で与えられるA。′のα。
When there is no interference wave, that is, Bl=82-B0=
When 81°=O, equations (21) and (22) become zero except for the third term in parentheses. At this time, the signal Cc,
Cs is A given by equation (15). α of ′.

及びβ。における偏微分係数の符号を反転したものとな
り、最適値αヨ、β6はA。′を最大にする。
and β. The sign of the partial differential coefficient at is reversed, and the optimal values α, β6 are A. ′ is maximized.

A02を最大にするということは、(8)式の第1項で
表わされる希望波に関し2つの受信アンテナ2.3で受
信された信号を少なくとも同相合成することを意味する
。なお定数ε。を零にすると、妨害波が打消された場合
(A、’B、”= 0)、(21)式及び(22)式に
おける第3項も零になり、同相合成するための制御力が
零になって本発明の目的を達成することができない。
Maximizing A02 means at least in-phase combining the signals received by the two receiving antennas 2.3 regarding the desired wave expressed by the first term of equation (8). Note that the constant ε. When the interference waves are canceled (A, 'B, "= 0), the third term in equations (21) and (22) also becomes zero, and the control force for in-phase synthesis becomes zero. Therefore, the object of the present invention cannot be achieved.

以上に延べたように、評価関数の最小値を求めるだめに
正弦波状の微小信号を重畳して相関を求める方法は、摂
動法として知られている。摂動信号の周波数ωは、アナ
ログ音声信号の場合には1001(zから200 )1
zに設定するのが望ましい。この値は、移動通信で通常
中じるフェージング周波数は数10七になるので、これ
よりも高いという条件と、音声の下限帯域である300
七よりも低いという条件より定められる。
As described above, the method of determining the correlation by superimposing a sinusoidal minute signal in order to determine the minimum value of the evaluation function is known as the perturbation method. The frequency ω of the perturbation signal is 1001(z to 200)1 for analog audio signals.
It is desirable to set it to z. The fading frequency that normally occurs in mobile communications is several tens of thousands, so this value must be higher than this, and the lower limit of the audio frequency band is 300.
It is determined by the condition that it is lower than seven.

また上記実施例では、高域通過フィルタ13によって周
波数ωの信号成分は十分に減衰できると仮定したが、こ
れが満足されないときには高域通過フィルタ13に併せ
て周波数ωの帯域阻止フィルタを設けることが望ましい
Further, in the above embodiment, it is assumed that the signal component of the frequency ω can be sufficiently attenuated by the high-pass filter 13, but if this is not satisfied, it is desirable to provide a band rejection filter of the frequency ω in addition to the high-pass filter 13. .

〔発明の効果〕〔Effect of the invention〕

以上の説明で明らかなように本発明によれば、ダイパー
シティ−受信技術と干渉抑圧技術を組合せ、希望波に対
して妨害波が存在するときには妨害波を打消して希望波
のみを取り出すと共に、妨害波が存在しないときには2
つの受信アンテナからの希望波につき同相合成ダイパー
シティ受信を行うように構成したため、移動通信の受信
機として利用すれば極めて高い性能を発揮するという効
果がある。
As is clear from the above description, according to the present invention, diversity reception technology and interference suppression technology are combined, and when interference waves exist with respect to the desired wave, the interference waves are canceled and only the desired wave is extracted. 2 when there is no interference
Since it is configured to perform in-phase composite diversity reception on desired waves from two receiving antennas, it has the effect of exhibiting extremely high performance when used as a mobile communication receiver.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る受信機の構成を示すブロック図、 第2図は複素乗算回路の具体的構成を示すブロック図、 第3図は相関回路の具体的構成を示すブロック図、 第4図は動作を説明するための概念図である。 1−       複素乗算回路 2.3 ・・・・・・・・・  受信アンテナ4.5 
・・・・・・・・・  減算回路8   ・・・・・・
・・・  信号合成回路9   ・・・・・・・・・ 
 FM受信回路10       2乗検波回路 12      ・・  低域通過フィルタ13   
 ・・・・・・・・・  高域通過フィルタ14   
 ・・・・・・・・・  除算回路16    ・・・
・・・・・・  加算回路18.19  ・・・・・・
・・・  相関回路200      ・・  低周波
信号発生回路代理人 弁理士  岩 佐 義 幸 S+ (t)      52(t) S′2(t)’ 第2図 第3図
1 is a block diagram showing the configuration of a receiver according to the present invention; FIG. 2 is a block diagram showing a specific configuration of a complex multiplication circuit; FIG. 3 is a block diagram showing a specific configuration of a correlation circuit; The figure is a conceptual diagram for explaining the operation. 1- Complex multiplication circuit 2.3 ...... Receiving antenna 4.5
・・・・・・・・・ Subtraction circuit 8 ・・・・・・
・・・ Signal synthesis circuit 9 ・・・・・・・・・
FM receiving circuit 10 Square-law detection circuit 12 ... Low-pass filter 13
...... High pass filter 14
・・・・・・・・・ Division circuit 16 ・・・
・・・・・・Addition circuit 18.19 ・・・・・・
... Correlation circuit 200 ... Low frequency signal generation circuit agent Patent attorney Yoshiyuki Iwasa S+ (t) 52 (t) S'2 (t)' Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] (1)第1及び第2の受信アンテナと、この第1及び第
2の受信アンテナの少なくとも一方に接続され、制御信
号によって前記第1及び第2の受信アンテナの受信信号
の間の振幅及び位相の関係を制御し、2つの出力信号を
出力する複素乗算回路と、この複素乗算回路の2つの出
力信号を合成する信号合成回路と、この信号合成回路の
出力の一部を入力して復調を行う受信回路と、前記信号
合成回路の出力の一部を入力する2乗検波回路と、この
2乗検波回路の出力をそれぞれ入力する高域通過フィル
タ及び低域通過フィルタと、前記高域通過フィルタより
得られる出力信号に直流信号を加えて成る信号を前記低
域通過フィルタの出力信号で除算する除算回路と、直交
する第1及び第2の低周波信号を発生する低周波信号発
生回路と、前記除算回路の出力信号と前記第1の低周波
信号の相関を求める第1の相関回路と、前記除算回路の
出力信号と前記第2の低周波信号の相関を求める第2の
相関回路と、前記第1の相関回路の出力信号から前記第
1の低周波信号を減算して得た信号を前記制御信号とし
て前記複素乗算回路へ出力する第1の減算回路と、前記
第2の相関回路の出力信号から前記第2の低周波信号を
減算して得た信号を前記制御信号として前記複素乗算回
路へ出力する第2の減算回路とから成ることを特徴とす
るアダプティブアンテナ受信機。
(1) first and second receiving antennas, and the amplitude and phase between the received signals of the first and second receiving antennas connected to at least one of the first and second receiving antennas according to a control signal; A complex multiplication circuit that controls the relationship between a square-law detection circuit that inputs a part of the output of the signal synthesis circuit; a high-pass filter and a low-pass filter that input the outputs of the square-law detection circuit, respectively; and the high-pass filter. a division circuit that divides a signal obtained by adding a DC signal to an output signal obtained by the low-pass filter by the output signal of the low-pass filter; a low-frequency signal generation circuit that generates orthogonal first and second low-frequency signals; a first correlation circuit that determines the correlation between the output signal of the division circuit and the first low frequency signal; a second correlation circuit that determines the correlation between the output signal of the division circuit and the second low frequency signal; a first subtraction circuit that outputs a signal obtained by subtracting the first low frequency signal from the output signal of the first correlation circuit to the complex multiplication circuit as the control signal; and a second subtraction circuit that outputs a signal obtained by subtracting the second low frequency signal from the output signal to the complex multiplication circuit as the control signal.
JP60188536A 1985-08-29 1985-08-29 Adaptive antenna receiver Expired - Lifetime JPH0669152B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60188536A JPH0669152B2 (en) 1985-08-29 1985-08-29 Adaptive antenna receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60188536A JPH0669152B2 (en) 1985-08-29 1985-08-29 Adaptive antenna receiver

Publications (2)

Publication Number Publication Date
JPS6249727A true JPS6249727A (en) 1987-03-04
JPH0669152B2 JPH0669152B2 (en) 1994-08-31

Family

ID=16225420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60188536A Expired - Lifetime JPH0669152B2 (en) 1985-08-29 1985-08-29 Adaptive antenna receiver

Country Status (1)

Country Link
JP (1) JPH0669152B2 (en)

Also Published As

Publication number Publication date
JPH0669152B2 (en) 1994-08-31

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