JPS6249718B2 - - Google Patents

Info

Publication number
JPS6249718B2
JPS6249718B2 JP17271081A JP17271081A JPS6249718B2 JP S6249718 B2 JPS6249718 B2 JP S6249718B2 JP 17271081 A JP17271081 A JP 17271081A JP 17271081 A JP17271081 A JP 17271081A JP S6249718 B2 JPS6249718 B2 JP S6249718B2
Authority
JP
Japan
Prior art keywords
gate
ballast
discharge lamp
voltage
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17271081A
Other languages
Japanese (ja)
Other versions
JPS5875797A (en
Inventor
Toshio Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Lighting Ltd
Original Assignee
Hitachi Lighting Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Lighting Ltd filed Critical Hitachi Lighting Ltd
Priority to JP17271081A priority Critical patent/JPS5875797A/en
Publication of JPS5875797A publication Critical patent/JPS5875797A/en
Publication of JPS6249718B2 publication Critical patent/JPS6249718B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は、ピーク値を必要とする位相制御装置
に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase control device that requires a peak value.

従来制御方式を第1図に、その各部波形を第2
図に示す。
The conventional control system is shown in Figure 1, and the waveforms of each part are shown in Figure 2.
As shown in the figure.

この方式は、電源と同期してある時間後taに、
ゲート信号発生回路より、第2図に示す、点弧パ
ルス9を出して、トライアツク2を導通し安定器
に10の電圧を印加して、放電灯を調光する。しか
し、点弧角が90゜を越えると、安定器に印加され
る電圧が、10のtb後の波形で示す様に電圧のピー
フ値が△Vだけ低下する。一般に放電灯は高いラ
ンプ再点弧電圧が必要の為、電圧のピーク値が低
下してくると安定な放電を維持することが出来な
くなり、チラツキが発生したり、立消えたりす
る。
This method synchronizes with the power supply and after a certain time ta,
The gate signal generating circuit outputs the ignition pulse 9 shown in FIG. 2, conducts the triac 2, applies a voltage of 10 to the ballast, and dims the discharge lamp. However, when the firing angle exceeds 90°, the voltage applied to the ballast decreases by ΔV in peak value, as shown in the waveform after 10 tb. Discharge lamps generally require a high lamp restriking voltage, so when the peak voltage value decreases, it becomes impossible to maintain a stable discharge, causing flickering or extinguishing.

点弧角が90゜以下の場合、ランプ電流が零にな
つてから、電圧が印加するまでの時間が短い為、
放電灯内の熱電子の残存により再点弧電圧が比較
的低くてすむので安定な放電を維持している。
If the firing angle is 90° or less, the time from when the lamp current becomes zero until the voltage is applied is short, so
Due to the residual thermoelectrons within the discharge lamp, the restriking voltage can be relatively low, thereby maintaining stable discharge.

本発明の目的は、安定な放電灯の調光を行うこ
とにある。
An object of the present invention is to perform stable dimming of a discharge lamp.

本発明は、調光を行う安定器に印加する電圧の
実効値が低下しても、放電灯には常にピーク電圧
を追加させて安定制御するものである。
According to the present invention, even if the effective value of the voltage applied to the ballast that performs dimming decreases, a peak voltage is always added to the discharge lamp to perform stable control.

本発明の実施例を第3図に、各部波形を第4図
に示す。
An embodiment of the present invention is shown in FIG. 3, and waveforms of various parts are shown in FIG. 4.

本制御回路は、交流電源12と安定器16の間
に全波整流器13を通してゲートタンオフサイリ
スタ14をもちいて位相制御を行うものである。
主制御素子であるゲートタンオフサイリスタ14
の特性は、ゲートに順方向パルスを印加すると導
通し、逆に、ゲートに逆バイアスパルスを印加す
ると通電電流をしや断して非導通になる。ゲート
信号発生回路は、位相角90゜を中心にして、それ
以前の位相角で順方向のパルスを、90゜以後の位
相角で逆方向のパルスを印加する。回路動作は、
交流電源20の零電位からt0後に順方向パルス2
1を印加すると、ゲートタンオフサイリスター1
4が導通し、全波整流器13を通して安定器16
に電圧が印加される。導通後、位相角90゜経過し
てtd後に、逆方向ゲートパルスを印加すると、ゲ
ートタンオフサイリスタ14は非導通になり、安
定器16には、波形22の電圧が印加される。安
定器16の入力電圧を低くして調光するには、点
弧位相をtcより長くtfにし、しや断位相もtdから
短かくしてtgにする。この為、位相角90゜の最も
交流電源12の最大値の電圧vpが常に印加され
ることにより、放電灯19が安定に放電維持す
る。
This control circuit performs phase control using a gate turn-off thyristor 14 that is passed through a full-wave rectifier 13 between an AC power supply 12 and a ballast 16.
Gate turn-off thyristor 14 which is the main control element
The characteristic of the gate is that it becomes conductive when a forward pulse is applied to the gate, and conversely, when a reverse bias pulse is applied to the gate, the conduction current is cut off and the gate becomes non-conductive. The gate signal generation circuit applies a pulse in the forward direction at a phase angle before 90 degrees, and a pulse in the reverse direction at a phase angle after 90 degrees. The circuit operation is
Forward pulse 2 after t 0 from zero potential of AC power supply 20
1, gate turn-off thyristor 1
4 conducts and passes through the full-wave rectifier 13 to the ballast 16
A voltage is applied to. After conduction, when a reverse gate pulse is applied after a phase angle of 90° and td, the gate turn-off thyristor 14 becomes non-conductive and a voltage of waveform 22 is applied to the ballast 16. To dim the light by lowering the input voltage of the ballast 16, the ignition phase is set to tf, which is longer than tc, and the ignition phase is also set to tg, which is shorter than td. Therefore, the discharge lamp 19 maintains stable discharge by constantly applying the maximum voltage vp of the AC power source 12 with a phase angle of 90 degrees.

従つて、放電灯の調光を安定にする効果があ
る。
Therefore, it has the effect of stabilizing the dimming of the discharge lamp.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来制御回路図、第2図は、従来回
路の各部波形図、第3図は、本発明の制御回路
図、第4図は、ゲートパルス波形図である。 13……全波整流器、14……ゲートタンオフ
サイリスタ、15……ゲート信号発生回路、16
……安定器、17……コンデンサ、18……フイ
ラメントコイル、19……放電灯。
FIG. 1 is a conventional control circuit diagram, FIG. 2 is a waveform diagram of various parts of the conventional circuit, FIG. 3 is a control circuit diagram of the present invention, and FIG. 4 is a gate pulse waveform diagram. 13...Full-wave rectifier, 14...Gate turn-off thyristor, 15...Gate signal generation circuit, 16
... Ballast, 17... Capacitor, 18... Filament coil, 19... Discharge lamp.

Claims (1)

【特許請求の範囲】[Claims] 1 交流電源と、この電源に接続される放電灯及
び安定器と、安定器と電源の間に位相制御回路を
設け、位相制御回路の主制御素子には、ゲートタ
ンオフサイリスタを用い、そのゲート信号発生回
路は、位相角90゜を中心にして、0〜90゜の間で
点弧パルスを出して導通し、90゜〜180゜の間で
ターンオフゲートパルスを印加して非導通にし
て、導通角を制御することを特徴とする放電灯調
光装置。
1. An AC power source, a discharge lamp and a ballast connected to this power source, and a phase control circuit between the ballast and the power source; a gate turn-off thyristor is used as the main control element of the phase control circuit; The signal generation circuit is centered around a phase angle of 90°, outputs a firing pulse between 0 and 90° to conduct, and applies a turn-off gate pulse between 90° and 180° to make it non-conductive. A discharge lamp dimmer characterized by controlling a conduction angle.
JP17271081A 1981-10-30 1981-10-30 Device for dimming discharge lamp Granted JPS5875797A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17271081A JPS5875797A (en) 1981-10-30 1981-10-30 Device for dimming discharge lamp

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17271081A JPS5875797A (en) 1981-10-30 1981-10-30 Device for dimming discharge lamp

Publications (2)

Publication Number Publication Date
JPS5875797A JPS5875797A (en) 1983-05-07
JPS6249718B2 true JPS6249718B2 (en) 1987-10-21

Family

ID=15946899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17271081A Granted JPS5875797A (en) 1981-10-30 1981-10-30 Device for dimming discharge lamp

Country Status (1)

Country Link
JP (1) JPS5875797A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0496022U (en) * 1991-01-14 1992-08-20
JPH06160123A (en) * 1992-11-13 1994-06-07 Nippon Seiki Co Ltd Display panel with el

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097599A (en) * 1983-11-02 1985-05-31 アレツクス工業株式会社 Device for dimming discharge lamp

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0496022U (en) * 1991-01-14 1992-08-20
JPH06160123A (en) * 1992-11-13 1994-06-07 Nippon Seiki Co Ltd Display panel with el

Also Published As

Publication number Publication date
JPS5875797A (en) 1983-05-07

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