JPS6241388U - - Google Patents
Info
- Publication number
- JPS6241388U JPS6241388U JP13128985U JP13128985U JPS6241388U JP S6241388 U JPS6241388 U JP S6241388U JP 13128985 U JP13128985 U JP 13128985U JP 13128985 U JP13128985 U JP 13128985U JP S6241388 U JPS6241388 U JP S6241388U
- Authority
- JP
- Japan
- Prior art keywords
- current
- command
- current command
- excess
- high frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims 1
- 239000003990 capacitor Substances 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000005070 sampling Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
Description
第１図は実施例のブロツク線図、第２図はその
動作を説明するためのタイムチヤート、第３図は
インバータ主回路ブロツク線図、第４図はインバ
ータ出力電圧、電流の無負荷時、負荷時の位相関
係を示すタイムチヤートである。
３……微分／タイミング信号発生回路、４……
サンプルホールド回路、５……比較増幅回路。
Fig. 1 is a block diagram of the embodiment, Fig. 2 is a time chart for explaining its operation, Fig. 3 is a block diagram of the inverter main circuit, and Fig. 4 shows the inverter output voltage and current at no load. This is a time chart showing the phase relationship under load. 3...Differential/timing signal generation circuit, 4...
Sample hold circuit, 5...comparison amplifier circuit.
Claims (1)
サＣを接続してなるＬＣＲの直列共振回路を駆動
する直列共振形の高周波トランジスタインバータ
において、トランジスタのスイツチング時の電流
を検出する手段と、この検出電流をサンプルホー
ルドする手段と、このホールド値が予じめの設定
値を超えたときその超過分に応じて出力を生成す
る比較増幅手段、を備え、この超過分に対応の出
力を電流マイナループの指令として電圧制御系か
らの正規の電流指令とは極性を逆にして加え電流
指令を減少するようにしたことを特徴とする高周
波インバータの制御装置。 In a series resonant type high frequency transistor inverter that drives an LCR series resonant circuit formed by connecting a capacitor C to a series load consisting of a reactor L and a resistor R, there is provided a means for detecting a current during switching of a transistor, and a means for detecting the detected current. It is equipped with means for sampling and holding, and a comparison amplification means for generating an output according to the excess when this hold value exceeds a preset value, and output corresponding to the excess as a command for the current minor loop. A control device for a high frequency inverter, characterized in that the current command is reduced by adding a current command with the polarity reversed from that of a regular current command from a voltage control system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13128985U JPS6241388U (en) | 1985-08-28 | 1985-08-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13128985U JPS6241388U (en) | 1985-08-28 | 1985-08-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6241388U true JPS6241388U (en) | 1987-03-12 |
Family
ID=31029603
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13128985U Pending JPS6241388U (en) | 1985-08-28 | 1985-08-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6241388U (en) |
-
1985
- 1985-08-28 JP JP13128985U patent/JPS6241388U/ja active Pending
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