JPS6240810A - Transmission/reception branching filter - Google Patents
Transmission/reception branching filterInfo
- Publication number
- JPS6240810A JPS6240810A JP18134185A JP18134185A JPS6240810A JP S6240810 A JPS6240810 A JP S6240810A JP 18134185 A JP18134185 A JP 18134185A JP 18134185 A JP18134185 A JP 18134185A JP S6240810 A JPS6240810 A JP S6240810A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- receiving
- frequency
- terminal
- tuned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Motors That Do Not Use Commutators (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、送信及び受信(以下、送・受信という)で互
いに異る信号周波数を使用することにより送・受信の信
号を互いに分離し、例えば送・受信共用アンテナに使用
される送信及び受信信号の分波器(送・受分波器と略称
する)に関し、特に送信信号電力が大きい大電力用の送
e受分波器に関する。Detailed Description of the Invention (Industrial Application Field) The present invention separates transmitted and received signals from each other by using different signal frequencies for transmission and reception (hereinafter referred to as transmission and reception). For example, the present invention relates to a duplexer for transmitting and receiving signals (hereinafter referred to as a transmitting/receiving duplexer) used in a shared transmitting/receiving antenna, and particularly to a transmitting/receiving duplexer for use with large power transmission signals.
(従来の技術)
従来、この種の送・受分波器は、第2図の等何回路に示
す如く、送信信号の入力端子TX(以下単に入力端子T
Xと−5)から、送信信号の出力及び受信信号の入力を
同時に行う共通端子ANT(以下、単に共通端千人NT
という)に至る送信信号経路に仲、送信信号周波数に同
調した帯域通過濾波器11を配し、かつ、共通端子AN
Tから受信信号の出力端子RX(以下、単に出力端子R
Xという)に至る受信信号経路には受信信号周波数に同
調した帯域通過r波器12を配している。(Prior Art) Conventionally, this type of transmitter/receiver duplexer has a transmission signal input terminal TX (hereinafter simply input terminal T), as shown in the circuit shown in FIG.
X and -5), the common terminal ANT (hereinafter simply referred to as common terminal ANT) that simultaneously outputs the transmit signal and inputs the receive signal
A bandpass filter 11 tuned to the transmission signal frequency is arranged in the transmission signal path leading to the common terminal AN.
T to output terminal RX of the received signal (hereinafter simply referred to as output terminal R)
A bandpass r-wave generator 12 tuned to the received signal frequency is disposed on the received signal path leading to the received signal (referred to as X).
第2図において、入力端子TXに入力された送倍信号は
、帯域通過濾波器11を通過し、共通端子ANTから出
力される。こ0送信信号に対して、受信信号周波数に同
調した帯域通過濾波器12は、開放特性を示すため、送
信信号は、出力端子T(Xには出力されず、全て共通端
子ANTから出力される。一方、共通端子ANTに入力
された受信信号は、帯域通過濾波器12を通過し、出力
端子源から出力される。この受信信号に対して、送信信
号周波数に同調した帯域通過P波器11は、開放特性を
示すため、受信信号は入力端子TXには出力されず、全
て出力端子RXから出力される。In FIG. 2, the multiplied signal input to the input terminal TX passes through the bandpass filter 11 and is output from the common terminal ANT. For this 0 transmission signal, the bandpass filter 12 tuned to the reception signal frequency exhibits an open characteristic, so the transmission signal is not output to the output terminal T (X, but is output from the common terminal ANT). On the other hand, the received signal input to the common terminal ANT passes through the band pass filter 12 and is output from the output terminal source. shows an open characteristic, so the received signal is not output to the input terminal TX, but is entirely output from the output terminal RX.
ここで、第2図にも示すように、一般に、帯域通過濾波
器11は、インダクタL2及びキャパシタC2の直列共
振回路で等価的に示され、キャパシタC2の両端子に発
生する電圧は、帯域通過濾波器11の共振周波数におい
て、通過信号電圧のQL倍になることが知られている。Here, as shown in FIG. 2, the bandpass filter 11 is generally equivalently represented by a series resonant circuit of an inductor L2 and a capacitor C2, and the voltage generated at both terminals of the capacitor C2 is bandpass filter 11. It is known that the resonance frequency of the filter 11 is QL times the passing signal voltage.
ここでQLは、帯域通過P波器11の通過帯域周波数幅
から決まる値であり、一般に、10乃至100の値にな
る。Here, QL is a value determined from the passband frequency width of the bandpass P-wave device 11, and generally takes a value of 10 to 100.
従って、キャパシタC2は、入力端子’T’XK入力す
る送信信号電圧の1o乃至100倍の耐電圧性能をもっ
たものでなければならない。Therefore, the capacitor C2 must have a withstand voltage performance of 10 to 100 times the transmission signal voltage inputted to the input terminal 'T'XK.
(発明が解決しようとする問題点)
しかし、耐電圧性能が高いキャパシタC2は、寸法が大
きいから、入力端子TXrこ大電力の送信信号を入力す
る送・受分波器では、送・受分波器の寸法が非常に大き
くなるという欠点があった。(Problem to be Solved by the Invention) However, since the capacitor C2 with high withstand voltage performance is large in size, the input terminal TXr is not suitable for transmitting and receiving signals in a transmitter/receiver duplexer that inputs a high power transmission signal. There was a drawback that the size of the corrugator became very large.
そこで、本発明の目的は、耐電圧性能が大きいキャパシ
タC2を使用することなく、大電力の送信信号を入力で
きる小型の送・受分波器を提供することにある。Therefore, an object of the present invention is to provide a small transmitting/receiving/receiving duplexer that can input a high power transmission signal without using the capacitor C2 having high withstand voltage performance.
(問題点を解決するだめの手段)
本発明による送・受分波器は、入力端子TXから共通端
子ANTに至る送信信号経路には、受信信号周波数に同
調した帯域阻止濾波器を設け、かつ共通端子ANTから
出力端子RXに主る受信信号経路には、受信信号周波数
に同調した帯域通過濾波器を設けて藝る。(Means for Solving the Problem) The transmitter/receiver duplexer according to the present invention is provided with a band-elimination filter tuned to the reception signal frequency in the transmission signal path from the input terminal TX to the common terminal ANT, and The main receiving signal path from the common terminal ANT to the output terminal RX is provided with a bandpass filter tuned to the receiving signal frequency.
(実施例) 本発明について、図面を参照l〜て説明する。(Example) The present invention will be described with reference to the drawings.
第1図は、本発明の一実施例を示す送・受分波器の等価
回路図である、。FIG. 1 is an equivalent circuit diagram of a transmitting/receiving duplexer showing an embodiment of the present invention.
第1図において、入力端子TXに入力された送信信号は
、帯域阻止濾波器1を通過し、共通端子ANTから出力
される。ここで、帯域阻止f4波器1け受信信号周波数
に同調しており、これと異なる周波数である送信信号に
対しては、短絡特性を示すから、送tg信号は減衰する
ことなく、帯域阻止濾波器1を通過する。また、帯域通
過濾波器2は、受(3信号周波数に同調しており、これ
と異なる周波数である送信信号に対しては、開放特性を
示すから、送信信号は、出力端子RXには出力されず、
全て、共通端子ANTから出力される。一方、共通端子
A’NTV′c入力された受信信号は、受信信号周波数
に同調した帯域通過濾波器2を通過し、出力端子RXか
ら出力される。ここで、帯域阻止P波器1は、受信信号
周波数に同調しており、受信・信号に対して開放%性を
示すため、受信信号は、入力端子Txには出力されず、
全て、出力端子R’Xから出力される。In FIG. 1, a transmission signal input to an input terminal TX passes through a band-elimination filter 1 and is output from a common terminal ANT. Here, the band-elimination F4 wave filter is tuned to the frequency of the received signal, and exhibits short-circuit characteristics for the transmission signal with a different frequency, so the transmitted T-G signal is not attenuated and is filtered through the band-elimination filter. Pass through vessel 1. Furthermore, since the bandpass filter 2 is tuned to the reception (3 signal frequency) and exhibits an open characteristic for a transmission signal having a frequency different from this, the transmission signal is not output to the output terminal RX. figure,
All are output from the common terminal ANT. On the other hand, the received signal inputted to the common terminal A'NTV'c passes through a bandpass filter 2 tuned to the frequency of the received signal, and is output from the output terminal RX. Here, the band-elimination P-wave device 1 is tuned to the received signal frequency and exhibits openness to the received signal, so the received signal is not output to the input terminal Tx,
All are output from the output terminal R'X.
ところで、第1図にも示すように、一般に、帯域阻止濾
波器1は、インダクタL1及びキャパシタC1の並列共
振回路で等価的に示される。ここで、入力端子TXへの
送信信号入力によってキャパシタC1の両端子に発生す
る電圧は、帯域阻止濾波器1が、送信信号周波数に同調
していないため殆んど無い。By the way, as shown in FIG. 1, the band-elimination filter 1 is generally equivalently represented by a parallel resonant circuit including an inductor L1 and a capacitor C1. Here, there is almost no voltage generated across both terminals of the capacitor C1 due to the transmission signal input to the input terminal TX because the band-elimination filter 1 is not tuned to the transmission signal frequency.
即ち、入力端子TXに大電力の送信信号を入力する場合
でも、キャパシタC1の両端子に発生する電圧は、十分
小さく、従って、耐電圧性能が低い小型のキャパシタC
1を用いて送・受分波器を構成できる。That is, even when a high-power transmission signal is input to the input terminal TX, the voltage generated across both terminals of the capacitor C1 is sufficiently small, and therefore a small capacitor C with low withstand voltage performance is used.
1 can be used to configure a transmitter/receiver duplexer.
なお、以上の説明においては、説明を判り易くするだめ
に、集中定数のインダクタ丁41及びキャパシタCIを
用いた送・受分波器を例に示しているが、分布定数のイ
ンダクタL1及びキャパシタCIを用いた送−受分波器
についても同様の結果が得られることは、電気回路の理
論上明らかである。In the above explanation, in order to make the explanation easier to understand, a transmission/reception duplexer using a lumped constant inductor L1 and a capacitor CI is shown as an example, but a distributed constant inductor L1 and a capacitor CI are used as an example. It is clear from the theory of electric circuits that similar results can be obtained with a transmitting/receiving duplexer using the following.
(発明の効果)
以上、説明したように、本発明によれば、大電力の送信
信号を入力する送・受分波器においても、低い耐電圧性
能のキャパシタC1を用いて送拳受分波器を構成するこ
とができ、かつ、従来と同様に送信信号と受信信号とを
分離する機能を有するので、送・受分波器を小型にでき
る効果がある。(Effects of the Invention) As described above, according to the present invention, even in a transmitter/receiver/demultiplexer that inputs a high-power transmission signal, the capacitor C1 with low withstand voltage performance is used to transmit, receive, and demultiplex signals. The present invention has the effect of making the transmitter/receiver duplexer smaller because it has the function of separating the transmitting signal and the receiving signal as in the conventional case.
第1図は本発明による送・受分波器の一実施例を示す等
価回路図、第2図は従来の送拳受分波器を示す等価回路
図である。
TX・・・送信信号入力端子、RX・・・受信信号出力
端子、ANT・・・送信信号の出力及び受信信号の入力
を同時に行う共通端子、LL、L2・・・インダクタ、
CLC2・・・キャパシタ、2.IIF 12・・・
帯域通過濾波器、1・・・帯域阻止濾波器。
代理人 弁理士 本 庄 伸 介
第1図FIG. 1 is an equivalent circuit diagram showing an embodiment of a transmitting/receiving duplexer according to the present invention, and FIG. 2 is an equivalent circuit diagram showing a conventional transmitting/receiving duplexer. TX...transmission signal input terminal, RX...reception signal output terminal, ANT...common terminal for simultaneously outputting the transmission signal and inputting the reception signal, LL, L2...inductor,
CLC2...capacitor, 2. IIF 12...
Band-pass filter, 1...band-rejection filter. Agent Patent Attorney Shinsuke Honjo Figure 1
Claims (1)
なる周波数の受信信号の出力端子と、前記送信信号の出
力および前記受信信号の入力を同時に行う共通端子とを
有し、前記送信信号周波数と前記受信信号の周波数とが
互いに異なることを利用して前記送信信号と前記受信信
号とを分離する送・受分波器において、前記入力端子と
前記共通端子との間に前記受信信号周波数に同調した帯
域阻止濾波器を設け、かつ、前記出力端子と前記共通端
子との間に前記受信信号周波数に同調した帯域通過濾波
器を設けたことを特徴とする送・受分波器。The transmitter has an input terminal for a transmission signal, an output terminal for a reception signal having a frequency different from that of the transmission signal, and a common terminal for simultaneously outputting the transmission signal and inputting the reception signal, and having a frequency different from that of the transmission signal. In a transmitting/receiving duplexer that separates the transmitting signal and the receiving signal by utilizing the fact that the frequencies of the receiving signals are different from each other, the frequency of the receiving signal is tuned to the receiving signal between the input terminal and the common terminal. A transmitter/receiver/demultiplexer characterized in that a band-elimination filter is provided, and a band-pass filter tuned to the received signal frequency is provided between the output terminal and the common terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18134185A JPS6240810A (en) | 1985-08-19 | 1985-08-19 | Transmission/reception branching filter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18134185A JPS6240810A (en) | 1985-08-19 | 1985-08-19 | Transmission/reception branching filter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6240810A true JPS6240810A (en) | 1987-02-21 |
Family
ID=16099002
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18134185A Pending JPS6240810A (en) | 1985-08-19 | 1985-08-19 | Transmission/reception branching filter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6240810A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002280862A (en) * | 2001-03-19 | 2002-09-27 | Murata Mfg Co Ltd | Composite lc filter circuit and composite lc filter component |
JPWO2007029601A1 (en) * | 2005-09-05 | 2009-03-19 | 国立大学法人 電気通信大学 | Demultiplexing circuit and design method thereof |
-
1985
- 1985-08-19 JP JP18134185A patent/JPS6240810A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002280862A (en) * | 2001-03-19 | 2002-09-27 | Murata Mfg Co Ltd | Composite lc filter circuit and composite lc filter component |
JPWO2007029601A1 (en) * | 2005-09-05 | 2009-03-19 | 国立大学法人 電気通信大学 | Demultiplexing circuit and design method thereof |
JP4734659B2 (en) * | 2005-09-05 | 2011-07-27 | 国立大学法人電気通信大学 | Demultiplexing circuit and design method thereof |
US8494008B2 (en) | 2005-09-05 | 2013-07-23 | National University Corporation The University Of Electro-Communications | Multiplexing circuit and designing method therefor |
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