JPS6238049A - Unique word detector - Google Patents

Unique word detector

Info

Publication number
JPS6238049A
JPS6238049A JP17824085A JP17824085A JPS6238049A JP S6238049 A JPS6238049 A JP S6238049A JP 17824085 A JP17824085 A JP 17824085A JP 17824085 A JP17824085 A JP 17824085A JP S6238049 A JPS6238049 A JP S6238049A
Authority
JP
Japan
Prior art keywords
soft
pulse
adder
shift register
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17824085A
Other languages
Japanese (ja)
Inventor
Tadashi Fujino
藤野 忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17824085A priority Critical patent/JPS6238049A/en
Publication of JPS6238049A publication Critical patent/JPS6238049A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain an excellent unique word detecting characteristic by using a soft deciding data for an input reception signal, calculating the multi-dimension Euclid distance to a unique (UW) word pattern while keeping the soft deciding data as it is so as to detect the UW. CONSTITUTION:Soft dividing reception signals PR51, QR52 demodulated by a soft diciding demodulator are inputted to the shift register 57 of correlation devices P53, Q54 at every clock respectively. The difference between stored UW patterns P55, Q56 and the content of the shift register 57 is calculated by a clock subtractor 58 in the correlation devices P53, Q54, the result is squared by a square device 64 and inputted to an adder 59. The adder 59 totalizes the squared samples and inputs the total sum SIGMA to a comparator 60. A permissible Euclid distance epsilon is set in advance in the comparator 60 and when the relation of SIGMA<=epsilon<2> exists, a pulse is outputted and inputted to a AND circuit 62. When the pulse is outputted while a UW detection gate signal forecasting the arrival time of the UW in advance is enabled in a terminal station, the pulse passes through the AND circuit 62 and is outputted as a UW detection pulse 63.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は衛星通信の時分割多元接続(TDMA)方式
やSingle Channel Per Carri
er (5CPC)方式などにおけるディジタル信号伝
送のフレーム同期などに用いるためのユニークワード促
)検出器に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] This invention is applicable to the time division multiple access (TDMA) system of satellite communication and the Single Channel Per Carri system.
The present invention relates to a unique word prompt detector for use in frame synchronization of digital signal transmission in the er (5CPC) system and the like.

〔従来の技術〕[Conventional technology]

第2図は従来のユニークワード検出器の一構成例であり
、図において、(1)は硬判定復調器(図示せず)で0
又は1に復調された受信信号Pa、(2)は硬判定復調
器で0又は1に復調された受信信号Qi、(3)はWパ
ターンPを格納した相関器P、(4)は謂パターンQを
格納した相関器Q、(5)は格納JパターンP、(6)
は格納間パターンQ、(7)は(M/2)段シフトレジ
スタ、(8)は排他的論理和回路(Ex−OR)、(9
)は加算器、αOはある値εと比較して、εより小さい
かあるいは等しいときパルスを出力する比較器1.Qυ
は扉検出ゲート信号、(2)はAND回路、α3は出力
のLIW検出パルス信号である。
Figure 2 shows an example of the configuration of a conventional unique word detector. In the figure, (1) is a hard decision demodulator (not shown) that
or the received signal Pa demodulated to 1, (2) the received signal Qi demodulated to 0 or 1 by a hard decision demodulator, (3) the correlator P storing the W pattern P, (4) the so-called pattern Correlator Q that stores Q, (5) is stored J pattern P, (6)
is the storage pattern Q, (7) is the (M/2) stage shift register, (8) is the exclusive OR circuit (Ex-OR), (9
) is an adder, and αO is a comparator 1. which compares with a certain value ε and outputs a pulse when it is smaller than or equal to ε. Qυ
is a door detection gate signal, (2) is an AND circuit, and α3 is an output LIW detection pulse signal.

次に動作について説明する。硬判定復調器でO又はlに
復調された受信信号Fil(す及びQR(2) ハソn
ぞれ相関器P(3)及びQ(4)のシフトレジスタ(7
)に毎クロツク入力する。相関器P(3)及びQ(4)
において、格納源パターンP(5)及びQ(6)と、シ
フトレジスタ(7)の内容が毎クロックEx−OR(s
)で比較され、各々のビットが一致しておけば0、不一
致ならばlを出力する。加算回路(9)では各々のEx
 −OR(8)の出力の1の数、すなわち不一致ビット
の数をかぞえ、その総計の不一致ビット数Σを比較器0
0である値Cと比較する。そしてΣ≦εの場合パルスを
出力する。端局であらかじめ四の到達時刻を予測する■
検出ゲート信号がEnableの時にこのパルスが出力
すればAND回路0オを通過して扉検出パルスαjとし
て出力する。
Next, the operation will be explained. The received signal Fil (s and QR(2) demodulated to O or l by the hard decision demodulator)
Shift registers (7) of correlators P(3) and Q(4), respectively.
) is input every clock. Correlators P(3) and Q(4)
, the storage source patterns P(5) and Q(6) and the contents of the shift register (7) are Ex-OR(s
), and if the respective bits match, 0 is output; if they do not match, 1 is output. In the adder circuit (9), each Ex
- Count the number of 1s in the output of OR (8), that is, the number of mismatched bits, and calculate the total number of mismatched bits Σ to the comparator 0.
Compare with value C which is 0. Then, if Σ≦ε, a pulse is output. Predict the arrival time of 4 in advance at the terminal station■
If this pulse is output when the detection gate signal is enabled, it passes through the AND circuit 0o and is output as the door detection pulse αj.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来のj検出器は以上のように入力の受信信号P、及び
鵡が既に0又はlに硬判定されているため、受信雑音の
影響を受けやす<、講を検出すべき時点に開を検出しな
い、いわゆるUW開不出の発生確率が高くなるなどの問
題があった。
As described above, the conventional J detector has already hard-determined the input received signal P and the parrot to be 0 or l, so it is susceptible to reception noise and detects an opening at the time when it should detect a < or a parrot. There were problems such as an increase in the probability of the so-called failure to open UW.

この発明は上記のような問題点を解消するためになされ
たもので、閣下検出確率・を小さくできる扉検出器を得
ることを目的とする。
This invention was made to solve the above-mentioned problems, and aims to provide a door detector that can reduce the detection probability.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る多次元軟判定UW扉検出器、入力信号と
して軟判定復調器出力信号を用い相関器のシフトレジス
タはこの軟判定データを収容できるだけのビット数を有
するシフトレジスタとし、格納講パターンは、この軟判
定データに相当する大きさを有するようにしたものであ
る。
In the multidimensional soft-decision UW door detector according to the present invention, the output signal of the soft-decision demodulator is used as the input signal, the shift register of the correlator is a shift register having a number of bits sufficient to accommodate this soft-decision data, and the storage pattern is , which has a size corresponding to this soft decision data.

〔作用〕[Effect]

この発明における多次元軟判定し検出器は、入力の受信
信号が軟判定データであり、軟判定データのままで罰パ
ターンとの間の多次元ユークリッド距離を計算するもの
である。
In the multidimensional soft decision detector of the present invention, the received input signal is soft decision data, and the multidimensional Euclidean distance between the soft decision data and the penalty pattern is calculated.

〔発明の実施例J 以下、この発明の一実施例を図について説明する。第1
図において、hυは軟判定復調器(図示せず)で復調さ
れた軟判定受信信号pR,izは軟判定復調器で復調さ
れた軟判定受信信号QR,幻は講パターンPを格納した
相関器P、i41は講パターンQを格納した相関器Q、
arpは軟判定受信信号PRに相当する大きさを有する
格納間パターンP、Mは軟判定受信信号Qアに相当する
大きさを有する格納講パターンQ、t57)は軟判定受
信信号P1又はQIIを収容できるだけのビット数を有
するシフトレジスタ、關は引算器、目は加算器、図は比
較器2、IOは扉検出ゲート信号、鞄はAND面路、繭
は出力のj検出パルス信号、−は二乗回路、である、次
に動作について説明する。軟判定復調器で復調された軟
判定受信信号P−υ及びQ、@はそれぞれ相関器PM及
びQr)4Iのシフトレジスタ闘に毎クロツク入力する
。相関器pH及びQi41において、格納間パターンP
M及びQ−とシフトレジスタわηの内容の差が毎タロツ
ク引算器關で計算され、その後二乗器−で二乗されて加
算器−に入力する。加算器−では、各々の二乗されたサ
ンプルの値を総計されて、その総和Σを比較器−に入力
する。比較器1ではあらかじめ許容ユークリッド距離ε
が設定されている。ここにおいて、Σ≦62となった場
合、パルスが出力されて、AND回路鞄に入力する。端
局であらかじめUWの到達時刻を予測する扉検出ゲート
信号がエネーブルの時にこのパルスが出力すれば駒回路
物を通過して扉検出パルス−として出力する。
[Embodiment J of the Invention An embodiment of the invention will be described below with reference to the drawings. 1st
In the figure, hυ is a soft-decision received signal pR demodulated by a soft-decision demodulator (not shown), iz is a soft-decision received signal QR demodulated by a soft-decision demodulator, and phantom is a correlator that stores a pattern P. P, i41 is a correlator Q that stores the pattern Q,
arp is a storage pattern P having a magnitude corresponding to the soft decision reception signal PR, M is a storage pattern Q having a magnitude corresponding to the soft decision reception signal Qa, and t57) is a storage pattern P having a magnitude corresponding to the soft decision reception signal PR. The shift register has the number of bits that can be accommodated, the subtractor is the adder, the figure shows the comparator 2, IO is the door detection gate signal, the bag is the AND plane, the cocoon is the output j detection pulse signal, - is a square circuit.The operation will be explained next. The soft-decision received signals P-υ and Q, @ demodulated by the soft-decision demodulator are input to the shift registers of the correlators PM and Qr)4I, respectively, every clock. In the correlator pH and Qi41, the storage pattern P
The difference between M and Q- and the contents of the shift register .eta. is calculated in each tallock subtracter, then squared in a squarer and input to an adder. In the adder, the values of each squared sample are summed and the sum Σ is input to the comparator. In comparator 1, the allowable Euclidean distance ε
is set. Here, if Σ≦62, a pulse is output and input to the AND circuit bag. If this pulse is output when the door detection gate signal that predicts the arrival time of the UW is enabled at the terminal station, it passes through the piece circuit and is output as a door detection pulse.

次に、本発明が従来方式よりも良好な特性を有すること
を説明するために、解析を行う。開はMビットで構成さ
れるとする。実用上W長Mは偶数に選ばれることが多く
、ここではMは偶数として解析する。
Next, an analysis will be performed to explain that the present invention has better characteristics than the conventional method. It is assumed that the opening is made up of M bits. In practice, the W length M is often chosen as an even number, and here, M is analyzed as an even number.

送信信号1ビット当りのエネルギーをE8とする。The energy per bit of the transmitted signal is assumed to be E8.

いま任意の2つの符号語−6,a、があって、これらの
間のハミング距離がmであるとすると、これらの間のユ
ークリッド距離D1及びこれを2J′P:′sで正規化
したユークリッド距離dはそれぞれD=la、−a。1
=2rTS        (1)d = D/2% 
= m             (2)で表される。
Now, if there are two arbitrary codewords -6,a, and the Hamming distance between them is m, then the Euclidean distance D1 between them and the Euclidean distance D1 normalized by 2J'P:'s The distance d is D=la, -a, respectively. 1
=2rTS (1)d = D/2%
= m (2).

また受信信号に伴う雑音は白色ガウス性を仮定し、その
電カスベクトル密度をNoとする。
Further, it is assumed that the noise accompanying the received signal is white Gaussian, and its electric scum vector density is set to No.

まず閣下検出確率を求める。いま送信UWがM次元空間
の原点Oに存在するとすれば、受信シンポで表される。
First, find the detection probability. If the transmitting UW now exists at the origin O of the M-dimensional space, it is expressed by the receiving symposium.

次に式(3)をM次元極座標変換する。Next, equation (3) is transformed into M-dimensional polar coordinates.

まず座標変換 (x1= r2 cos $2 LX2 = r2 sin 3!12        
     (5)(xl、 X2E(−ae、ao)、
 p2E(−π、π) 、 r2Er O、w) )を
施すと、 q(r2.yI2)= 1J21p(X2.x、)−q
(r2)q(7212)   (6)を得る。ここに、
IJ21はヤコビアンであり、fJ21=lδ(x2 
、 Xl ) /a (r2.42)l = r2  
   (9)で表される。次にi=3〜Mについて座標
変換1 ”” (” e M) + rI 、rl −
I E (0+”) vX i E (−” e ” 
) *ダ、6(−π/2.π/2)) をくり返し施す。rl−1は(i−1)次元ベクトル(
)J −1+ )J −2+・−、xl)から合成され
るベクトルであす、xiとは直交する。いま、rlのp
d/について、が成立すると仮定する。式(7)から、
!−8のときは式(ロ)は成立する(R2=2)。
First, coordinate transformation (x1 = r2 cos $2 LX2 = r2 sin 3!12
(5) (xl, X2E (-ae, ao),
p2E(-π, π), r2Er O, w)), q(r2.yI2)=1J21p(X2.x,)-q
(r2)q(7212) (6) is obtained. Here,
IJ21 is a Jacobian, fJ21=lδ(x2
, Xl ) /a (r2.42)l = r2
It is expressed as (9). Next, coordinate transformation 1 “” (” e M) + rI, rl − for i=3 to M
I E (0+”) vX i E (−” e ”
) *Da, 6(-π/2.π/2)) Repeatedly. rl-1 is an (i-1) dimensional vector (
)J −1+ )J −2+・−, xl), and is orthogonal to xi. Now, p of rl
Assume that for d/, holds true. From formula (7),
! -8, equation (b) holds true (R2=2).

次に式Qυがi≧3に対しても成立することを証明する
Next, we will prove that the formula Qυ also holds true for i≧3.

式(4)とαηを用いて式α0の座標変換を施すと、q
(rl、p、) = lJi I Q(rI−1) p
(x、 )ヲ得ル。ここにIJ、1  はヤコビアンで
あり、I J+ l =I a(rI−1−xI )/
a(rt e j’+) i =r((13で表される
。いま R1” R1−1/J”;j CI         
    Q4(至) C,=1/八、。cos  芦1d芦lとおくと、式(
イ)は q(r、 、廟) = q(r、) q(100f5q
(III+)  = CIcos   ダI     
       (至)となる。このことから、式αηの
仮定は、1E(8,M)についても成立することがわか
る。式(II)〜(至)をi=8〜Mでくり返する結局
次式を得る。
When we apply the coordinate transformation of equation α0 using equation (4) and αη, we get q
(rl, p,) = lJi I Q(rI-1) p
(x, ) get it. Here, IJ, 1 is the Jacobian, and I J+ l = I a (rI-1-xI)/
a(rt e j'+) i = r((represented by 13. Now R1"R1-1/J"; j CI
Q4 (to) C, = 1/8. If we set cos Ashi1dAshi, the formula (
b) is q(r, , temple) = q(r,) q(100f5q
(III+) = CIcos da I
(to). From this, it can be seen that the assumption of formula αη also holds true for 1E(8,M). By repeating equations (II) to (to) with i=8 to M, the following equation is obtained.

ところで、式(至)は、 のように書き換えられるから、式041 ハ、のように
表される。
By the way, the equation (to) can be rewritten as follows, so it can be expressed as Equation 041 C.

いま、1m1(、(偶旬のとき、 が成立すると仮定する。1o−2の場合、R2−2とな
って、式に)は成立する。次に、1=i(1+2のとき
について調べる。式に)、勾より、 (i、)−14)−2 となる。このことから、1E(4,M)についても式に
)は成立することがわかる。ところで10は偶数である
から、 16−1! である。従って、式(イ)は、 与えられる。
Now, it is assumed that 1m1(, (when it is an even season, the following holds true. In the case of 1o-2, R2-2 and the formula) holds true.Next, we will examine the case when 1=i(1+2). From the equation) and the gradient, we get (i,)-14)-2. From this, it can be seen that the formula ) also holds true for 1E(4,M). By the way, 10 is an even number, so 16-1! It is. Therefore, formula (a) is given.

謂検出における許容ユークリッド距離をεとすると、M
次元空間において、中心が送信Jの位置、半径がεの超
球の内部で四が受信した場合J検出され、外部に出た場
合り不検出となる。従って7不検出確率UWMPは次式
で表される。
If the allowable Euclidean distance in so-called detection is ε, then M
In the dimensional space, if 4 is received inside a hypersphere whose center is the position of transmission J and whose radius is ε, J will be detected, and if it goes outside, it will not be detected. Therefore, the 7 non-detection probability UWMP is expressed by the following equation.

聞MP = f  q(rM)(1rMε (lす々Es) 次に、肥誤検出確率を求める。ある任意の符号語がM次
元空間の点A−(A、0.・・・、0)に存在し、四が
原点Oに存在するとする。この符号語Aと四との間のハ
ミング距離がfの場合、これらの間のユークリッド距離
は A=2〃−鳳               (至)で
ある。
MP = f q (rM) (1rMε (lsuEs) Next, calculate the false detection probability.If a certain arbitrary code word is a point A-(A, 0..., 0) in the M-dimensional space , and 4 exists at the origin O. If the Hamming distance between the code word A and 4 is f, then the Euclidean distance between them is A=2〃-鳳 (to).

受信シンボルのM次元pd/は、 p(Xw* Xw−1#−°・m Xi) = :”j
rp(Xi)      8 ml で表される。式(5)〜dieと同様にすれば、式翰の
うち1.=、p(xl)  からq(rM−1)が次の
ように導出される。
The M-dimensional pd/ of the received symbol is p(Xw*Xw-1#-°・m Xi) = :"j
rp(Xi) 8 ml. If formulas (5) to die are used, 1. =, p(xl) q(rM-1) is derived as follows.

次に、式(1)、(至)に対して変数変換□(pME〔
0,−)、グMε(−π々、πカ))と施すと、 p(pM、pM) = IJ≦I Q(rM−1)り(
XM)を得る。ここに、;J≦1 はヤコビアンであり
、I J、、 I = l a ”M−1、XM)/a
(P、、@ 0M) I = P、    C1で表さ
れる。また、式(4)(至)から、上± である。
Next, variable transformation □(pME[
0, -), Mε(-π, π)), then p(pM, pM) = IJ≦I Q(rM-1)
obtain XM). Here; J≦1 is the Jacobian, I J,, I = l a ”M-1,XM)/a
(P,,@0M) I = P, represented by C1. Also, from equation (4) (to), it is above.

さて、符号語Aが開であると誤って判定される確率を求
める。M次元空間において、この符号語Aが、中心01
半径εの超球の内部で受信される場合、四として誤検出
される。この確率をL誤検出確率UWF Pと称するこ
とにすると、これは、で表される。t=PM//JT、
で変数変換して整理すると、結局次式で表現される。
Now, calculate the probability that code word A is erroneously determined to be open. In the M-dimensional space, this code word A is located at the center 01
If it is received inside a hypersphere with radius ε, it will be falsely detected as 4. If this probability is referred to as L false detection probability UWF P, it is expressed as. t=PM//JT,
After converting the variables and rearranging them, it is finally expressed as the following formula.

第8図に一例として謂長M=20ビットの場合のUWM
P及びUWFPを式@、@を用いて計算した結果を示す
。又、同図には同時に従来方式のUWMP及びUWFP
も示して比較する。UWFPは本発明と従来方式と同程
度であるのに対し、UWMPは本発明の方が良好な特性
を有していることが分かる。
Figure 8 shows an example of UWM in the case of length M = 20 bits.
The results of calculating P and UWFP using the formulas @ and @ are shown. In addition, the same figure also shows conventional UWMP and UWFP.
Also show and compare. It can be seen that while UWFP is comparable to the present invention and the conventional method, UWMP has better characteristics in the present invention.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、入力受信信号とに軟
判定データを用い、軟判定データのままで謂パターンと
の間の多次元ユークリッド距離を計算することによって
謂を検出するように構成したので、良好な扉検出特性の
得られる効果がある。
As described above, according to the present invention, the so-called pattern is detected by using soft-decision data as the input received signal and calculating the multidimensional Euclidean distance between the so-called pattern and the soft-decision data. Therefore, there is an effect that good door detection characteristics can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例によるユニークワード検出
器の構成図、第2図は従来の硬判定データを用いたユニ
ークワード検出器の構成図、第3図は本発明のユニーク
ワード検出器の特性の比較を示す図、である。 @υは軟判定復調器で復調された軟判定受信信号Pl、
鈴2は軟判定復調器で復調された軟判定受信信号Qえ、
關はUWPを格納した相関器P1−は閣パターンQを格
納した相関器Q、−は軟判定受信信号PRに相当する大
きさを有する格納WパターンP、■は軟判定受信信号Q
1に相当する大きさを有する格納謂パターンQ、6ηは
軟判定受信信号PR又はQRを収容できるだけのビット
数を有するシフトレジスタ、州は引算器、−は加算器、
頓は比較器、Illは扉検出ゲート信号、姉は瓜回路、
暁は出力のL検出パルス信号、(財)は二乗回路である
FIG. 1 is a block diagram of a unique word detector according to an embodiment of the present invention, FIG. 2 is a block diagram of a unique word detector using conventional hard decision data, and FIG. 3 is a block diagram of a unique word detector of the present invention. FIG. @υ is the soft-decision received signal Pl demodulated by the soft-decision demodulator,
Bell 2 receives the soft-decision received signal Q demodulated by the soft-decision demodulator,
The correlator P1- which stores UWP is the correlator Q which stores the cabinet pattern Q, - is the stored W pattern P whose size corresponds to the soft-decision received signal PR, and ■ is the soft-decision received signal Q
A so-called storage pattern Q having a size corresponding to 1, 6η is a shift register having a number of bits sufficient to accommodate the soft decision reception signal PR or QR, state is a subtracter, - is an adder,
Ton is the comparator, Ill is the door detection gate signal, the older sister is the melon circuit,
Akatsuki is the output L detection pulse signal, and (goods) is the square circuit.

Claims (1)

【特許請求の範囲】[Claims] 軟判定受信信号P_R及びQ_Rを入力信号とし、これ
らをそれぞれ収容できるM段のシフトレジスタと、都合
Mビットで構成されるユニークワード(UW)パターン
P及びQを収容する格納UWパターンP及びQと、上記
シフトレジスタの各段の値とUWパターンの各ビットに
対応する値の間の差をそれぞれ計算する引算器と、この
出力の差信号を二乗する二乗器と、これらM個の二乗器
出力信号を加算する加算器と、この加算器出力をある値
εと、UW検出ゲート信号がエネーブルの間比較器出力
信号を通過させるAND回路を備えたユニークワード検
出器。
The soft-decision reception signals P_R and Q_R are input signals, and an M-stage shift register capable of accommodating these signals, respectively, and storage UW patterns P and Q that accommodate unique word (UW) patterns P and Q composed of M bits are provided. , a subtracter that calculates the difference between the value of each stage of the shift register and the value corresponding to each bit of the UW pattern, a squarer that squares the difference signal of this output, and these M squarers. A unique word detector comprising an adder for summing the output signals, an AND circuit for passing the adder output to a value ε and the comparator output signal while the UW detection gate signal is enabled.
JP17824085A 1985-08-12 1985-08-12 Unique word detector Pending JPS6238049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17824085A JPS6238049A (en) 1985-08-12 1985-08-12 Unique word detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17824085A JPS6238049A (en) 1985-08-12 1985-08-12 Unique word detector

Publications (1)

Publication Number Publication Date
JPS6238049A true JPS6238049A (en) 1987-02-19

Family

ID=16045042

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17824085A Pending JPS6238049A (en) 1985-08-12 1985-08-12 Unique word detector

Country Status (1)

Country Link
JP (1) JPS6238049A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5073906A (en) * 1989-12-07 1991-12-17 Nec Corporation Synchronization word detection apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
3RD INTERNATONAL CONFERENCE DIGITAL SATELLITE COMMUNICATION=1975 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5073906A (en) * 1989-12-07 1991-12-17 Nec Corporation Synchronization word detection apparatus

Similar Documents

Publication Publication Date Title
US5373507A (en) Device and method for synchronizing and channel estimation in a TDMA radio communication system
US4259663A (en) Contention interference detection by comparison of transmitted and received signal information
US4302845A (en) Phase-encoded data signal demodulator
EP0026624B1 (en) A coherent phase demodulator for power line communication systems
TWI650983B (en) Digital radio transmission
US10541852B2 (en) Preamble detection mechanism for reception of asynchronous packets
US4328587A (en) Phase slip detector and systems employing the detector
US5093848A (en) Method of controlling the frequency of a coherent radio receiver and apparatus for carrying out the method
JPS6346623B2 (en)
JPS62173832A (en) Method for synchronizing and detecting wave flux and subsystem for wave flux communication system
CA2130551A1 (en) Method for determining the number of defective digital bits (defective bit number) transmitted over a data-transmission path to be tested, and device for the carring out of the method
US20040184564A1 (en) Timing synchronization for M-DPSK channels
JPS6238049A (en) Unique word detector
US6195402B1 (en) Pattern matching apparatus
Scholtz et al. Signal design for phase-incoherent communications
CN111970673B (en) Bluetooth timing synchronization method and device, computer equipment and storage medium
FI112996B (en) Activation code for radio transmission of data
JPH07336347A (en) Frame synchronization detection circuit
US3559166A (en) Probability error corrector and voltage detector
US4530094A (en) Coding for odd error multiplication in digital systems with differential coding
CN111510852B (en) Method and device for capturing positioning signal in common frequency band positioning system
US20230189000A1 (en) Frame synch detection with intrusion detection
Zabin et al. Efficient identification of non-Gaussian mixtures
JPS5853810B2 (en) Retraction phase identification method
JPS61137447A (en) Decoding device for multiphase psk signal